git.oblomov.eu Git - linux-2.6/blob - drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46
  47 #include <asm/current.h>
  48
  49 #include "ehca_classes.h"
  50 #include "ehca_tools.h"
  51 #include "ehca_qes.h"
  52 #include "ehca_iverbs.h"
  53 #include "hcp_if.h"
  54 #include "hipz_fns.h"
  55
  56 static struct kmem_cache *qp_cache;
  57
  58 /*
  59  * attributes not supported by query qp
  60  */
  61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  63                                      IB_QP_ACCESS_FLAGS       | \
  64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  65
  66 /*
  67  * ehca (internal) qp state values
  68  */
  69 enum ehca_qp_state {
  70         EHCA_QPS_RESET = 1,
  71         EHCA_QPS_INIT = 2,
  72         EHCA_QPS_RTR = 3,
  73         EHCA_QPS_RTS = 5,
  74         EHCA_QPS_SQD = 6,
  75         EHCA_QPS_SQE = 8,
  76         EHCA_QPS_ERR = 128
  77 };
  78
  79 /*
  80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  81  */
  82 enum ib_qp_statetrans {
  83         IB_QPST_ANY2RESET,
  84         IB_QPST_ANY2ERR,
  85         IB_QPST_RESET2INIT,
  86         IB_QPST_INIT2RTR,
  87         IB_QPST_INIT2INIT,
  88         IB_QPST_RTR2RTS,
  89         IB_QPST_RTS2SQD,
  90         IB_QPST_RTS2RTS,
  91         IB_QPST_SQD2RTS,
  92         IB_QPST_SQE2RTS,
  93         IB_QPST_SQD2SQD,
  94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  95 };
  96
  97 /*
  98  * ib2ehca_qp_state maps IB to ehca qp_state
  99  * returns ehca qp state corresponding to given ib qp state
 100  */
 101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 102 {
 103         switch (ib_qp_state) {
 104         case IB_QPS_RESET:
 105                 return EHCA_QPS_RESET;
 106         case IB_QPS_INIT:
 107                 return EHCA_QPS_INIT;
 108         case IB_QPS_RTR:
 109                 return EHCA_QPS_RTR;
 110         case IB_QPS_RTS:
 111                 return EHCA_QPS_RTS;
 112         case IB_QPS_SQD:
 113                 return EHCA_QPS_SQD;
 114         case IB_QPS_SQE:
 115                 return EHCA_QPS_SQE;
 116         case IB_QPS_ERR:
 117                 return EHCA_QPS_ERR;
 118         default:
 119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 120                 return -EINVAL;
 121         }
 122 }
 123
 124 /*
 125  * ehca2ib_qp_state maps ehca to IB qp_state
 126  * returns ib qp state corresponding to given ehca qp state
 127  */
 128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 129                                                 ehca_qp_state)
 130 {
 131         switch (ehca_qp_state) {
 132         case EHCA_QPS_RESET:
 133                 return IB_QPS_RESET;
 134         case EHCA_QPS_INIT:
 135                 return IB_QPS_INIT;
 136         case EHCA_QPS_RTR:
 137                 return IB_QPS_RTR;
 138         case EHCA_QPS_RTS:
 139                 return IB_QPS_RTS;
 140         case EHCA_QPS_SQD:
 141                 return IB_QPS_SQD;
 142         case EHCA_QPS_SQE:
 143                 return IB_QPS_SQE;
 144         case EHCA_QPS_ERR:
 145                 return IB_QPS_ERR;
 146         default:
 147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 148                 return -EINVAL;
 149         }
 150 }
 151
 152 /*
 153  * ehca_qp_type used as index for req_attr and opt_attr of
 154  * struct ehca_modqp_statetrans
 155  */
 156 enum ehca_qp_type {
 157         QPT_RC = 0,
 158         QPT_UC = 1,
 159         QPT_UD = 2,
 160         QPT_SQP = 3,
 161         QPT_MAX
 162 };
 163
 164 /*
 165  * ib2ehcaqptype maps Ib to ehca qp_type
 166  * returns ehca qp type corresponding to ib qp type
 167  */
 168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 169 {
 170         switch (ibqptype) {
 171         case IB_QPT_SMI:
 172         case IB_QPT_GSI:
 173                 return QPT_SQP;
 174         case IB_QPT_RC:
 175                 return QPT_RC;
 176         case IB_QPT_UC:
 177                 return QPT_UC;
 178         case IB_QPT_UD:
 179                 return QPT_UD;
 180         default:
 181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 182                 return -EINVAL;
 183         }
 184 }
 185
 186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 187                                                          int ib_tostate)
 188 {
 189         int index = -EINVAL;
 190         switch (ib_tostate) {
 191         case IB_QPS_RESET:
 192                 index = IB_QPST_ANY2RESET;
 193                 break;
 194         case IB_QPS_INIT:
 195                 switch (ib_fromstate) {
 196                 case IB_QPS_RESET:
 197                         index = IB_QPST_RESET2INIT;
 198                         break;
 199                 case IB_QPS_INIT:
 200                         index = IB_QPST_INIT2INIT;
 201                         break;
 202                 }
 203                 break;
 204         case IB_QPS_RTR:
 205                 if (ib_fromstate == IB_QPS_INIT)
 206                         index = IB_QPST_INIT2RTR;
 207                 break;
 208         case IB_QPS_RTS:
 209                 switch (ib_fromstate) {
 210                 case IB_QPS_RTR:
 211                         index = IB_QPST_RTR2RTS;
 212                         break;
 213                 case IB_QPS_RTS:
 214                         index = IB_QPST_RTS2RTS;
 215                         break;
 216                 case IB_QPS_SQD:
 217                         index = IB_QPST_SQD2RTS;
 218                         break;
 219                 case IB_QPS_SQE:
 220                         index = IB_QPST_SQE2RTS;
 221                         break;
 222                 }
 223                 break;
 224         case IB_QPS_SQD:
 225                 if (ib_fromstate == IB_QPS_RTS)
 226                         index = IB_QPST_RTS2SQD;
 227                 break;
 228         case IB_QPS_SQE:
 229                 break;
 230         case IB_QPS_ERR:
 231                 index = IB_QPST_ANY2ERR;
 232                 break;
 233         default:
 234                 break;
 235         }
 236         return index;
 237 }
 238
 239 /*
 240  * ibqptype2servicetype returns hcp service type corresponding to given
 241  * ib qp type used by create_qp()
 242  */
 243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 244 {
 245         switch (ibqptype) {
 246         case IB_QPT_SMI:
 247         case IB_QPT_GSI:
 248                 return ST_UD;
 249         case IB_QPT_RC:
 250                 return ST_RC;
 251         case IB_QPT_UC:
 252                 return ST_UC;
 253         case IB_QPT_UD:
 254                 return ST_UD;
 255         case IB_QPT_RAW_IPV6:
 256                 return -EINVAL;
 257         case IB_QPT_RAW_ETY:
 258                 return -EINVAL;
 259         default:
 260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 261                 return -EINVAL;
 262         }
 263 }
 264
 265 /*
 266  * init userspace queue info from ipz_queue data
 267  */
 268 static inline void queue2resp(struct ipzu_queue_resp *resp,
 269                               struct ipz_queue *queue)
 270 {
 271         resp->qe_size = queue->qe_size;
 272         resp->act_nr_of_sg = queue->act_nr_of_sg;
 273         resp->queue_length = queue->queue_length;
 274         resp->pagesize = queue->pagesize;
 275         resp->toggle_state = queue->toggle_state;
 276 }
 277
 278 /*
 279  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 280  */
 281 static inline int init_qp_queue(struct ehca_shca *shca,
 282                                 struct ehca_qp *my_qp,
 283                                 struct ipz_queue *queue,
 284                                 int q_type,
 285                                 u64 expected_hret,
 286                                 int nr_q_pages,
 287                                 int wqe_size,
 288                                 int nr_sges)
 289 {
 290         int ret, cnt, ipz_rc;
 291         void *vpage;
 292         u64 rpage, h_ret;
 293         struct ib_device *ib_dev = &shca->ib_device;
 294         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 295
 296         if (!nr_q_pages)
 297                 return 0;
 298
 299         ipz_rc = ipz_queue_ctor(queue, nr_q_pages, EHCA_PAGESIZE,
 300                                 wqe_size, nr_sges);
 301         if (!ipz_rc) {
 302                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
 303                          ipz_rc);
 304                 return -EBUSY;
 305         }
 306
 307         /* register queue pages */
 308         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 309                 vpage = ipz_qpageit_get_inc(queue);
 310                 if (!vpage) {
 311                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 312                                  "failed p_vpage= %p", vpage);
 313                         ret = -EINVAL;
 314                         goto init_qp_queue1;
 315                 }
 316                 rpage = virt_to_abs(vpage);
 317
 318                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 319                                                  my_qp->ipz_qp_handle,
 320                                                  NULL, 0, q_type,
 321                                                  rpage, 1,
 322                                                  my_qp->galpas.kernel);
 323                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 324                         if (h_ret != expected_hret) {
 325                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 326                                          "h_ret= %lx ", h_ret);
 327                                 ret = ehca2ib_return_code(h_ret);
 328                                 goto init_qp_queue1;
 329                         }
 330                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 331                         if (vpage) {
 332                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 333                                          "should not succeed vpage=%p", vpage);
 334                                 ret = -EINVAL;
 335                                 goto init_qp_queue1;
 336                         }
 337                 } else {
 338                         if (h_ret != H_PAGE_REGISTERED) {
 339                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 340                                          "h_ret= %lx ", h_ret);
 341                                 ret = ehca2ib_return_code(h_ret);
 342                                 goto init_qp_queue1;
 343                         }
 344                 }
 345         }
 346
 347         ipz_qeit_reset(queue);
 348
 349         return 0;
 350
 351 init_qp_queue1:
 352         ipz_queue_dtor(queue);
 353         return ret;
 354 }
 355
 356 /*
 357  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 358  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 359  * fields, the field out of init_attr is used.
 360  */
 361 struct ehca_qp *internal_create_qp(struct ib_pd *pd,
 362                                    struct ib_qp_init_attr *init_attr,
 363                                    struct ib_srq_init_attr *srq_init_attr,
 364                                    struct ib_udata *udata, int is_srq)
 365 {
 366         static int da_rc_msg_size[] = { 128, 256, 512, 1024, 2048, 4096 };
 367         static int da_ud_sq_msg_size[]={ 128, 384, 896, 1920, 3968 };
 368         struct ehca_qp *my_qp;
 369         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 370         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 371                                               ib_device);
 372         struct ib_ucontext *context = NULL;
 373         u64 h_ret;
 374         int is_llqp = 0, has_srq = 0;
 375         int qp_type, max_send_sge, max_recv_sge, ret;
 376
 377         /* h_call's out parameters */
 378         struct ehca_alloc_qp_parms parms;
 379         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 380         unsigned long flags;
 381
 382         memset(&parms, 0, sizeof(parms));
 383         qp_type = init_attr->qp_type;
 384
 385         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 386                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 387                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 388                          init_attr->sq_sig_type);
 389                 return ERR_PTR(-EINVAL);
 390         }
 391
 392         /* save LLQP info */
 393         if (qp_type & 0x80) {
 394                 is_llqp = 1;
 395                 parms.ext_type = EQPT_LLQP;
 396                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 397         }
 398         qp_type &= 0x1F;
 399
 400         /* handle SRQ base QPs */
 401         if (init_attr->srq) {
 402                 struct ehca_qp *my_srq =
 403                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 404
 405                 has_srq = 1;
 406                 parms.ext_type = EQPT_SRQBASE;
 407                 parms.srq_qpn = my_srq->real_qp_num;
 408                 parms.srq_token = my_srq->token;
 409         }
 410
 411         if (is_llqp && has_srq) {
 412                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 413                 return ERR_PTR(-EINVAL);
 414         }
 415
 416         /* handle SRQs */
 417         if (is_srq) {
 418                 parms.ext_type = EQPT_SRQ;
 419                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 420                 if (init_attr->cap.max_recv_sge > 3) {
 421                         ehca_err(pd->device, "no more than three SGEs "
 422                                  "supported for SRQ  pd=%p  max_sge=%x",
 423                                  pd, init_attr->cap.max_recv_sge);
 424                         return ERR_PTR(-EINVAL);
 425                 }
 426         }
 427
 428         /* check QP type */
 429         if (qp_type != IB_QPT_UD &&
 430             qp_type != IB_QPT_UC &&
 431             qp_type != IB_QPT_RC &&
 432             qp_type != IB_QPT_SMI &&
 433             qp_type != IB_QPT_GSI) {
 434                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 435                 return ERR_PTR(-EINVAL);
 436         }
 437
 438         if (is_llqp && (qp_type != IB_QPT_RC && qp_type != IB_QPT_UD)) {
 439                 ehca_err(pd->device, "unsupported LL QP Type=%x", qp_type);
 440                 return ERR_PTR(-EINVAL);
 441         } else if (is_llqp && qp_type == IB_QPT_RC &&
 442                    (init_attr->cap.max_send_wr > 255 ||
 443                     init_attr->cap.max_recv_wr > 255 )) {
 444                 ehca_err(pd->device, "Invalid Number of max_sq_wr=%x "
 445                          "or max_rq_wr=%x for RC LLQP",
 446                          init_attr->cap.max_send_wr,
 447                          init_attr->cap.max_recv_wr);
 448                 return ERR_PTR(-EINVAL);
 449         } else if (is_llqp && qp_type == IB_QPT_UD &&
 450                  init_attr->cap.max_send_wr > 255) {
 451                 ehca_err(pd->device,
 452                          "Invalid Number of max_send_wr=%x for UD QP_TYPE=%x",
 453                          init_attr->cap.max_send_wr, qp_type);
 454                 return ERR_PTR(-EINVAL);
 455         }
 456
 457         if (pd->uobject && udata)
 458                 context = pd->uobject->context;
 459
 460         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 461         if (!my_qp) {
 462                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 463                 return ERR_PTR(-ENOMEM);
 464         }
 465
 466         spin_lock_init(&my_qp->spinlock_s);
 467         spin_lock_init(&my_qp->spinlock_r);
 468         my_qp->qp_type = qp_type;
 469         my_qp->ext_type = parms.ext_type;
 470
 471         if (init_attr->recv_cq)
 472                 my_qp->recv_cq =
 473                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 474         if (init_attr->send_cq)
 475                 my_qp->send_cq =
 476                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 477
 478         do {
 479                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 480                         ret = -ENOMEM;
 481                         ehca_err(pd->device, "Can't reserve idr resources.");
 482                         goto create_qp_exit0;
 483                 }
 484
 485                 spin_lock_irqsave(&ehca_qp_idr_lock, flags);
 486                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 487                 spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 488
 489         } while (ret == -EAGAIN);
 490
 491         if (ret) {
 492                 ret = -ENOMEM;
 493                 ehca_err(pd->device, "Can't allocate new idr entry.");
 494                 goto create_qp_exit0;
 495         }
 496
 497         parms.servicetype = ibqptype2servicetype(qp_type);
 498         if (parms.servicetype < 0) {
 499                 ret = -EINVAL;
 500                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 501                 goto create_qp_exit0;
 502         }
 503
 504         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 505                 parms.sigtype = HCALL_SIGT_EVERY;
 506         else
 507                 parms.sigtype = HCALL_SIGT_BY_WQE;
 508
 509         /* UD_AV CIRCUMVENTION */
 510         max_send_sge = init_attr->cap.max_send_sge;
 511         max_recv_sge = init_attr->cap.max_recv_sge;
 512         if (parms.servicetype == ST_UD) {
 513                 max_send_sge += 2;
 514                 max_recv_sge += 2;
 515         }
 516
 517         parms.token = my_qp->token;
 518         parms.eq_handle = shca->eq.ipz_eq_handle;
 519         parms.pd = my_pd->fw_pd;
 520         if (my_qp->send_cq)
 521                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 522         if (my_qp->recv_cq)
 523                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 524
 525         parms.max_send_wr = init_attr->cap.max_send_wr;
 526         parms.max_recv_wr = init_attr->cap.max_recv_wr;
 527         parms.max_send_sge = max_send_sge;
 528         parms.max_recv_sge = max_recv_sge;
 529
 530         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 531         if (h_ret != H_SUCCESS) {
 532                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
 533                          h_ret);
 534                 ret = ehca2ib_return_code(h_ret);
 535                 goto create_qp_exit1;
 536         }
 537
 538         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 539         my_qp->ipz_qp_handle = parms.qp_handle;
 540         my_qp->galpas = parms.galpas;
 541
 542         switch (qp_type) {
 543         case IB_QPT_RC:
 544                 if (!is_llqp) {
 545                         swqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 546                                              (parms.act_nr_send_sges)]);
 547                         rwqe_size = offsetof(struct ehca_wqe, u.nud.sg_list[
 548                                              (parms.act_nr_recv_sges)]);
 549                 } else { /* for LLQP we need to use msg size, not wqe size */
 550                         swqe_size = da_rc_msg_size[max_send_sge];
 551                         rwqe_size = da_rc_msg_size[max_recv_sge];
 552                         parms.act_nr_send_sges = 1;
 553                         parms.act_nr_recv_sges = 1;
 554                 }
 555                 break;
 556         case IB_QPT_UC:
 557                 swqe_size = offsetof(struct ehca_wqe,
 558                                      u.nud.sg_list[parms.act_nr_send_sges]);
 559                 rwqe_size = offsetof(struct ehca_wqe,
 560                                      u.nud.sg_list[parms.act_nr_recv_sges]);
 561                 break;
 562
 563         case IB_QPT_UD:
 564         case IB_QPT_GSI:
 565         case IB_QPT_SMI:
 566                 /* UD circumvention */
 567                 parms.act_nr_recv_sges -= 2;
 568                 parms.act_nr_send_sges -= 2;
 569                 if (is_llqp) {
 570                         swqe_size = da_ud_sq_msg_size[max_send_sge];
 571                         rwqe_size = da_rc_msg_size[max_recv_sge];
 572                         parms.act_nr_send_sges = 1;
 573                         parms.act_nr_recv_sges = 1;
 574                 } else {
 575                         swqe_size = offsetof(struct ehca_wqe,
 576                                              u.ud_av.sg_list[parms.act_nr_send_sges]);
 577                         rwqe_size = offsetof(struct ehca_wqe,
 578                                              u.ud_av.sg_list[parms.act_nr_recv_sges]);
 579                 }
 580
 581                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 582                         parms.act_nr_send_wqes = init_attr->cap.max_send_wr;
 583                         parms.act_nr_recv_wqes = init_attr->cap.max_recv_wr;
 584                         parms.act_nr_send_sges = init_attr->cap.max_send_sge;
 585                         parms.act_nr_recv_sges = init_attr->cap.max_recv_sge;
 586                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 587                 }
 588
 589                 break;
 590
 591         default:
 592                 break;
 593         }
 594
 595         /* initialize r/squeue and register queue pages */
 596         if (HAS_SQ(my_qp)) {
 597                 ret = init_qp_queue(
 598                         shca, my_qp, &my_qp->ipz_squeue, 0,
 599                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 600                         parms.nr_sq_pages, swqe_size,
 601                         parms.act_nr_send_sges);
 602                 if (ret) {
 603                         ehca_err(pd->device, "Couldn't initialize squeue "
 604                                  "and pages  ret=%x", ret);
 605                         goto create_qp_exit2;
 606                 }
 607         }
 608
 609         if (HAS_RQ(my_qp)) {
 610                 ret = init_qp_queue(
 611                         shca, my_qp, &my_qp->ipz_rqueue, 1,
 612                         H_SUCCESS, parms.nr_rq_pages, rwqe_size,
 613                         parms.act_nr_recv_sges);
 614                 if (ret) {
 615                         ehca_err(pd->device, "Couldn't initialize rqueue "
 616                                  "and pages ret=%x", ret);
 617                         goto create_qp_exit3;
 618                 }
 619         }
 620
 621         if (is_srq) {
 622                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 623                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 624
 625                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 626                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 627         } else {
 628                 my_qp->ib_qp.qp_num = ib_qp_num;
 629                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 630                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 631
 632                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 633                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 634
 635                 my_qp->ib_qp.qp_type = qp_type;
 636                 my_qp->ib_qp.srq = init_attr->srq;
 637
 638                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 639                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 640         }
 641
 642         init_attr->cap.max_inline_data = 0; /* not supported yet */
 643         init_attr->cap.max_recv_sge = parms.act_nr_recv_sges;
 644         init_attr->cap.max_recv_wr = parms.act_nr_recv_wqes;
 645         init_attr->cap.max_send_sge = parms.act_nr_send_sges;
 646         init_attr->cap.max_send_wr = parms.act_nr_send_wqes;
 647         my_qp->init_attr = *init_attr;
 648
 649         /* NOTE: define_apq0() not supported yet */
 650         if (qp_type == IB_QPT_GSI) {
 651                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 652                 if (h_ret != H_SUCCESS) {
 653                         ehca_err(pd->device, "ehca_define_sqp() failed rc=%lx",
 654                                  h_ret);
 655                         ret = ehca2ib_return_code(h_ret);
 656                         goto create_qp_exit4;
 657                 }
 658         }
 659
 660         if (my_qp->send_cq) {
 661                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 662                 if (ret) {
 663                         ehca_err(pd->device, "Couldn't assign qp to send_cq ret=%x",
 664                                  ret);
 665                         goto create_qp_exit4;
 666                 }
 667         }
 668
 669         /* copy queues, galpa data to user space */
 670         if (context && udata) {
 671                 struct ehca_create_qp_resp resp;
 672                 memset(&resp, 0, sizeof(resp));
 673
 674                 resp.qp_num = my_qp->real_qp_num;
 675                 resp.token = my_qp->token;
 676                 resp.qp_type = my_qp->qp_type;
 677                 resp.ext_type = my_qp->ext_type;
 678                 resp.qkey = my_qp->qkey;
 679                 resp.real_qp_num = my_qp->real_qp_num;
 680                 if (HAS_SQ(my_qp))
 681                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 682                 if (HAS_RQ(my_qp))
 683                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 684
 685                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 686                         ehca_err(pd->device, "Copy to udata failed");
 687                         ret = -EINVAL;
 688                         goto create_qp_exit4;
 689                 }
 690         }
 691
 692         return my_qp;
 693
 694 create_qp_exit4:
 695         if (HAS_RQ(my_qp))
 696                 ipz_queue_dtor(&my_qp->ipz_rqueue);
 697
 698 create_qp_exit3:
 699         if (HAS_SQ(my_qp))
 700                 ipz_queue_dtor(&my_qp->ipz_squeue);
 701
 702 create_qp_exit2:
 703         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 704
 705 create_qp_exit1:
 706         spin_lock_irqsave(&ehca_qp_idr_lock, flags);
 707         idr_remove(&ehca_qp_idr, my_qp->token);
 708         spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 709
 710 create_qp_exit0:
 711         kmem_cache_free(qp_cache, my_qp);
 712         return ERR_PTR(ret);
 713 }
 714
 715 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 716                              struct ib_qp_init_attr *qp_init_attr,
 717                              struct ib_udata *udata)
 718 {
 719         struct ehca_qp *ret;
 720
 721         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 722         return IS_ERR(ret) ? (struct ib_qp *) ret : &ret->ib_qp;
 723 }
 724
 725 int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 726                         struct ib_uobject *uobject);
 727
 728 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 729                                struct ib_srq_init_attr *srq_init_attr,
 730                                struct ib_udata *udata)
 731 {
 732         struct ib_qp_init_attr qp_init_attr;
 733         struct ehca_qp *my_qp;
 734         struct ib_srq *ret;
 735         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 736                                               ib_device);
 737         struct hcp_modify_qp_control_block *mqpcb;
 738         u64 hret, update_mask;
 739
 740         /* For common attributes, internal_create_qp() takes its info
 741          * out of qp_init_attr, so copy all common attrs there.
 742          */
 743         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 744         qp_init_attr.event_handler = srq_init_attr->event_handler;
 745         qp_init_attr.qp_context = srq_init_attr->srq_context;
 746         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 747         qp_init_attr.qp_type = IB_QPT_RC;
 748         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 749         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 750
 751         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 752         if (IS_ERR(my_qp))
 753                 return (struct ib_srq *) my_qp;
 754
 755         /* copy back return values */
 756         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 757         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
 758
 759         /* drive SRQ into RTR state */
 760         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 761         if (!mqpcb) {
 762                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 763                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 764                 ret = ERR_PTR(-ENOMEM);
 765                 goto create_srq1;
 766         }
 767
 768         mqpcb->qp_state = EHCA_QPS_INIT;
 769         mqpcb->prim_phys_port = 1;
 770         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 771         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 772                                 my_qp->ipz_qp_handle,
 773                                 &my_qp->pf,
 774                                 update_mask,
 775                                 mqpcb, my_qp->galpas.kernel);
 776         if (hret != H_SUCCESS) {
 777                 ehca_err(pd->device, "Could not modify SRQ to INIT"
 778                          "ehca_qp=%p qp_num=%x hret=%lx",
 779                          my_qp, my_qp->real_qp_num, hret);
 780                 goto create_srq2;
 781         }
 782
 783         mqpcb->qp_enable = 1;
 784         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 785         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 786                                 my_qp->ipz_qp_handle,
 787                                 &my_qp->pf,
 788                                 update_mask,
 789                                 mqpcb, my_qp->galpas.kernel);
 790         if (hret != H_SUCCESS) {
 791                 ehca_err(pd->device, "Could not enable SRQ"
 792                          "ehca_qp=%p qp_num=%x hret=%lx",
 793                          my_qp, my_qp->real_qp_num, hret);
 794                 goto create_srq2;
 795         }
 796
 797         mqpcb->qp_state  = EHCA_QPS_RTR;
 798         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 799         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 800                                 my_qp->ipz_qp_handle,
 801                                 &my_qp->pf,
 802                                 update_mask,
 803                                 mqpcb, my_qp->galpas.kernel);
 804         if (hret != H_SUCCESS) {
 805                 ehca_err(pd->device, "Could not modify SRQ to RTR"
 806                          "ehca_qp=%p qp_num=%x hret=%lx",
 807                          my_qp, my_qp->real_qp_num, hret);
 808                 goto create_srq2;
 809         }
 810
 811         return &my_qp->ib_srq;
 812
 813 create_srq2:
 814         ret = ERR_PTR(ehca2ib_return_code(hret));
 815         ehca_free_fw_ctrlblock(mqpcb);
 816
 817 create_srq1:
 818         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 819
 820         return ret;
 821 }
 822
 823 /*
 824  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 825  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 826  * returns total number of bad wqes in bad_wqe_cnt
 827  */
 828 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 829                            int *bad_wqe_cnt)
 830 {
 831         u64 h_ret;
 832         struct ipz_queue *squeue;
 833         void *bad_send_wqe_p, *bad_send_wqe_v;
 834         u64 q_ofs;
 835         struct ehca_wqe *wqe;
 836         int qp_num = my_qp->ib_qp.qp_num;
 837
 838         /* get send wqe pointer */
 839         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 840                                            my_qp->ipz_qp_handle, &my_qp->pf,
 841                                            &bad_send_wqe_p, NULL, 2);
 842         if (h_ret != H_SUCCESS) {
 843                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 844                          " ehca_qp=%p qp_num=%x h_ret=%lx",
 845                          my_qp, qp_num, h_ret);
 846                 return ehca2ib_return_code(h_ret);
 847         }
 848         bad_send_wqe_p = (void*)((u64)bad_send_wqe_p & (~(1L<<63)));
 849         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 850                  qp_num, bad_send_wqe_p);
 851         /* convert wqe pointer to vadr */
 852         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 853         if (ehca_debug_level)
 854                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 855         squeue = &my_qp->ipz_squeue;
 856         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 857                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 858                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 859                 return -EFAULT;
 860         }
 861
 862         /* loop sets wqe's purge bit */
 863         wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs);
 864         *bad_wqe_cnt = 0;
 865         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 866                 if (ehca_debug_level)
 867                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 868                 wqe->nr_of_data_seg = 0; /* suppress data access */
 869                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 870                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 871                 wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs);
 872                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 873         }
 874         /*
 875          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 876          *  i.e. nr of wqes with flush error status is one less
 877          */
 878         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 879                  qp_num, (*bad_wqe_cnt)-1);
 880         wqe->wqef = 0;
 881
 882         return 0;
 883 }
 884
 885 /*
 886  * internal_modify_qp with circumvention to handle aqp0 properly
 887  * smi_reset2init indicates if this is an internal reset-to-init-call for
 888  * smi. This flag must always be zero if called from ehca_modify_qp()!
 889  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 890  */
 891 static int internal_modify_qp(struct ib_qp *ibqp,
 892                               struct ib_qp_attr *attr,
 893                               int attr_mask, int smi_reset2init)
 894 {
 895         enum ib_qp_state qp_cur_state, qp_new_state;
 896         int cnt, qp_attr_idx, ret = 0;
 897         enum ib_qp_statetrans statetrans;
 898         struct hcp_modify_qp_control_block *mqpcb;
 899         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 900         struct ehca_shca *shca =
 901                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 902         u64 update_mask;
 903         u64 h_ret;
 904         int bad_wqe_cnt = 0;
 905         int squeue_locked = 0;
 906         unsigned long spl_flags = 0;
 907
 908         /* do query_qp to obtain current attr values */
 909         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 910         if (!mqpcb) {
 911                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 912                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 913                 return -ENOMEM;
 914         }
 915
 916         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
 917                                 my_qp->ipz_qp_handle,
 918                                 &my_qp->pf,
 919                                 mqpcb, my_qp->galpas.kernel);
 920         if (h_ret != H_SUCCESS) {
 921                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
 922                          "ehca_qp=%p qp_num=%x h_ret=%lx",
 923                          my_qp, ibqp->qp_num, h_ret);
 924                 ret = ehca2ib_return_code(h_ret);
 925                 goto modify_qp_exit1;
 926         }
 927
 928         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
 929
 930         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
 931                 ret = -EINVAL;
 932                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
 933                          "ehca_qp=%p qp_num=%x",
 934                          mqpcb->qp_state, my_qp, ibqp->qp_num);
 935                 goto modify_qp_exit1;
 936         }
 937         /*
 938          * circumvention to set aqp0 initial state to init
 939          * as expected by IB spec
 940          */
 941         if (smi_reset2init == 0 &&
 942             ibqp->qp_type == IB_QPT_SMI &&
 943             qp_cur_state == IB_QPS_RESET &&
 944             (attr_mask & IB_QP_STATE) &&
 945             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
 946                 struct ib_qp_attr smiqp_attr = {
 947                         .qp_state = IB_QPS_INIT,
 948                         .port_num = my_qp->init_attr.port_num,
 949                         .pkey_index = 0,
 950                         .qkey = 0
 951                 };
 952                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
 953                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
 954                 int smirc = internal_modify_qp(
 955                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
 956                 if (smirc) {
 957                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
 958                                  "ehca_modify_qp() rc=%x", smirc);
 959                         ret = H_PARAMETER;
 960                         goto modify_qp_exit1;
 961                 }
 962                 qp_cur_state = IB_QPS_INIT;
 963                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
 964         }
 965         /* is transmitted current state  equal to "real" current state */
 966         if ((attr_mask & IB_QP_CUR_STATE) &&
 967             qp_cur_state != attr->cur_qp_state) {
 968                 ret = -EINVAL;
 969                 ehca_err(ibqp->device,
 970                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
 971                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
 972                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
 973                 goto modify_qp_exit1;
 974         }
 975
 976         ehca_dbg(ibqp->device,"ehca_qp=%p qp_num=%x current qp_state=%x "
 977                  "new qp_state=%x attribute_mask=%x",
 978                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
 979
 980         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
 981         if (!smi_reset2init &&
 982             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
 983                                 attr_mask)) {
 984                 ret = -EINVAL;
 985                 ehca_err(ibqp->device,
 986                          "Invalid qp transition new_state=%x cur_state=%x "
 987                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
 988                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
 989                 goto modify_qp_exit1;
 990         }
 991
 992         if ((mqpcb->qp_state = ib2ehca_qp_state(qp_new_state)))
 993                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 994         else {
 995                 ret = -EINVAL;
 996                 ehca_err(ibqp->device, "Invalid new qp state=%x "
 997                          "ehca_qp=%p qp_num=%x",
 998                          qp_new_state, my_qp, ibqp->qp_num);
 999                 goto modify_qp_exit1;
1000         }
1001
1002         /* retrieve state transition struct to get req and opt attrs */
1003         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1004         if (statetrans < 0) {
1005                 ret = -EINVAL;
1006                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1007                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1008                          "qp_num=%x", qp_cur_state, qp_new_state,
1009                          statetrans, my_qp, ibqp->qp_num);
1010                 goto modify_qp_exit1;
1011         }
1012
1013         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1014
1015         if (qp_attr_idx < 0) {
1016                 ret = qp_attr_idx;
1017                 ehca_err(ibqp->device,
1018                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1019                          ibqp->qp_type, my_qp, ibqp->qp_num);
1020                 goto modify_qp_exit1;
1021         }
1022
1023         ehca_dbg(ibqp->device,
1024                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1025                  my_qp, ibqp->qp_num, statetrans);
1026
1027         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1028         if ((my_qp->qp_type == IB_QPT_UD ||
1029              my_qp->qp_type == IB_QPT_GSI ||
1030              my_qp->qp_type == IB_QPT_SMI) &&
1031             statetrans == IB_QPST_SQE2RTS) {
1032                 /* mark next free wqe if kernel */
1033                 if (!ibqp->uobject) {
1034                         struct ehca_wqe *wqe;
1035                         /* lock send queue */
1036                         spin_lock_irqsave(&my_qp->spinlock_s, spl_flags);
1037                         squeue_locked = 1;
1038                         /* mark next free wqe */
1039                         wqe = (struct ehca_wqe*)
1040                                 ipz_qeit_get(&my_qp->ipz_squeue);
1041                         wqe->optype = wqe->wqef = 0xff;
1042                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1043                                  ibqp->qp_num, wqe);
1044                 }
1045                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1046                 if (ret) {
1047                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1048                                  "ehca_qp=%p qp_num=%x ret=%x",
1049                                  my_qp, ibqp->qp_num, ret);
1050                         goto modify_qp_exit2;
1051                 }
1052         }
1053
1054         /*
1055          * enable RDMA_Atomic_Control if reset->init und reliable con
1056          * this is necessary since gen2 does not provide that flag,
1057          * but pHyp requires it
1058          */
1059         if (statetrans == IB_QPST_RESET2INIT &&
1060             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1061                 mqpcb->rdma_atomic_ctrl = 3;
1062                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1063         }
1064         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1065         if (statetrans == IB_QPST_INIT2RTR &&
1066             (ibqp->qp_type == IB_QPT_UC) &&
1067             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1068                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1069                 update_mask |=
1070                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1071         }
1072
1073         if (attr_mask & IB_QP_PKEY_INDEX) {
1074                 mqpcb->prim_p_key_idx = attr->pkey_index;
1075                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1076         }
1077         if (attr_mask & IB_QP_PORT) {
1078                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1079                         ret = -EINVAL;
1080                         ehca_err(ibqp->device, "Invalid port=%x. "
1081                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1082                                  attr->port_num, my_qp, ibqp->qp_num,
1083                                  shca->num_ports);
1084                         goto modify_qp_exit2;
1085                 }
1086                 mqpcb->prim_phys_port = attr->port_num;
1087                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1088         }
1089         if (attr_mask & IB_QP_QKEY) {
1090                 mqpcb->qkey = attr->qkey;
1091                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1092         }
1093         if (attr_mask & IB_QP_AV) {
1094                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1095                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1096                                                 init_attr.port_num].rate);
1097
1098                 mqpcb->dlid = attr->ah_attr.dlid;
1099                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1100                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1101                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1102                 mqpcb->service_level = attr->ah_attr.sl;
1103                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1104
1105                 if (ah_mult < ehca_mult)
1106                         mqpcb->max_static_rate = (ah_mult > 0) ?
1107                         ((ehca_mult - 1) / ah_mult) : 0;
1108                 else
1109                         mqpcb->max_static_rate = 0;
1110                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1111
1112                 /*
1113                  * Always supply the GRH flag, even if it's zero, to give the
1114                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1115                  */
1116                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1117
1118                 /*
1119                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1120                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1121                  */
1122                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1123                         mqpcb->send_grh_flag = 1;
1124
1125                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1126                         update_mask |=
1127                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1128
1129                         for (cnt = 0; cnt < 16; cnt++)
1130                                 mqpcb->dest_gid.byte[cnt] =
1131                                         attr->ah_attr.grh.dgid.raw[cnt];
1132
1133                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1134                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1135                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1136                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1137                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1138                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1139                         update_mask |=
1140                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1141                 }
1142         }
1143
1144         if (attr_mask & IB_QP_PATH_MTU) {
1145                 mqpcb->path_mtu = attr->path_mtu;
1146                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1147         }
1148         if (attr_mask & IB_QP_TIMEOUT) {
1149                 mqpcb->timeout = attr->timeout;
1150                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1151         }
1152         if (attr_mask & IB_QP_RETRY_CNT) {
1153                 mqpcb->retry_count = attr->retry_cnt;
1154                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1155         }
1156         if (attr_mask & IB_QP_RNR_RETRY) {
1157                 mqpcb->rnr_retry_count = attr->rnr_retry;
1158                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1159         }
1160         if (attr_mask & IB_QP_RQ_PSN) {
1161                 mqpcb->receive_psn = attr->rq_psn;
1162                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1163         }
1164         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1165                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1166                         attr->max_dest_rd_atomic : 2;
1167                 update_mask |=
1168                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1169         }
1170         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1171                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1172                         attr->max_rd_atomic : 2;
1173                 update_mask |=
1174                         EHCA_BMASK_SET
1175                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1176         }
1177         if (attr_mask & IB_QP_ALT_PATH) {
1178                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1179                 int ehca_mult = ib_rate_to_mult(
1180                         shca->sport[my_qp->init_attr.port_num].rate);
1181
1182                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1183                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1184                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1185                 update_mask |=
1186                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1187                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1188                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1189
1190                 if (ah_mult < ehca_mult)
1191                         mqpcb->max_static_rate = (ah_mult > 0) ?
1192                         ((ehca_mult - 1) / ah_mult) : 0;
1193                 else
1194                         mqpcb->max_static_rate_al = 0;
1195
1196                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1197
1198                 /*
1199                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1200                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1201                  */
1202                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1203                         mqpcb->send_grh_flag_al = 1 << 31;
1204                         update_mask |=
1205                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1206                         mqpcb->source_gid_idx_al =
1207                                 attr->alt_ah_attr.grh.sgid_index;
1208                         update_mask |=
1209                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1210
1211                         for (cnt = 0; cnt < 16; cnt++)
1212                                 mqpcb->dest_gid_al.byte[cnt] =
1213                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1214
1215                         update_mask |=
1216                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1217                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1218                         update_mask |=
1219                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1220                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1221                         update_mask |=
1222                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1223                         mqpcb->traffic_class_al =
1224                                 attr->alt_ah_attr.grh.traffic_class;
1225                         update_mask |=
1226                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1227                 }
1228         }
1229
1230         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1231                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1232                 update_mask |=
1233                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1234         }
1235
1236         if (attr_mask & IB_QP_SQ_PSN) {
1237                 mqpcb->send_psn = attr->sq_psn;
1238                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1239         }
1240
1241         if (attr_mask & IB_QP_DEST_QPN) {
1242                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1243                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1244         }
1245
1246         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1247                 mqpcb->path_migration_state = attr->path_mig_state;
1248                 update_mask |=
1249                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1250         }
1251
1252         if (attr_mask & IB_QP_CAP) {
1253                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1254                 update_mask |=
1255                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1256                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1257                 update_mask |=
1258                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1259                 /* no support for max_send/recv_sge yet */
1260         }
1261
1262         if (ehca_debug_level)
1263                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1264
1265         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1266                                  my_qp->ipz_qp_handle,
1267                                  &my_qp->pf,
1268                                  update_mask,
1269                                  mqpcb, my_qp->galpas.kernel);
1270
1271         if (h_ret != H_SUCCESS) {
1272                 ret = ehca2ib_return_code(h_ret);
1273                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1274                          "ehca_qp=%p qp_num=%x",h_ret, my_qp, ibqp->qp_num);
1275                 goto modify_qp_exit2;
1276         }
1277
1278         if ((my_qp->qp_type == IB_QPT_UD ||
1279              my_qp->qp_type == IB_QPT_GSI ||
1280              my_qp->qp_type == IB_QPT_SMI) &&
1281             statetrans == IB_QPST_SQE2RTS) {
1282                 /* doorbell to reprocessing wqes */
1283                 iosync(); /* serialize GAL register access */
1284                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1285                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1286         }
1287
1288         if (statetrans == IB_QPST_RESET2INIT ||
1289             statetrans == IB_QPST_INIT2INIT) {
1290                 mqpcb->qp_enable = 1;
1291                 mqpcb->qp_state = EHCA_QPS_INIT;
1292                 update_mask = 0;
1293                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1294
1295                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1296                                          my_qp->ipz_qp_handle,
1297                                          &my_qp->pf,
1298                                          update_mask,
1299                                          mqpcb,
1300                                          my_qp->galpas.kernel);
1301
1302                 if (h_ret != H_SUCCESS) {
1303                         ret = ehca2ib_return_code(h_ret);
1304                         ehca_err(ibqp->device, "ENABLE in context of "
1305                                  "RESET_2_INIT failed! Maybe you didn't get "
1306                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1307                                  h_ret, my_qp, ibqp->qp_num);
1308                         goto modify_qp_exit2;
1309                 }
1310         }
1311
1312         if (statetrans == IB_QPST_ANY2RESET) {
1313                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1314                 ipz_qeit_reset(&my_qp->ipz_squeue);
1315         }
1316
1317         if (attr_mask & IB_QP_QKEY)
1318                 my_qp->qkey = attr->qkey;
1319
1320 modify_qp_exit2:
1321         if (squeue_locked) { /* this means: sqe -> rts */
1322                 spin_unlock_irqrestore(&my_qp->spinlock_s, spl_flags);
1323                 my_qp->sqerr_purgeflag = 1;
1324         }
1325
1326 modify_qp_exit1:
1327         ehca_free_fw_ctrlblock(mqpcb);
1328
1329         return ret;
1330 }
1331
1332 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1333                    struct ib_udata *udata)
1334 {
1335         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1336         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1337                                              ib_pd);
1338         u32 cur_pid = current->tgid;
1339
1340         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1341             my_pd->ownpid != cur_pid) {
1342                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1343                          cur_pid, my_pd->ownpid);
1344                 return -EINVAL;
1345         }
1346
1347         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1348 }
1349
1350 int ehca_query_qp(struct ib_qp *qp,
1351                   struct ib_qp_attr *qp_attr,
1352                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1353 {
1354         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1355         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1356                                              ib_pd);
1357         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1358                                               ib_device);
1359         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1360         struct hcp_modify_qp_control_block *qpcb;
1361         u32 cur_pid = current->tgid;
1362         int cnt, ret = 0;
1363         u64 h_ret;
1364
1365         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1366             my_pd->ownpid != cur_pid) {
1367                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1368                          cur_pid, my_pd->ownpid);
1369                 return -EINVAL;
1370         }
1371
1372         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1373                 ehca_err(qp->device,"Invalid attribute mask "
1374                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1375                          my_qp, qp->qp_num, qp_attr_mask);
1376                 return -EINVAL;
1377         }
1378
1379         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1380         if (!qpcb) {
1381                 ehca_err(qp->device,"Out of memory for qpcb "
1382                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1383                 return -ENOMEM;
1384         }
1385
1386         h_ret = hipz_h_query_qp(adapter_handle,
1387                                 my_qp->ipz_qp_handle,
1388                                 &my_qp->pf,
1389                                 qpcb, my_qp->galpas.kernel);
1390
1391         if (h_ret != H_SUCCESS) {
1392                 ret = ehca2ib_return_code(h_ret);
1393                 ehca_err(qp->device,"hipz_h_query_qp() failed "
1394                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1395                          my_qp, qp->qp_num, h_ret);
1396                 goto query_qp_exit1;
1397         }
1398
1399         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1400         qp_attr->qp_state = qp_attr->cur_qp_state;
1401
1402         if (qp_attr->cur_qp_state == -EINVAL) {
1403                 ret = -EINVAL;
1404                 ehca_err(qp->device,"Got invalid ehca_qp_state=%x "
1405                          "ehca_qp=%p qp_num=%x",
1406                          qpcb->qp_state, my_qp, qp->qp_num);
1407                 goto query_qp_exit1;
1408         }
1409
1410         if (qp_attr->qp_state == IB_QPS_SQD)
1411                 qp_attr->sq_draining = 1;
1412
1413         qp_attr->qkey = qpcb->qkey;
1414         qp_attr->path_mtu = qpcb->path_mtu;
1415         qp_attr->path_mig_state = qpcb->path_migration_state;
1416         qp_attr->rq_psn = qpcb->receive_psn;
1417         qp_attr->sq_psn = qpcb->send_psn;
1418         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1419         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1420         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1421         /* UD_AV CIRCUMVENTION */
1422         if (my_qp->qp_type == IB_QPT_UD) {
1423                 qp_attr->cap.max_send_sge =
1424                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1425                 qp_attr->cap.max_recv_sge =
1426                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1427         } else {
1428                 qp_attr->cap.max_send_sge =
1429                         qpcb->actual_nr_sges_in_sq_wqe;
1430                 qp_attr->cap.max_recv_sge =
1431                         qpcb->actual_nr_sges_in_rq_wqe;
1432         }
1433
1434         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1435         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1436
1437         qp_attr->pkey_index =
1438                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1439
1440         qp_attr->port_num =
1441                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1442
1443         qp_attr->timeout = qpcb->timeout;
1444         qp_attr->retry_cnt = qpcb->retry_count;
1445         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1446
1447         qp_attr->alt_pkey_index =
1448                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1449
1450         qp_attr->alt_port_num = qpcb->alt_phys_port;
1451         qp_attr->alt_timeout = qpcb->timeout_al;
1452
1453         /* primary av */
1454         qp_attr->ah_attr.sl = qpcb->service_level;
1455
1456         if (qpcb->send_grh_flag) {
1457                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1458         }
1459
1460         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1461         qp_attr->ah_attr.dlid = qpcb->dlid;
1462         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1463         qp_attr->ah_attr.port_num = qp_attr->port_num;
1464
1465         /* primary GRH */
1466         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1467         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1468         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1469         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1470
1471         for (cnt = 0; cnt < 16; cnt++)
1472                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1473                         qpcb->dest_gid.byte[cnt];
1474
1475         /* alternate AV */
1476         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1477         if (qpcb->send_grh_flag_al) {
1478                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1479         }
1480
1481         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1482         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1483         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1484
1485         /* alternate GRH */
1486         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1487         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1488         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1489         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1490
1491         for (cnt = 0; cnt < 16; cnt++)
1492                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1493                         qpcb->dest_gid_al.byte[cnt];
1494
1495         /* return init attributes given in ehca_create_qp */
1496         if (qp_init_attr)
1497                 *qp_init_attr = my_qp->init_attr;
1498
1499         if (ehca_debug_level)
1500                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1501
1502 query_qp_exit1:
1503         ehca_free_fw_ctrlblock(qpcb);
1504
1505         return ret;
1506 }
1507
1508 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1509                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1510 {
1511         struct ehca_qp *my_qp =
1512                 container_of(ibsrq, struct ehca_qp, ib_srq);
1513         struct ehca_pd *my_pd =
1514                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1515         struct ehca_shca *shca =
1516                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1517         struct hcp_modify_qp_control_block *mqpcb;
1518         u64 update_mask;
1519         u64 h_ret;
1520         int ret = 0;
1521
1522         u32 cur_pid = current->tgid;
1523         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1524             my_pd->ownpid != cur_pid) {
1525                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1526                          cur_pid, my_pd->ownpid);
1527                 return -EINVAL;
1528         }
1529
1530         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1531         if (!mqpcb) {
1532                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1533                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1534                 return -ENOMEM;
1535         }
1536
1537         update_mask = 0;
1538         if (attr_mask & IB_SRQ_LIMIT) {
1539                 attr_mask &= ~IB_SRQ_LIMIT;
1540                 update_mask |=
1541                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1542                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1543                 mqpcb->curr_srq_limit =
1544                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1545                 mqpcb->qp_aff_asyn_ev_log_reg =
1546                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1547         }
1548
1549         /* by now, all bits in attr_mask should have been cleared */
1550         if (attr_mask) {
1551                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1552                          "attr_mask=%x", attr_mask);
1553                 ret = -EINVAL;
1554                 goto modify_srq_exit0;
1555         }
1556
1557         if (ehca_debug_level)
1558                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1559
1560         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1561                                  NULL, update_mask, mqpcb,
1562                                  my_qp->galpas.kernel);
1563
1564         if (h_ret != H_SUCCESS) {
1565                 ret = ehca2ib_return_code(h_ret);
1566                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed rc=%lx "
1567                          "ehca_qp=%p qp_num=%x",
1568                          h_ret, my_qp, my_qp->real_qp_num);
1569         }
1570
1571 modify_srq_exit0:
1572         ehca_free_fw_ctrlblock(mqpcb);
1573
1574         return ret;
1575 }
1576
1577 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1578 {
1579         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1580         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1581         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1582                                               ib_device);
1583         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1584         struct hcp_modify_qp_control_block *qpcb;
1585         u32 cur_pid = current->tgid;
1586         int ret = 0;
1587         u64 h_ret;
1588
1589         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1590             my_pd->ownpid != cur_pid) {
1591                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1592                          cur_pid, my_pd->ownpid);
1593                 return -EINVAL;
1594         }
1595
1596         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1597         if (!qpcb) {
1598                 ehca_err(srq->device, "Out of memory for qpcb "
1599                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1600                 return -ENOMEM;
1601         }
1602
1603         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1604                                 NULL, qpcb, my_qp->galpas.kernel);
1605
1606         if (h_ret != H_SUCCESS) {
1607                 ret = ehca2ib_return_code(h_ret);
1608                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1609                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1610                          my_qp, my_qp->real_qp_num, h_ret);
1611                 goto query_srq_exit1;
1612         }
1613
1614         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1615         srq_attr->srq_limit = EHCA_BMASK_GET(
1616                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1617
1618         if (ehca_debug_level)
1619                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1620
1621 query_srq_exit1:
1622         ehca_free_fw_ctrlblock(qpcb);
1623
1624         return ret;
1625 }
1626
1627 int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1628                         struct ib_uobject *uobject)
1629 {
1630         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1631         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1632                                              ib_pd);
1633         u32 cur_pid = current->tgid;
1634         u32 qp_num = my_qp->real_qp_num;
1635         int ret;
1636         u64 h_ret;
1637         u8 port_num;
1638         enum ib_qp_type qp_type;
1639         unsigned long flags;
1640
1641         if (uobject) {
1642                 if (my_qp->mm_count_galpa ||
1643                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1644                         ehca_err(dev, "Resources still referenced in "
1645                                  "user space qp_num=%x", qp_num);
1646                         return -EINVAL;
1647                 }
1648                 if (my_pd->ownpid != cur_pid) {
1649                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1650                                  cur_pid, my_pd->ownpid);
1651                         return -EINVAL;
1652                 }
1653         }
1654
1655         if (my_qp->send_cq) {
1656                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1657                 if (ret) {
1658                         ehca_err(dev, "Couldn't unassign qp from "
1659                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1660                                  qp_num, my_qp->send_cq->cq_number);
1661                         return ret;
1662                 }
1663         }
1664
1665         spin_lock_irqsave(&ehca_qp_idr_lock, flags);
1666         idr_remove(&ehca_qp_idr, my_qp->token);
1667         spin_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1668
1669         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1670         if (h_ret != H_SUCCESS) {
1671                 ehca_err(dev, "hipz_h_destroy_qp() failed rc=%lx "
1672                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1673                 return ehca2ib_return_code(h_ret);
1674         }
1675
1676         port_num = my_qp->init_attr.port_num;
1677         qp_type  = my_qp->init_attr.qp_type;
1678
1679         /* no support for IB_QPT_SMI yet */
1680         if (qp_type == IB_QPT_GSI) {
1681                 struct ib_event event;
1682                 ehca_info(dev, "device %s: port %x is inactive.",
1683                           shca->ib_device.name, port_num);
1684                 event.device = &shca->ib_device;
1685                 event.event = IB_EVENT_PORT_ERR;
1686                 event.element.port_num = port_num;
1687                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1688                 ib_dispatch_event(&event);
1689         }
1690
1691         if (HAS_RQ(my_qp))
1692                 ipz_queue_dtor(&my_qp->ipz_rqueue);
1693         if (HAS_SQ(my_qp))
1694                 ipz_queue_dtor(&my_qp->ipz_squeue);
1695         kmem_cache_free(qp_cache, my_qp);
1696         return 0;
1697 }
1698
1699 int ehca_destroy_qp(struct ib_qp *qp)
1700 {
1701         return internal_destroy_qp(qp->device,
1702                                    container_of(qp, struct ehca_qp, ib_qp),
1703                                    qp->uobject);
1704 }
1705
1706 int ehca_destroy_srq(struct ib_srq *srq)
1707 {
1708         return internal_destroy_qp(srq->device,
1709                                    container_of(srq, struct ehca_qp, ib_srq),
1710                                    srq->uobject);
1711 }
1712
1713 int ehca_init_qp_cache(void)
1714 {
1715         qp_cache = kmem_cache_create("ehca_cache_qp",
1716                                      sizeof(struct ehca_qp), 0,
1717                                      SLAB_HWCACHE_ALIGN,
1718                                      NULL, NULL);
1719         if (!qp_cache)
1720                 return -ENOMEM;
1721         return 0;
1722 }
1723
1724 void ehca_cleanup_qp_cache(void)
1725 {
1726         if (qp_cache)
1727                 kmem_cache_destroy(qp_cache);
1728 }