2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1994 Waldorf GMBH
7 * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2001, 2002, 2003 Ralf Baechle
8 * Copyright (C) 1996 Paul M. Antoine
9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
10 * Copyright (C) 2004 Maciej W. Rozycki
12 #ifndef __ASM_CPU_INFO_H
13 #define __ASM_CPU_INFO_H
15 #include <linux/config.h>
16 #include <asm/cache.h>
18 #ifdef CONFIG_SGI_IP27
19 #include <asm/sn/types.h>
23 * Descriptor for a cache
26 unsigned short linesz; /* Size of line in bytes */
27 unsigned short ways; /* Number of ways */
28 unsigned short sets; /* Number of lines per set */
29 unsigned int waysize; /* Bytes per way */
30 unsigned int waybit; /* Bits to select in a cache set */
31 unsigned int flags; /* Flags describing cache properties */
37 #define MIPS_CACHE_NOT_PRESENT 0x00000001
38 #define MIPS_CACHE_VTAG 0x00000002 /* Virtually tagged cache */
39 #define MIPS_CACHE_ALIASES 0x00000004 /* Cache could have aliases */
40 #define MIPS_CACHE_IC_F_DC 0x00000008 /* Ic can refill from D-cache */
41 #define MIPS_IC_SNOOPS_REMOTE 0x00000010 /* Ic snoops remote stores */
42 #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */
45 unsigned long udelay_val;
46 unsigned long asid_cache;
47 #if defined(CONFIG_SGI_IP27)
48 // cpuid_t p_cpuid; /* PROM assigned cpuid */
49 cnodeid_t p_nodeid; /* my node ID in compact-id-space */
50 nasid_t p_nasid; /* my node ID in numa-as-id-space */
51 unsigned char p_slice; /* Physical position on node board */
54 unsigned long loops_per_sec;
55 unsigned long ipi_count;
56 unsigned long irq_attempt[NR_IRQS];
57 unsigned long smp_local_irq_count;
58 unsigned long prof_multiplier;
59 unsigned long prof_counter;
63 * Capability and feature descriptor structure for MIPS CPU
65 unsigned long options;
67 unsigned int processor_id;
72 struct cache_desc icache; /* Primary I-cache */
73 struct cache_desc dcache; /* Primary D or combined I/D cache */
74 struct cache_desc scache; /* Secondary cache */
75 struct cache_desc tcache; /* Tertiary/split secondary cache */
76 void *data; /* Additional data */
77 } __attribute__((aligned(SMP_CACHE_BYTES)));
79 extern struct cpuinfo_mips cpu_data[];
80 #define current_cpu_data cpu_data[smp_processor_id()]
82 extern void cpu_probe(void);
83 extern void cpu_report(void);
85 #endif /* __ASM_CPU_INFO_H */