2 * linux/drivers/serial/pxa.c
4 * Based on drivers/serial/8250.c by Russell King.
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
27 #include <linux/config.h>
29 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/serial_reg.h>
39 #include <linux/circ_buf.h>
40 #include <linux/delay.h>
41 #include <linux/interrupt.h>
42 #include <linux/platform_device.h>
43 #include <linux/tty.h>
44 #include <linux/tty_flip.h>
45 #include <linux/serial_core.h>
48 #include <asm/hardware.h>
50 #include <asm/arch/pxa-regs.h>
53 struct uart_pxa_port {
54 struct uart_port port;
58 unsigned int lsr_break_flag;
63 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
66 return readl(up->port.membase + offset);
69 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
72 writel(value, up->port.membase + offset);
75 static void serial_pxa_enable_ms(struct uart_port *port)
77 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
79 up->ier |= UART_IER_MSI;
80 serial_out(up, UART_IER, up->ier);
83 static void serial_pxa_stop_tx(struct uart_port *port)
85 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
87 if (up->ier & UART_IER_THRI) {
88 up->ier &= ~UART_IER_THRI;
89 serial_out(up, UART_IER, up->ier);
93 static void serial_pxa_stop_rx(struct uart_port *port)
95 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
97 up->ier &= ~UART_IER_RLSI;
98 up->port.read_status_mask &= ~UART_LSR_DR;
99 serial_out(up, UART_IER, up->ier);
103 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
105 struct tty_struct *tty = up->port.info->tty;
106 unsigned int ch, flag;
110 ch = serial_in(up, UART_RX);
112 up->port.icount.rx++;
114 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
115 UART_LSR_FE | UART_LSR_OE))) {
117 * For statistics only
119 if (*status & UART_LSR_BI) {
120 *status &= ~(UART_LSR_FE | UART_LSR_PE);
121 up->port.icount.brk++;
123 * We do the SysRQ and SAK checking
124 * here because otherwise the break
125 * may get masked by ignore_status_mask
126 * or read_status_mask.
128 if (uart_handle_break(&up->port))
130 } else if (*status & UART_LSR_PE)
131 up->port.icount.parity++;
132 else if (*status & UART_LSR_FE)
133 up->port.icount.frame++;
134 if (*status & UART_LSR_OE)
135 up->port.icount.overrun++;
138 * Mask off conditions which should be ignored.
140 *status &= up->port.read_status_mask;
142 #ifdef CONFIG_SERIAL_PXA_CONSOLE
143 if (up->port.line == up->port.cons->index) {
144 /* Recover the break flag from console xmit */
145 *status |= up->lsr_break_flag;
146 up->lsr_break_flag = 0;
149 if (*status & UART_LSR_BI) {
151 } else if (*status & UART_LSR_PE)
153 else if (*status & UART_LSR_FE)
157 if (uart_handle_sysrq_char(&up->port, ch, regs))
160 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
163 *status = serial_in(up, UART_LSR);
164 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
165 tty_flip_buffer_push(tty);
168 static void transmit_chars(struct uart_pxa_port *up)
170 struct circ_buf *xmit = &up->port.info->xmit;
173 if (up->port.x_char) {
174 serial_out(up, UART_TX, up->port.x_char);
175 up->port.icount.tx++;
179 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
180 serial_pxa_stop_tx(&up->port);
184 count = up->port.fifosize / 2;
186 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
187 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
188 up->port.icount.tx++;
189 if (uart_circ_empty(xmit))
191 } while (--count > 0);
193 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
194 uart_write_wakeup(&up->port);
197 if (uart_circ_empty(xmit))
198 serial_pxa_stop_tx(&up->port);
201 static void serial_pxa_start_tx(struct uart_port *port)
203 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
205 if (!(up->ier & UART_IER_THRI)) {
206 up->ier |= UART_IER_THRI;
207 serial_out(up, UART_IER, up->ier);
211 static inline void check_modem_status(struct uart_pxa_port *up)
215 status = serial_in(up, UART_MSR);
217 if ((status & UART_MSR_ANY_DELTA) == 0)
220 if (status & UART_MSR_TERI)
221 up->port.icount.rng++;
222 if (status & UART_MSR_DDSR)
223 up->port.icount.dsr++;
224 if (status & UART_MSR_DDCD)
225 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
226 if (status & UART_MSR_DCTS)
227 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
229 wake_up_interruptible(&up->port.info->delta_msr_wait);
233 * This handles the interrupt from one port.
235 static inline irqreturn_t
236 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
238 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
239 unsigned int iir, lsr;
241 iir = serial_in(up, UART_IIR);
242 if (iir & UART_IIR_NO_INT)
244 lsr = serial_in(up, UART_LSR);
245 if (lsr & UART_LSR_DR)
246 receive_chars(up, &lsr, regs);
247 check_modem_status(up);
248 if (lsr & UART_LSR_THRE)
253 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
255 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
259 spin_lock_irqsave(&up->port.lock, flags);
260 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
261 spin_unlock_irqrestore(&up->port.lock, flags);
266 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
268 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
269 unsigned char status;
272 status = serial_in(up, UART_MSR);
275 if (status & UART_MSR_DCD)
277 if (status & UART_MSR_RI)
279 if (status & UART_MSR_DSR)
281 if (status & UART_MSR_CTS)
286 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
288 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
289 unsigned char mcr = 0;
291 if (mctrl & TIOCM_RTS)
293 if (mctrl & TIOCM_DTR)
295 if (mctrl & TIOCM_OUT1)
296 mcr |= UART_MCR_OUT1;
297 if (mctrl & TIOCM_OUT2)
298 mcr |= UART_MCR_OUT2;
299 if (mctrl & TIOCM_LOOP)
300 mcr |= UART_MCR_LOOP;
304 serial_out(up, UART_MCR, mcr);
307 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
309 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
312 spin_lock_irqsave(&up->port.lock, flags);
313 if (break_state == -1)
314 up->lcr |= UART_LCR_SBC;
316 up->lcr &= ~UART_LCR_SBC;
317 serial_out(up, UART_LCR, up->lcr);
318 spin_unlock_irqrestore(&up->port.lock, flags);
322 static void serial_pxa_dma_init(struct pxa_uart *up)
325 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
329 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
332 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
338 pxa_free_dma(up->txdma);
340 pxa_free_dma(up->rxdma);
346 static int serial_pxa_startup(struct uart_port *port)
348 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
352 if (port->line == 3) /* HWUART */
353 up->mcr |= UART_MCR_AFE;
360 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
365 * Clear the FIFO buffers and disable them.
366 * (they will be reenabled in set_termios())
368 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
369 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
370 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
371 serial_out(up, UART_FCR, 0);
374 * Clear the interrupt registers.
376 (void) serial_in(up, UART_LSR);
377 (void) serial_in(up, UART_RX);
378 (void) serial_in(up, UART_IIR);
379 (void) serial_in(up, UART_MSR);
382 * Now, initialize the UART
384 serial_out(up, UART_LCR, UART_LCR_WLEN8);
386 spin_lock_irqsave(&up->port.lock, flags);
387 up->port.mctrl |= TIOCM_OUT2;
388 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
389 spin_unlock_irqrestore(&up->port.lock, flags);
392 * Finally, enable interrupts. Note: Modem status interrupts
393 * are set via set_termios(), which will be occuring imminently
394 * anyway, so we don't enable them here.
396 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
397 serial_out(up, UART_IER, up->ier);
400 * And clear the interrupt registers again for luck.
402 (void) serial_in(up, UART_LSR);
403 (void) serial_in(up, UART_RX);
404 (void) serial_in(up, UART_IIR);
405 (void) serial_in(up, UART_MSR);
410 static void serial_pxa_shutdown(struct uart_port *port)
412 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
415 free_irq(up->port.irq, up);
418 * Disable interrupts from this port
421 serial_out(up, UART_IER, 0);
423 spin_lock_irqsave(&up->port.lock, flags);
424 up->port.mctrl &= ~TIOCM_OUT2;
425 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
426 spin_unlock_irqrestore(&up->port.lock, flags);
429 * Disable break condition and FIFOs
431 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
432 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
433 UART_FCR_CLEAR_RCVR |
434 UART_FCR_CLEAR_XMIT);
435 serial_out(up, UART_FCR, 0);
439 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
442 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
443 unsigned char cval, fcr = 0;
445 unsigned int baud, quot;
447 switch (termios->c_cflag & CSIZE) {
449 cval = UART_LCR_WLEN5;
452 cval = UART_LCR_WLEN6;
455 cval = UART_LCR_WLEN7;
459 cval = UART_LCR_WLEN8;
463 if (termios->c_cflag & CSTOPB)
464 cval |= UART_LCR_STOP;
465 if (termios->c_cflag & PARENB)
466 cval |= UART_LCR_PARITY;
467 if (!(termios->c_cflag & PARODD))
468 cval |= UART_LCR_EPAR;
471 * Ask the core to calculate the divisor for us.
473 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
474 quot = uart_get_divisor(port, baud);
476 if ((up->port.uartclk / quot) < (2400 * 16))
477 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
478 else if ((up->port.uartclk / quot) < (230400 * 16))
479 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
481 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
484 * Ok, we're now changing the port state. Do it with
485 * interrupts disabled.
487 spin_lock_irqsave(&up->port.lock, flags);
490 * Ensure the port will be enabled.
491 * This is required especially for serial console.
496 * Update the per-port timeout.
498 uart_update_timeout(port, termios->c_cflag, baud);
500 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
501 if (termios->c_iflag & INPCK)
502 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
503 if (termios->c_iflag & (BRKINT | PARMRK))
504 up->port.read_status_mask |= UART_LSR_BI;
507 * Characters to ignore
509 up->port.ignore_status_mask = 0;
510 if (termios->c_iflag & IGNPAR)
511 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
512 if (termios->c_iflag & IGNBRK) {
513 up->port.ignore_status_mask |= UART_LSR_BI;
515 * If we're ignoring parity and break indicators,
516 * ignore overruns too (for real raw support).
518 if (termios->c_iflag & IGNPAR)
519 up->port.ignore_status_mask |= UART_LSR_OE;
523 * ignore all characters if CREAD is not set
525 if ((termios->c_cflag & CREAD) == 0)
526 up->port.ignore_status_mask |= UART_LSR_DR;
529 * CTS flow control flag and modem status interrupts
531 up->ier &= ~UART_IER_MSI;
532 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
533 up->ier |= UART_IER_MSI;
535 serial_out(up, UART_IER, up->ier);
537 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
538 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
539 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
540 serial_out(up, UART_LCR, cval); /* reset DLAB */
541 up->lcr = cval; /* Save LCR */
542 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
543 serial_out(up, UART_FCR, fcr);
544 spin_unlock_irqrestore(&up->port.lock, flags);
548 serial_pxa_pm(struct uart_port *port, unsigned int state,
549 unsigned int oldstate)
551 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
552 pxa_set_cken(up->cken, !state);
557 static void serial_pxa_release_port(struct uart_port *port)
561 static int serial_pxa_request_port(struct uart_port *port)
566 static void serial_pxa_config_port(struct uart_port *port, int flags)
568 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
569 up->port.type = PORT_PXA;
573 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
575 /* we don't want the core code to modify any port params */
580 serial_pxa_type(struct uart_port *port)
582 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
586 #ifdef CONFIG_SERIAL_PXA_CONSOLE
588 static struct uart_pxa_port serial_pxa_ports[];
589 static struct uart_driver serial_pxa_reg;
591 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
594 * Wait for transmitter & holding register to empty
596 static inline void wait_for_xmitr(struct uart_pxa_port *up)
598 unsigned int status, tmout = 10000;
600 /* Wait up to 10ms for the character(s) to be sent. */
602 status = serial_in(up, UART_LSR);
604 if (status & UART_LSR_BI)
605 up->lsr_break_flag = UART_LSR_BI;
610 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
612 /* Wait up to 1s for flow control if necessary */
613 if (up->port.flags & UPF_CONS_FLOW) {
616 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
621 static void serial_pxa_console_putchar(struct uart_port *port, int ch)
623 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
626 serial_out(up, UART_TX, ch);
630 * Print a string to the serial port trying not to disturb
631 * any possible real use of the port...
633 * The console_lock must be held when we get here.
636 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
638 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
642 * First save the IER then disable the interrupts
644 ier = serial_in(up, UART_IER);
645 serial_out(up, UART_IER, UART_IER_UUE);
647 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
650 * Finally, wait for transmitter to become empty
651 * and restore the IER
654 serial_out(up, UART_IER, ier);
658 serial_pxa_console_setup(struct console *co, char *options)
660 struct uart_pxa_port *up;
666 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
668 up = &serial_pxa_ports[co->index];
671 uart_parse_options(options, &baud, &parity, &bits, &flow);
673 return uart_set_options(&up->port, co, baud, parity, bits, flow);
676 static struct console serial_pxa_console = {
678 .write = serial_pxa_console_write,
679 .device = uart_console_device,
680 .setup = serial_pxa_console_setup,
681 .flags = CON_PRINTBUFFER,
683 .data = &serial_pxa_reg,
687 serial_pxa_console_init(void)
689 register_console(&serial_pxa_console);
693 console_initcall(serial_pxa_console_init);
695 #define PXA_CONSOLE &serial_pxa_console
697 #define PXA_CONSOLE NULL
700 struct uart_ops serial_pxa_pops = {
701 .tx_empty = serial_pxa_tx_empty,
702 .set_mctrl = serial_pxa_set_mctrl,
703 .get_mctrl = serial_pxa_get_mctrl,
704 .stop_tx = serial_pxa_stop_tx,
705 .start_tx = serial_pxa_start_tx,
706 .stop_rx = serial_pxa_stop_rx,
707 .enable_ms = serial_pxa_enable_ms,
708 .break_ctl = serial_pxa_break_ctl,
709 .startup = serial_pxa_startup,
710 .shutdown = serial_pxa_shutdown,
711 .set_termios = serial_pxa_set_termios,
713 .type = serial_pxa_type,
714 .release_port = serial_pxa_release_port,
715 .request_port = serial_pxa_request_port,
716 .config_port = serial_pxa_config_port,
717 .verify_port = serial_pxa_verify_port,
720 static struct uart_pxa_port serial_pxa_ports[] = {
723 .cken = CKEN6_FFUART,
727 .membase = (void *)&FFUART,
728 .mapbase = __PREG(FFUART),
730 .uartclk = 921600 * 16,
732 .ops = &serial_pxa_pops,
737 .cken = CKEN7_BTUART,
741 .membase = (void *)&BTUART,
742 .mapbase = __PREG(BTUART),
744 .uartclk = 921600 * 16,
746 .ops = &serial_pxa_pops,
751 .cken = CKEN5_STUART,
755 .membase = (void *)&STUART,
756 .mapbase = __PREG(STUART),
758 .uartclk = 921600 * 16,
760 .ops = &serial_pxa_pops,
765 .cken = CKEN4_HWUART,
769 .membase = (void *)&HWUART,
770 .mapbase = __PREG(HWUART),
772 .uartclk = 921600 * 16,
774 .ops = &serial_pxa_pops,
780 static struct uart_driver serial_pxa_reg = {
781 .owner = THIS_MODULE,
782 .driver_name = "PXA serial",
783 .devfs_name = "tts/",
787 .nr = ARRAY_SIZE(serial_pxa_ports),
791 static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
793 struct uart_pxa_port *sport = platform_get_drvdata(dev);
796 uart_suspend_port(&serial_pxa_reg, &sport->port);
801 static int serial_pxa_resume(struct platform_device *dev)
803 struct uart_pxa_port *sport = platform_get_drvdata(dev);
806 uart_resume_port(&serial_pxa_reg, &sport->port);
811 static int serial_pxa_probe(struct platform_device *dev)
813 serial_pxa_ports[dev->id].port.dev = &dev->dev;
814 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
815 platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
819 static int serial_pxa_remove(struct platform_device *dev)
821 struct uart_pxa_port *sport = platform_get_drvdata(dev);
823 platform_set_drvdata(dev, NULL);
826 uart_remove_one_port(&serial_pxa_reg, &sport->port);
831 static struct platform_driver serial_pxa_driver = {
832 .probe = serial_pxa_probe,
833 .remove = serial_pxa_remove,
835 .suspend = serial_pxa_suspend,
836 .resume = serial_pxa_resume,
838 .name = "pxa2xx-uart",
842 int __init serial_pxa_init(void)
846 ret = uart_register_driver(&serial_pxa_reg);
850 ret = platform_driver_register(&serial_pxa_driver);
852 uart_unregister_driver(&serial_pxa_reg);
857 void __exit serial_pxa_exit(void)
859 platform_driver_unregister(&serial_pxa_driver);
860 uart_unregister_driver(&serial_pxa_reg);
863 module_init(serial_pxa_init);
864 module_exit(serial_pxa_exit);
866 MODULE_LICENSE("GPL");