2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
19 #include <linux/cache.h>
20 #include <linux/dma-mapping.h>
22 #include <linux/module.h>
23 #include <linux/spinlock.h>
24 #include <linux/string.h>
25 #include <linux/types.h>
26 #include <linux/ctype.h>
30 #include <asm/scatterlist.h>
32 #include <linux/init.h>
33 #include <linux/bootmem.h>
34 #include <linux/iommu-helper.h>
36 #define OFFSET(val,align) ((unsigned long) \
37 ( (val) & ( (align) - 1)))
39 #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
40 #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
43 * Maximum allowable number of contiguous slabs to map,
44 * must be a power of 2. What is the appropriate value ?
45 * The complexity of {map,unmap}_single is linearly dependent on this value.
47 #define IO_TLB_SEGSIZE 128
50 * log of the size of each IO TLB slab. The number of slabs is command line
53 #define IO_TLB_SHIFT 11
55 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
58 * Minimum IO TLB size to bother booting with. Systems with mainly
59 * 64bit capable cards will only lightly use the swiotlb. If we can't
60 * allocate a contiguous 1MB, we're probably in trouble anyway.
62 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
65 * Enumeration for sync targets
67 enum dma_sync_target {
75 * Used to do a quick range check in swiotlb_unmap_single and
76 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
79 static char *io_tlb_start, *io_tlb_end;
82 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
83 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
85 static unsigned long io_tlb_nslabs;
88 * When the IOMMU overflows we return a fallback buffer. This sets the size.
90 static unsigned long io_tlb_overflow = 32*1024;
92 void *io_tlb_overflow_buffer;
95 * This is a free list describing the number of free entries available from
98 static unsigned int *io_tlb_list;
99 static unsigned int io_tlb_index;
102 * We need to save away the original address corresponding to a mapped entry
103 * for the sync operations.
105 static unsigned char **io_tlb_orig_addr;
108 * Protect the above data structures in the map and unmap calls
110 static DEFINE_SPINLOCK(io_tlb_lock);
113 setup_io_tlb_npages(char *str)
116 io_tlb_nslabs = simple_strtoul(str, &str, 0);
117 /* avoid tail segment of size < IO_TLB_SEGSIZE */
118 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
122 if (!strcmp(str, "force"))
126 __setup("swiotlb=", setup_io_tlb_npages);
127 /* make io_tlb_overflow tunable too? */
130 * Statically reserve bounce buffer space and initialize bounce buffer data
131 * structures for the software IO TLB used to implement the DMA API.
134 swiotlb_init_with_default_size(size_t default_size)
136 unsigned long i, bytes;
138 if (!io_tlb_nslabs) {
139 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
140 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
143 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
146 * Get IO TLB memory from the low pages
148 io_tlb_start = alloc_bootmem_low_pages(bytes);
150 panic("Cannot allocate SWIOTLB buffer");
151 io_tlb_end = io_tlb_start + bytes;
154 * Allocate and initialize the free list array. This array is used
155 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
156 * between io_tlb_start and io_tlb_end.
158 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
159 for (i = 0; i < io_tlb_nslabs; i++)
160 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
162 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
165 * Get the overflow emergency buffer
167 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
168 if (!io_tlb_overflow_buffer)
169 panic("Cannot allocate SWIOTLB overflow buffer!\n");
171 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
172 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
178 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
182 * Systems with larger DMA zones (those that don't support ISA) can
183 * initialize the swiotlb later using the slab allocator if needed.
184 * This should be just like above, but with some error catching.
187 swiotlb_late_init_with_default_size(size_t default_size)
189 unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
192 if (!io_tlb_nslabs) {
193 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
194 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
198 * Get IO TLB memory from the low pages
200 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
201 io_tlb_nslabs = SLABS_PER_PAGE << order;
202 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
204 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
205 io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
215 if (order != get_order(bytes)) {
216 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
217 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
218 io_tlb_nslabs = SLABS_PER_PAGE << order;
219 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
221 io_tlb_end = io_tlb_start + bytes;
222 memset(io_tlb_start, 0, bytes);
225 * Allocate and initialize the free list array. This array is used
226 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
227 * between io_tlb_start and io_tlb_end.
229 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
230 get_order(io_tlb_nslabs * sizeof(int)));
234 for (i = 0; i < io_tlb_nslabs; i++)
235 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
238 io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
239 get_order(io_tlb_nslabs * sizeof(char *)));
240 if (!io_tlb_orig_addr)
243 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
246 * Get the overflow emergency buffer
248 io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
249 get_order(io_tlb_overflow));
250 if (!io_tlb_overflow_buffer)
253 printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
254 "0x%lx\n", bytes >> 20,
255 virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
260 free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
262 io_tlb_orig_addr = NULL;
264 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
269 free_pages((unsigned long)io_tlb_start, order);
272 io_tlb_nslabs = req_nslabs;
277 address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
279 return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
282 static int is_swiotlb_buffer(char *addr)
284 return addr >= io_tlb_start && addr < io_tlb_end;
288 * Allocates bounce buffer and returns its kernel virtual address.
291 map_single(struct device *hwdev, char *buffer, size_t size, int dir)
295 unsigned int nslots, stride, index, wrap;
297 unsigned long start_dma_addr;
299 unsigned long offset_slots;
300 unsigned long max_slots;
302 mask = dma_get_seg_boundary(hwdev);
303 start_dma_addr = virt_to_bus(io_tlb_start) & mask;
305 offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
307 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
308 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
311 * For mappings greater than a page, we limit the stride (and
312 * hence alignment) to a page size.
314 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
315 if (size > PAGE_SIZE)
316 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
323 * Find suitable number of IO TLB entries size that will fit this
324 * request and allocate a buffer from that IO TLB pool.
326 spin_lock_irqsave(&io_tlb_lock, flags);
327 index = ALIGN(io_tlb_index, stride);
328 if (index >= io_tlb_nslabs)
333 while (iommu_is_span_boundary(index, nslots, offset_slots,
336 if (index >= io_tlb_nslabs)
343 * If we find a slot that indicates we have 'nslots' number of
344 * contiguous buffers, we allocate the buffers from that slot
345 * and mark the entries as '0' indicating unavailable.
347 if (io_tlb_list[index] >= nslots) {
350 for (i = index; i < (int) (index + nslots); i++)
352 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
353 io_tlb_list[i] = ++count;
354 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
357 * Update the indices to avoid searching in the next
360 io_tlb_index = ((index + nslots) < io_tlb_nslabs
361 ? (index + nslots) : 0);
366 if (index >= io_tlb_nslabs)
368 } while (index != wrap);
371 spin_unlock_irqrestore(&io_tlb_lock, flags);
374 spin_unlock_irqrestore(&io_tlb_lock, flags);
377 * Save away the mapping from the original address to the DMA address.
378 * This is needed when we sync the memory. Then we sync the buffer if
381 for (i = 0; i < nslots; i++)
382 io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
383 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
384 memcpy(dma_addr, buffer, size);
390 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
393 unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
396 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
397 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
398 char *buffer = io_tlb_orig_addr[index];
401 * First, sync the memory before unmapping the entry
403 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
405 * bounce... copy the data back into the original buffer * and
406 * delete the bounce buffer.
408 memcpy(buffer, dma_addr, size);
411 * Return the buffer to the free list by setting the corresponding
412 * entries to indicate the number of contigous entries available.
413 * While returning the entries to the free list, we merge the entries
414 * with slots below and above the pool being returned.
416 spin_lock_irqsave(&io_tlb_lock, flags);
418 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
419 io_tlb_list[index + nslots] : 0);
421 * Step 1: return the slots to the free list, merging the
422 * slots with superceeding slots
424 for (i = index + nslots - 1; i >= index; i--)
425 io_tlb_list[i] = ++count;
427 * Step 2: merge the returned slots with the preceding slots,
428 * if available (non zero)
430 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
431 io_tlb_list[i] = ++count;
433 spin_unlock_irqrestore(&io_tlb_lock, flags);
437 sync_single(struct device *hwdev, char *dma_addr, size_t size,
440 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
441 char *buffer = io_tlb_orig_addr[index];
443 buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
447 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
448 memcpy(buffer, dma_addr, size);
450 BUG_ON(dir != DMA_TO_DEVICE);
452 case SYNC_FOR_DEVICE:
453 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
454 memcpy(dma_addr, buffer, size);
456 BUG_ON(dir != DMA_FROM_DEVICE);
464 swiotlb_alloc_coherent(struct device *hwdev, size_t size,
465 dma_addr_t *dma_handle, gfp_t flags)
469 int order = get_order(size);
471 ret = (void *)__get_free_pages(flags, order);
472 if (ret && address_needs_mapping(hwdev, virt_to_bus(ret), size)) {
474 * The allocated memory isn't reachable by the device.
475 * Fall back on swiotlb_map_single().
477 free_pages((unsigned long) ret, order);
482 * We are either out of memory or the device can't DMA
483 * to GFP_DMA memory; fall back on
484 * swiotlb_map_single(), which will grab memory from
485 * the lowest available address range.
487 ret = map_single(hwdev, NULL, size, DMA_FROM_DEVICE);
492 memset(ret, 0, size);
493 dev_addr = virt_to_bus(ret);
495 /* Confirm address can be DMA'd by device */
496 if (address_needs_mapping(hwdev, dev_addr, size)) {
497 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
498 (unsigned long long)*hwdev->dma_mask,
499 (unsigned long long)dev_addr);
500 panic("swiotlb_alloc_coherent: allocated memory is out of "
503 *dma_handle = dev_addr;
508 swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
509 dma_addr_t dma_handle)
511 WARN_ON(irqs_disabled());
512 if (!is_swiotlb_buffer(vaddr))
513 free_pages((unsigned long) vaddr, get_order(size));
515 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
516 unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
520 swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
523 * Ran out of IOMMU space for this operation. This is very bad.
524 * Unfortunately the drivers cannot handle this operation properly.
525 * unless they check for dma_mapping_error (most don't)
526 * When the mapping is small enough return a static buffer to limit
527 * the damage, or panic when the transfer is too big.
529 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
530 "device %s\n", size, dev ? dev->bus_id : "?");
532 if (size > io_tlb_overflow && do_panic) {
533 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
534 panic("DMA: Memory would be corrupted\n");
535 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
536 panic("DMA: Random memory would be DMAed\n");
541 * Map a single buffer of the indicated size for DMA in streaming mode. The
542 * physical address to use is returned.
544 * Once the device is given the dma address, the device owns this memory until
545 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
548 swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
549 int dir, struct dma_attrs *attrs)
551 dma_addr_t dev_addr = virt_to_bus(ptr);
554 BUG_ON(dir == DMA_NONE);
556 * If the pointer passed in happens to be in the device's DMA window,
557 * we can safely return the device addr and not worry about bounce
560 if (!address_needs_mapping(hwdev, dev_addr, size) && !swiotlb_force)
564 * Oh well, have to allocate and map a bounce buffer.
566 map = map_single(hwdev, ptr, size, dir);
568 swiotlb_full(hwdev, size, dir, 1);
569 map = io_tlb_overflow_buffer;
572 dev_addr = virt_to_bus(map);
575 * Ensure that the address returned is DMA'ble
577 if (address_needs_mapping(hwdev, dev_addr, size))
578 panic("map_single: bounce buffer is not DMA'ble");
582 EXPORT_SYMBOL(swiotlb_map_single_attrs);
585 swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
587 return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
591 * Unmap a single streaming mode DMA translation. The dma_addr and size must
592 * match what was provided for in a previous swiotlb_map_single call. All
593 * other usages are undefined.
595 * After this call, reads by the cpu to the buffer are guaranteed to see
596 * whatever the device wrote there.
599 swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
600 size_t size, int dir, struct dma_attrs *attrs)
602 char *dma_addr = bus_to_virt(dev_addr);
604 BUG_ON(dir == DMA_NONE);
605 if (is_swiotlb_buffer(dma_addr))
606 unmap_single(hwdev, dma_addr, size, dir);
607 else if (dir == DMA_FROM_DEVICE)
608 dma_mark_clean(dma_addr, size);
610 EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
613 swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
616 return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
619 * Make physical memory consistent for a single streaming mode DMA translation
622 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
623 * using the cpu, yet do not wish to teardown the dma mapping, you must
624 * call this function before doing so. At the next point you give the dma
625 * address back to the card, you must first perform a
626 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
629 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
630 size_t size, int dir, int target)
632 char *dma_addr = bus_to_virt(dev_addr);
634 BUG_ON(dir == DMA_NONE);
635 if (is_swiotlb_buffer(dma_addr))
636 sync_single(hwdev, dma_addr, size, dir, target);
637 else if (dir == DMA_FROM_DEVICE)
638 dma_mark_clean(dma_addr, size);
642 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
643 size_t size, int dir)
645 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
649 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
650 size_t size, int dir)
652 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
656 * Same as above, but for a sub-range of the mapping.
659 swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
660 unsigned long offset, size_t size,
663 char *dma_addr = bus_to_virt(dev_addr) + offset;
665 BUG_ON(dir == DMA_NONE);
666 if (is_swiotlb_buffer(dma_addr))
667 sync_single(hwdev, dma_addr, size, dir, target);
668 else if (dir == DMA_FROM_DEVICE)
669 dma_mark_clean(dma_addr, size);
673 swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
674 unsigned long offset, size_t size, int dir)
676 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
681 swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
682 unsigned long offset, size_t size, int dir)
684 swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
688 void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
691 * Map a set of buffers described by scatterlist in streaming mode for DMA.
692 * This is the scatter-gather version of the above swiotlb_map_single
693 * interface. Here the scatter gather list elements are each tagged with the
694 * appropriate dma address and length. They are obtained via
695 * sg_dma_{address,length}(SG).
697 * NOTE: An implementation may be able to use a smaller number of
698 * DMA address/length pairs than there are SG table elements.
699 * (for example via virtual mapping capabilities)
700 * The routine returns the number of addr/length pairs actually
701 * used, at most nents.
703 * Device ownership issues as mentioned above for swiotlb_map_single are the
707 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
708 int dir, struct dma_attrs *attrs)
710 struct scatterlist *sg;
715 BUG_ON(dir == DMA_NONE);
717 for_each_sg(sgl, sg, nelems, i) {
718 addr = SG_ENT_VIRT_ADDRESS(sg);
719 dev_addr = virt_to_bus(addr);
721 address_needs_mapping(hwdev, dev_addr, sg->length)) {
722 void *map = map_single(hwdev, addr, sg->length, dir);
724 /* Don't panic here, we expect map_sg users
725 to do proper error handling. */
726 swiotlb_full(hwdev, sg->length, dir, 0);
727 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
729 sgl[0].dma_length = 0;
732 sg->dma_address = virt_to_bus(map);
734 sg->dma_address = dev_addr;
735 sg->dma_length = sg->length;
739 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
742 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
745 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
749 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
750 * concerning calls here are the same as for swiotlb_unmap_single() above.
753 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
754 int nelems, int dir, struct dma_attrs *attrs)
756 struct scatterlist *sg;
759 BUG_ON(dir == DMA_NONE);
761 for_each_sg(sgl, sg, nelems, i) {
762 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
763 unmap_single(hwdev, bus_to_virt(sg->dma_address),
764 sg->dma_length, dir);
765 else if (dir == DMA_FROM_DEVICE)
766 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
769 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
772 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
775 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
779 * Make physical memory consistent for a set of streaming mode DMA translations
782 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
786 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
787 int nelems, int dir, int target)
789 struct scatterlist *sg;
792 BUG_ON(dir == DMA_NONE);
794 for_each_sg(sgl, sg, nelems, i) {
795 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
796 sync_single(hwdev, bus_to_virt(sg->dma_address),
797 sg->dma_length, dir, target);
798 else if (dir == DMA_FROM_DEVICE)
799 dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
804 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
807 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
811 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
814 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
818 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
820 return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
824 * Return whether the given device DMA address mask can be supported
825 * properly. For example, if your device can only drive the low 24-bits
826 * during bus mastering, then you would pass 0x00ffffff as the mask to
830 swiotlb_dma_supported(struct device *hwdev, u64 mask)
832 return virt_to_bus(io_tlb_end - 1) <= mask;
835 EXPORT_SYMBOL(swiotlb_map_single);
836 EXPORT_SYMBOL(swiotlb_unmap_single);
837 EXPORT_SYMBOL(swiotlb_map_sg);
838 EXPORT_SYMBOL(swiotlb_unmap_sg);
839 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
840 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
841 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
842 EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
843 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
844 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
845 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
846 EXPORT_SYMBOL(swiotlb_alloc_coherent);
847 EXPORT_SYMBOL(swiotlb_free_coherent);
848 EXPORT_SYMBOL(swiotlb_dma_supported);