1 /******************************************************************************
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #include <linux/etherdevice.h>
31 #include <net/mac80211.h>
32 #include <asm/unaligned.h>
33 #include "iwl-eeprom.h"
38 #include "iwl-calib.h"
39 #include "iwl-helpers.h"
40 /************************** RX-FUNCTIONS ****************************/
42 * Rx theory of operation
44 * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
45 * each of which point to Receive Buffers to be filled by the NIC. These get
46 * used not only for Rx frames, but for any command response or notification
47 * from the NIC. The driver and NIC manage the Rx buffers by means
48 * of indexes into the circular buffer.
51 * The host/firmware share two index registers for managing the Rx buffers.
53 * The READ index maps to the first position that the firmware may be writing
54 * to -- the driver can read up to (but not including) this position and get
56 * The READ index is managed by the firmware once the card is enabled.
58 * The WRITE index maps to the last position the driver has read from -- the
59 * position preceding WRITE is the last slot the firmware can place a packet.
61 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
64 * During initialization, the host sets up the READ queue position to the first
65 * INDEX position, and WRITE to the last (READ - 1 wrapped)
67 * When the firmware places a packet in a buffer, it will advance the READ index
68 * and fire the RX interrupt. The driver can then query the READ index and
69 * process as many packets as possible, moving the WRITE index forward as it
70 * resets the Rx queue buffers with new memory.
72 * The management in the driver is as follows:
73 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
74 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
75 * to replenish the iwl->rxq->rx_free.
76 * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
77 * iwl->rxq is replenished and the READ INDEX is updated (updating the
78 * 'processed' and 'read' driver indexes as well)
79 * + A received packet is processed and handed to the kernel network stack,
80 * detached from the iwl->rxq. The driver 'processed' index is updated.
81 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
82 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
83 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
84 * were enough free buffers and RX_STALLED is set it is cleared.
89 * iwl_rx_queue_alloc() Allocates rx_free
90 * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
91 * iwl_rx_queue_restock
92 * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
93 * queue, updates firmware pointers, and updates
94 * the WRITE index. If insufficient rx_free buffers
95 * are available, schedules iwl_rx_replenish
97 * -- enable interrupts --
98 * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
99 * READ INDEX, detaching the SKB from the pool.
100 * Moves the packet buffer from queue to rx_used.
101 * Calls iwl_rx_queue_restock to refill any empty
108 * iwl_rx_queue_space - Return number of free slots available in queue.
110 int iwl_rx_queue_space(const struct iwl_rx_queue *q)
112 int s = q->read - q->write;
115 /* keep some buffer to not confuse full and empty queue */
121 EXPORT_SYMBOL(iwl_rx_queue_space);
124 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
126 int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
129 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
133 spin_lock_irqsave(&q->lock, flags);
135 if (q->need_update == 0)
138 /* If power-saving is in use, make sure device is awake */
139 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
140 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
142 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143 iwl_set_bit(priv, CSR_GP_CNTRL,
144 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
148 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write & ~0x7);
150 /* Else device is assumed to be awake */
152 /* Device expects a multiple of 8 */
153 iwl_write32(priv, rx_wrt_ptr_reg, q->write & ~0x7);
159 spin_unlock_irqrestore(&q->lock, flags);
162 EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
164 * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
166 static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
169 return cpu_to_le32((u32)(dma_addr >> 8));
173 * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
175 * If there are slots in the RX queue that need to be restocked,
176 * and we have free pre-allocated buffers, fill the ranks as much
177 * as we can, pulling from rx_free.
179 * This moves the 'write' index forward to catch up with 'processed', and
180 * also updates the memory address in the firmware to reference the new
183 int iwl_rx_queue_restock(struct iwl_priv *priv)
185 struct iwl_rx_queue *rxq = &priv->rxq;
186 struct list_head *element;
187 struct iwl_rx_mem_buffer *rxb;
192 spin_lock_irqsave(&rxq->lock, flags);
193 write = rxq->write & ~0x7;
194 while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
195 /* Get next free Rx buffer, remove from free list */
196 element = rxq->rx_free.next;
197 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
200 /* Point to Rx buffer via next RBD in circular buffer */
201 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr);
202 rxq->queue[rxq->write] = rxb;
203 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
206 spin_unlock_irqrestore(&rxq->lock, flags);
207 /* If the pre-allocated buffer pool is dropping low, schedule to
209 if (rxq->free_count <= RX_LOW_WATERMARK)
210 queue_work(priv->workqueue, &priv->rx_replenish);
213 /* If we've added more space for the firmware to place data, tell it.
214 * Increment device's write pointer in multiples of 8. */
215 if (write != (rxq->write & ~0x7)) {
216 spin_lock_irqsave(&rxq->lock, flags);
217 rxq->need_update = 1;
218 spin_unlock_irqrestore(&rxq->lock, flags);
219 ret = iwl_rx_queue_update_write_ptr(priv, rxq);
224 EXPORT_SYMBOL(iwl_rx_queue_restock);
228 * iwl_rx_replenish - Move all used packet from rx_used to rx_free
230 * When moving to rx_free an SKB is allocated for the slot.
232 * Also restock the Rx queue via iwl_rx_queue_restock.
233 * This is called as a scheduled work item (except for during initialization)
235 void iwl_rx_allocate(struct iwl_priv *priv)
237 struct iwl_rx_queue *rxq = &priv->rxq;
238 struct list_head *element;
239 struct iwl_rx_mem_buffer *rxb;
243 spin_lock_irqsave(&rxq->lock, flags);
245 if (list_empty(&rxq->rx_used)) {
246 spin_unlock_irqrestore(&rxq->lock, flags);
249 element = rxq->rx_used.next;
250 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
253 spin_unlock_irqrestore(&rxq->lock, flags);
255 /* Alloc a new receive buffer */
256 rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256,
259 IWL_CRIT(priv, "Can not allocate SKB buffers\n");
260 /* We don't reschedule replenish work here -- we will
261 * call the restock method and if it still needs
262 * more buffers it will schedule replenish */
266 /* Get physical address of RB/SKB */
267 rxb->real_dma_addr = pci_map_single(
270 priv->hw_params.rx_buf_size + 256,
272 /* dma address must be no more than 36 bits */
273 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36));
274 /* and also 256 byte aligned! */
275 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256);
276 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
278 spin_lock_irqsave(&rxq->lock, flags);
280 list_add_tail(&rxb->list, &rxq->rx_free);
282 priv->alloc_rxb_skb++;
284 spin_unlock_irqrestore(&rxq->lock, flags);
288 void iwl_rx_replenish(struct iwl_priv *priv)
292 iwl_rx_allocate(priv);
294 spin_lock_irqsave(&priv->lock, flags);
295 iwl_rx_queue_restock(priv);
296 spin_unlock_irqrestore(&priv->lock, flags);
298 EXPORT_SYMBOL(iwl_rx_replenish);
301 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
302 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
303 * This free routine walks the list of POOL entries and if SKB is set to
304 * non NULL it is unmapped and freed
306 void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
309 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
310 if (rxq->pool[i].skb != NULL) {
311 pci_unmap_single(priv->pci_dev,
312 rxq->pool[i].real_dma_addr,
313 priv->hw_params.rx_buf_size + 256,
315 dev_kfree_skb(rxq->pool[i].skb);
319 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
321 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
322 rxq->rb_stts, rxq->rb_stts_dma);
326 EXPORT_SYMBOL(iwl_rx_queue_free);
328 int iwl_rx_queue_alloc(struct iwl_priv *priv)
330 struct iwl_rx_queue *rxq = &priv->rxq;
331 struct pci_dev *dev = priv->pci_dev;
334 spin_lock_init(&rxq->lock);
335 INIT_LIST_HEAD(&rxq->rx_free);
336 INIT_LIST_HEAD(&rxq->rx_used);
338 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
339 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
343 rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status),
348 /* Fill the rx_used queue with _all_ of the Rx buffers */
349 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
350 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
352 /* Set us so that we have processed and used all buffers, but have
353 * not restocked the Rx queue with fresh buffers */
354 rxq->read = rxq->write = 0;
356 rxq->need_update = 0;
360 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
365 EXPORT_SYMBOL(iwl_rx_queue_alloc);
367 void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
371 spin_lock_irqsave(&rxq->lock, flags);
372 INIT_LIST_HEAD(&rxq->rx_free);
373 INIT_LIST_HEAD(&rxq->rx_used);
374 /* Fill the rx_used queue with _all_ of the Rx buffers */
375 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
376 /* In the reset function, these buffers may have been allocated
377 * to an SKB, so we need to unmap and free potential storage */
378 if (rxq->pool[i].skb != NULL) {
379 pci_unmap_single(priv->pci_dev,
380 rxq->pool[i].real_dma_addr,
381 priv->hw_params.rx_buf_size + 256,
383 priv->alloc_rxb_skb--;
384 dev_kfree_skb(rxq->pool[i].skb);
385 rxq->pool[i].skb = NULL;
387 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
390 /* Set us so that we have processed and used all buffers, but have
391 * not restocked the Rx queue with fresh buffers */
392 rxq->read = rxq->write = 0;
394 spin_unlock_irqrestore(&rxq->lock, flags);
396 EXPORT_SYMBOL(iwl_rx_queue_reset);
398 int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
401 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
402 const u32 rb_timeout = 0; /* FIXME: RX_RB_TIMEOUT why this stalls RX */
404 if (priv->cfg->mod_params->amsdu_size_8K)
405 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
407 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
410 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
412 /* Reset driver's Rx queue write index */
413 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
415 /* Tell device where to find RBD circular buffer in DRAM */
416 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
417 (u32)(rxq->dma_addr >> 8));
419 /* Tell device where in DRAM to update its Rx status */
420 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
421 rxq->rb_stts_dma >> 4);
424 * FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY is set because of HW bug in
425 * the credit mechanism in 5000 HW RX FIFO
426 * Direct rx interrupts to hosts
427 * Rx buffer size 4 or 8k
431 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
432 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
433 FH_RCSR_CHNL0_RX_IGNORE_RXF_EMPTY |
434 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
435 FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
437 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
438 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
440 iwl_write32(priv, CSR_INT_COALESCING, 0x40);
445 int iwl_rxq_stop(struct iwl_priv *priv)
449 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
450 iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
451 FH_RSSR_CHNL0_RX_STATUS_CHNL_IDLE, 1000);
455 EXPORT_SYMBOL(iwl_rxq_stop);
457 void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
458 struct iwl_rx_mem_buffer *rxb)
461 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
462 struct iwl_missed_beacon_notif *missed_beacon;
464 missed_beacon = &pkt->u.missed_beacon;
465 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
466 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
467 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
468 le32_to_cpu(missed_beacon->total_missed_becons),
469 le32_to_cpu(missed_beacon->num_recvd_beacons),
470 le32_to_cpu(missed_beacon->num_expected_beacons));
471 if (!test_bit(STATUS_SCANNING, &priv->status))
472 iwl_init_sensitivity(priv);
475 EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
478 /* Calculate noise level, based on measurements during network silence just
479 * before arriving beacon. This measurement can be done only if we know
480 * exactly when to expect beacons, therefore only when we're associated. */
481 static void iwl_rx_calc_noise(struct iwl_priv *priv)
483 struct statistics_rx_non_phy *rx_info
484 = &(priv->statistics.rx.general);
485 int num_active_rx = 0;
486 int total_silence = 0;
488 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
490 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
492 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
495 total_silence += bcn_silence_a;
499 total_silence += bcn_silence_b;
503 total_silence += bcn_silence_c;
507 /* Average among active antennas */
509 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
511 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
513 IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
514 bcn_silence_a, bcn_silence_b, bcn_silence_c,
515 priv->last_rx_noise);
518 #define REG_RECALIB_PERIOD (60)
520 void iwl_rx_statistics(struct iwl_priv *priv,
521 struct iwl_rx_mem_buffer *rxb)
524 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
526 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
527 (int)sizeof(priv->statistics), pkt->len);
529 change = ((priv->statistics.general.temperature !=
530 pkt->u.stats.general.temperature) ||
531 ((priv->statistics.flag &
532 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
533 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
535 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
537 set_bit(STATUS_STATISTICS, &priv->status);
539 /* Reschedule the statistics timer to occur in
540 * REG_RECALIB_PERIOD seconds to ensure we get a
541 * thermal update even if the uCode doesn't give
543 mod_timer(&priv->statistics_periodic, jiffies +
544 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
546 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
547 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
548 iwl_rx_calc_noise(priv);
549 queue_work(priv->workqueue, &priv->run_time_calib_work);
552 iwl_leds_background(priv);
554 if (priv->cfg->ops->lib->temp_ops.temperature && change)
555 priv->cfg->ops->lib->temp_ops.temperature(priv);
557 EXPORT_SYMBOL(iwl_rx_statistics);
559 #define PERFECT_RSSI (-20) /* dBm */
560 #define WORST_RSSI (-95) /* dBm */
561 #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
563 /* Calculate an indication of rx signal quality (a percentage, not dBm!).
564 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
565 * about formulas used below. */
566 static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
569 int degradation = PERFECT_RSSI - rssi_dbm;
571 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
572 * as indicator; formula is (signal dbm - noise dbm).
573 * SNR at or above 40 is a great signal (100%).
574 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
575 * Weakest usable signal is usually 10 - 15 dB SNR. */
577 if (rssi_dbm - noise_dbm >= 40)
579 else if (rssi_dbm < noise_dbm)
581 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
583 /* Else use just the signal level.
584 * This formula is a least squares fit of data points collected and
585 * compared with a reference system that had a percentage (%) display
586 * for signal quality. */
588 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
589 (15 * RSSI_RANGE + 62 * degradation)) /
590 (RSSI_RANGE * RSSI_RANGE);
594 else if (sig_qual < 1)
600 /* Calc max signal level (dBm) among 3 possible receivers */
601 static inline int iwl_calc_rssi(struct iwl_priv *priv,
602 struct iwl_rx_phy_res *rx_resp)
604 return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
607 #ifdef CONFIG_IWLWIFI_DEBUG
609 * iwl_dbg_report_frame - dump frame to syslog during debug sessions
611 * You may hack this function to show different aspects of received frames,
612 * including selective frame dumps.
613 * group100 parameter selects whether to show 1 out of 100 good data frames.
614 * All beacon and probe response frames are printed.
616 static void iwl_dbg_report_frame(struct iwl_priv *priv,
617 struct iwl_rx_phy_res *phy_res, u16 length,
618 struct ieee80211_hdr *header, int group100)
621 u32 print_summary = 0;
622 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
633 if (likely(!(priv->debug_level & IWL_DL_RX)))
637 fc = header->frame_control;
638 seq_ctl = le16_to_cpu(header->seq_ctrl);
641 channel = le16_to_cpu(phy_res->channel);
642 phy_flags = le16_to_cpu(phy_res->phy_flags);
643 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
645 /* signal statistics */
646 rssi = iwl_calc_rssi(priv, phy_res);
647 tsf_low = le64_to_cpu(phy_res->timestamp) & 0x0ffffffff;
649 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
651 /* if data frame is to us and all is good,
652 * (optionally) print summary for only 1 out of every 100 */
653 if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
654 cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
657 print_summary = 1; /* print each frame */
658 else if (priv->framecnt_to_us < 100) {
659 priv->framecnt_to_us++;
662 priv->framecnt_to_us = 0;
667 /* print summary for all other frames */
678 else if (ieee80211_has_retry(fc))
680 else if (ieee80211_is_assoc_resp(fc))
682 else if (ieee80211_is_reassoc_resp(fc))
684 else if (ieee80211_is_probe_resp(fc)) {
686 print_dump = 1; /* dump frame contents */
687 } else if (ieee80211_is_beacon(fc)) {
689 print_dump = 1; /* dump frame contents */
690 } else if (ieee80211_is_atim(fc))
692 else if (ieee80211_is_auth(fc))
694 else if (ieee80211_is_deauth(fc))
696 else if (ieee80211_is_disassoc(fc))
701 rate_idx = iwl_hwrate_to_plcp_idx(rate_n_flags);
702 if (unlikely((rate_idx < 0) || (rate_idx >= IWL_RATE_COUNT))) {
706 bitrate = iwl_rates[rate_idx].ieee / 2;
709 /* print frame summary.
710 * MAC addresses show just the last byte (for brevity),
711 * but you can hack it to show more, if you'd like to. */
713 IWL_DEBUG_RX(priv, "%s: mhd=0x%04x, dst=0x%02x, "
714 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
715 title, le16_to_cpu(fc), header->addr1[5],
716 length, rssi, channel, bitrate);
718 /* src/dst addresses assume managed mode */
719 IWL_DEBUG_RX(priv, "%s: 0x%04x, dst=0x%02x, src=0x%02x, "
720 "len=%u, rssi=%d, tim=%lu usec, "
721 "phy=0x%02x, chnl=%d\n",
722 title, le16_to_cpu(fc), header->addr1[5],
723 header->addr3[5], length, rssi,
724 tsf_low - priv->scan_start_tsf,
729 iwl_print_hex_dump(priv, IWL_DL_RX, header, length);
733 static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
735 /* 0 - mgmt, 1 - cnt, 2 - data */
736 int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
737 priv->rx_stats[idx].cnt++;
738 priv->rx_stats[idx].bytes += len;
742 * returns non-zero if packet should be dropped
744 int iwl_set_decrypted_flag(struct iwl_priv *priv,
745 struct ieee80211_hdr *hdr,
747 struct ieee80211_rx_status *stats)
749 u16 fc = le16_to_cpu(hdr->frame_control);
751 if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
754 if (!(fc & IEEE80211_FCTL_PROTECTED))
757 IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
758 switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
759 case RX_RES_STATUS_SEC_TYPE_TKIP:
760 /* The uCode has got a bad phase 1 Key, pushes the packet.
761 * Decryption will be done in SW. */
762 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
763 RX_RES_STATUS_BAD_KEY_TTAK)
766 case RX_RES_STATUS_SEC_TYPE_WEP:
767 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
768 RX_RES_STATUS_BAD_ICV_MIC) {
769 /* bad ICV, the packet is destroyed since the
770 * decryption is inplace, drop it */
771 IWL_DEBUG_RX(priv, "Packet destroyed\n");
774 case RX_RES_STATUS_SEC_TYPE_CCMP:
775 if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
776 RX_RES_STATUS_DECRYPT_OK) {
777 IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
778 stats->flag |= RX_FLAG_DECRYPTED;
787 EXPORT_SYMBOL(iwl_set_decrypted_flag);
789 static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
793 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
794 RX_RES_STATUS_STATION_FOUND)
795 decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
796 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
798 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
800 /* packet was not encrypted */
801 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
802 RX_RES_STATUS_SEC_TYPE_NONE)
805 /* packet was encrypted with unknown alg */
806 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
807 RX_RES_STATUS_SEC_TYPE_ERR)
810 /* decryption was not done in HW */
811 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
812 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
815 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
817 case RX_RES_STATUS_SEC_TYPE_CCMP:
818 /* alg is CCM: check MIC only */
819 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
821 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
823 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
827 case RX_RES_STATUS_SEC_TYPE_TKIP:
828 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
830 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
833 /* fall through if TTAK OK */
835 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
836 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
838 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
842 IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
843 decrypt_in, decrypt_out);
848 static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
850 struct iwl_rx_mem_buffer *rxb,
851 struct ieee80211_rx_status *stats)
853 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
854 struct iwl_rx_phy_res *rx_start = (include_phy) ?
855 (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
856 struct ieee80211_hdr *hdr;
861 u32 ampdu_status_legacy;
863 if (!include_phy && priv->last_phy_res[0])
864 rx_start = (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
867 IWL_ERR(priv, "MPDU frame without a PHY data\n");
871 hdr = (struct ieee80211_hdr *)((u8 *) &rx_start[1] +
872 rx_start->cfg_phy_cnt);
874 len = le16_to_cpu(rx_start->byte_count);
876 rx_end = (__le32 *)((u8 *) &pkt->u.raw[0] +
877 sizeof(struct iwl_rx_phy_res) +
878 rx_start->cfg_phy_cnt + len);
881 struct iwl4965_rx_mpdu_res_start *amsdu =
882 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
884 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
885 sizeof(struct iwl4965_rx_mpdu_res_start));
886 len = le16_to_cpu(amsdu->byte_count);
887 rx_start->byte_count = amsdu->byte_count;
888 rx_end = (__le32 *) (((u8 *) hdr) + len);
891 ampdu_status = le32_to_cpu(*rx_end);
892 skblen = ((u8 *) rx_end - (u8 *) &pkt->u.raw[0]) + sizeof(u32);
895 /* New status scheme, need to translate */
896 ampdu_status_legacy = ampdu_status;
897 ampdu_status = iwl_translate_rx_status(priv, ampdu_status);
901 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
902 skb_put(rxb->skb, len); /* end where data ends */
904 /* We only process data packets if the interface is open */
905 if (unlikely(!priv->is_open)) {
906 IWL_DEBUG_DROP_LIMIT(priv,
907 "Dropping packet while interface is not open.\n");
911 hdr = (struct ieee80211_hdr *)rxb->skb->data;
913 /* in case of HW accelerated crypto and bad decryption, drop */
914 if (!priv->hw_params.sw_crypto &&
915 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
918 iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
919 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
920 priv->alloc_rxb_skb--;
924 /* This is necessary only for a number of statistics, see the caller. */
925 static int iwl_is_network_packet(struct iwl_priv *priv,
926 struct ieee80211_hdr *header)
928 /* Filter incoming packets to determine if they are targeted toward
929 * this network, discarding packets coming from ourselves */
930 switch (priv->iw_mode) {
931 case NL80211_IFTYPE_ADHOC: /* Header: Dest. | Source | BSSID */
932 /* packets to our IBSS update information */
933 return !compare_ether_addr(header->addr3, priv->bssid);
934 case NL80211_IFTYPE_STATION: /* Header: Dest. | AP{BSSID} | Source */
935 /* packets to our IBSS update information */
936 return !compare_ether_addr(header->addr2, priv->bssid);
942 /* Called for REPLY_RX (legacy ABG frames), or
943 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
944 void iwl_rx_reply_rx(struct iwl_priv *priv,
945 struct iwl_rx_mem_buffer *rxb)
947 struct ieee80211_hdr *header;
948 struct ieee80211_rx_status rx_status;
949 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
950 /* Use phy data (Rx signal strength, etc.) contained within
951 * this rx packet for legacy frames,
952 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
953 int include_phy = (pkt->hdr.cmd == REPLY_RX);
954 struct iwl_rx_phy_res *rx_start = (include_phy) ?
955 (struct iwl_rx_phy_res *)&(pkt->u.raw[0]) :
956 (struct iwl_rx_phy_res *)&priv->last_phy_res[1];
958 unsigned int len = 0;
962 rx_status.mactime = le64_to_cpu(rx_start->timestamp);
964 ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
965 rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
966 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
968 iwl_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
969 if (rx_status.band == IEEE80211_BAND_5GHZ)
970 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
974 /* TSF isn't reliable. In order to allow smooth user experience,
975 * this W/A doesn't propagate it to the mac80211 */
976 /*rx_status.flag |= RX_FLAG_TSFT;*/
978 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
979 IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
980 rx_start->cfg_phy_cnt);
985 if (priv->last_phy_res[0])
986 rx_start = (struct iwl_rx_phy_res *)
987 &priv->last_phy_res[1];
993 IWL_ERR(priv, "MPDU frame without a PHY data\n");
998 header = (struct ieee80211_hdr *)((u8 *) &rx_start[1]
999 + rx_start->cfg_phy_cnt);
1001 len = le16_to_cpu(rx_start->byte_count);
1002 rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
1003 sizeof(struct iwl_rx_phy_res) + len);
1005 struct iwl4965_rx_mpdu_res_start *amsdu =
1006 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
1008 header = (void *)(pkt->u.raw +
1009 sizeof(struct iwl4965_rx_mpdu_res_start));
1010 len = le16_to_cpu(amsdu->byte_count);
1011 rx_end = (__le32 *) (pkt->u.raw +
1012 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
1015 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
1016 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
1017 IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
1018 le32_to_cpu(*rx_end));
1022 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
1024 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
1025 rx_status.signal = iwl_calc_rssi(priv, rx_start);
1027 /* Meaningful noise values are available only from beacon statistics,
1028 * which are gathered only when associated, and indicate noise
1029 * only for the associated network channel ...
1030 * Ignore these noise values while scanning (other channels) */
1031 if (iwl_is_associated(priv) &&
1032 !test_bit(STATUS_SCANNING, &priv->status)) {
1033 rx_status.noise = priv->last_rx_noise;
1034 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1037 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1038 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1041 /* Reset beacon noise level if not associated. */
1042 if (!iwl_is_associated(priv))
1043 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1045 /* Set "1" to report good data frames in groups of 100 */
1046 #ifdef CONFIG_IWLWIFI_DEBUG
1047 if (unlikely(priv->debug_level & IWL_DL_RX))
1048 iwl_dbg_report_frame(priv, rx_start, len, header, 1);
1050 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n",
1051 rx_status.signal, rx_status.noise, rx_status.signal,
1052 (unsigned long long)rx_status.mactime);
1057 * It seems that the antenna field in the phy flags value
1058 * is actually a bit field. This is undefined by radiotap,
1059 * it wants an actual antenna number but I always get "7"
1060 * for most legacy frames I receive indicating that the
1061 * same frame was received on all three RX chains.
1063 * I think this field should be removed in favor of a
1064 * new 802.11n radiotap field "RX chains" that is defined
1067 rx_status.antenna = le16_to_cpu(rx_start->phy_flags &
1068 RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
1070 /* set the preamble flag if appropriate */
1071 if (rx_start->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
1072 rx_status.flag |= RX_FLAG_SHORTPRE;
1074 network_packet = iwl_is_network_packet(priv, header);
1075 if (network_packet) {
1076 priv->last_rx_rssi = rx_status.signal;
1077 priv->last_beacon_time = priv->ucode_beacon_time;
1078 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
1081 fc = le16_to_cpu(header->frame_control);
1082 switch (fc & IEEE80211_FCTL_FTYPE) {
1083 case IEEE80211_FTYPE_MGMT:
1084 case IEEE80211_FTYPE_DATA:
1085 if (priv->iw_mode == NL80211_IFTYPE_AP)
1086 iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
1090 iwl_pass_packet_to_mac80211(priv, include_phy, rxb,
1096 EXPORT_SYMBOL(iwl_rx_reply_rx);
1098 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
1099 * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
1100 void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1101 struct iwl_rx_mem_buffer *rxb)
1103 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1104 priv->last_phy_res[0] = 1;
1105 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1106 sizeof(struct iwl_rx_phy_res));
1108 EXPORT_SYMBOL(iwl_rx_reply_rx_phy);