1 /* $Id: rtrap.S,v 1.61 2002/02/09 19:49:31 davem Exp $
2 * rtrap.S: Preparing for return from trap on Sparc V9.
4 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
5 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
8 #include <linux/config.h>
11 #include <asm/pstate.h>
12 #include <asm/ptrace.h>
13 #include <asm/spitfire.h>
15 #include <asm/visasm.h>
16 #include <asm/processor.h>
18 #define RTRAP_PSTATE (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_IE)
19 #define RTRAP_PSTATE_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV)
20 #define RTRAP_PSTATE_AG_IRQOFF (PSTATE_RMO|PSTATE_PEF|PSTATE_PRIV|PSTATE_AG)
22 /* Register %l6 keeps track of whether we are returning
23 * from a system call or not. It is cleared if we call
24 * do_notify_resume, and it must not be otherwise modified
25 * until we fully commit to returning to userspace.
33 ba,a,pt %xcc, __handle_softirq_continue
37 wrpr %g0, RTRAP_PSTATE, %pstate
38 ba,pt %xcc, __handle_preemption_continue
39 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
41 __handle_user_windows:
42 call fault_in_user_windows
43 wrpr %g0, RTRAP_PSTATE, %pstate
44 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
45 /* Redo sched+sig checks */
46 ldx [%g6 + TI_FLAGS], %l0
47 andcc %l0, _TIF_NEED_RESCHED, %g0
52 wrpr %g0, RTRAP_PSTATE, %pstate
53 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
54 ldx [%g6 + TI_FLAGS], %l0
56 1: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
57 be,pt %xcc, __handle_user_windows_continue
61 add %sp, PTREGS_OFF, %o0
65 wrpr %g0, RTRAP_PSTATE, %pstate
66 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
68 /* Signal delivery can modify pt_regs tstate, so we must
71 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
72 sethi %hi(0xf << 20), %l4
74 ba,pt %xcc, __handle_user_windows_continue
79 wrpr %g0, RTRAP_PSTATE, %pstate
80 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
81 ldub [%g6 + TI_WSAVED], %o2
84 /* Redo userwin+sched+sig checks */
85 call fault_in_user_windows
87 wrpr %g0, RTRAP_PSTATE, %pstate
88 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
89 ldx [%g6 + TI_FLAGS], %l0
90 andcc %l0, _TIF_NEED_RESCHED, %g0
95 wrpr %g0, RTRAP_PSTATE, %pstate
96 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
97 ldx [%g6 + TI_FLAGS], %l0
98 1: andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
100 be,pt %xcc, __handle_perfctrs_continue
101 sethi %hi(TSTATE_PEF), %o0
104 add %sp, PTREGS_OFF, %o0
106 call do_notify_resume
108 wrpr %g0, RTRAP_PSTATE, %pstate
109 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
111 /* Signal delivery can modify pt_regs tstate, so we must
114 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
115 sethi %hi(0xf << 20), %l4
118 ba,pt %xcc, __handle_perfctrs_continue
120 sethi %hi(TSTATE_PEF), %o0
123 andcc %l5, FPRS_FEF, %g0
124 sethi %hi(TSTATE_PEF), %o0
125 be,a,pn %icc, __handle_userfpu_continue
127 ba,a,pt %xcc, __handle_userfpu_continue
132 add %sp, PTREGS_OFF, %o0
134 call do_notify_resume
135 wrpr %g0, RTRAP_PSTATE, %pstate
136 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
139 /* Signal delivery can modify pt_regs tstate, so we must
142 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
143 sethi %hi(0xf << 20), %l4
145 ba,pt %xcc, __handle_signal_continue
149 .globl rtrap_irq, rtrap_clr_l6, rtrap, irqsz_patchme, rtrap_xcall
151 rtrap_clr_l6: clr %l6
154 sethi %hi(per_cpu____cpu_data), %l0
155 lduw [%l0 + %lo(per_cpu____cpu_data)], %l1
157 sethi %hi(per_cpu____cpu_data), %l0
158 or %l0, %lo(per_cpu____cpu_data), %l0
159 lduw [%l0 + %g5], %l1
163 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */
164 bne,pn %icc, __handle_softirq
165 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
166 __handle_softirq_continue:
168 sethi %hi(0xf << 20), %l4
169 andcc %l1, TSTATE_PRIV, %l3
171 bne,pn %icc, to_kernel
174 /* We must hold IRQs off and atomically test schedule+signal
175 * state, then hold them off all the way back to userspace.
176 * If we are returning to kernel, none of this matters.
178 * If we do not do this, there is a window where we would do
179 * the tests, later the signal/resched event arrives but we do
180 * not process it since we are still in kernel mode. It would
181 * take until the next local IRQ before the signal/resched
182 * event would be handled.
184 * This also means that if we have to deal with performance
185 * counters or user windows, we have to redo all of these
186 * sched+signal checks with IRQs disabled.
188 to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
190 __handle_preemption_continue:
191 ldx [%g6 + TI_FLAGS], %l0
192 sethi %hi(_TIF_USER_WORK_MASK), %o0
193 or %o0, %lo(_TIF_USER_WORK_MASK), %o0
195 sethi %hi(TSTATE_PEF), %o0
196 be,pt %xcc, user_nowork
198 andcc %l0, _TIF_NEED_RESCHED, %g0
199 bne,pn %xcc, __handle_preemption
200 andcc %l0, (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK), %g0
201 bne,pn %xcc, __handle_signal
202 __handle_signal_continue:
203 ldub [%g6 + TI_WSAVED], %o2
204 brnz,pn %o2, __handle_user_windows
206 __handle_user_windows_continue:
207 ldx [%g6 + TI_FLAGS], %l5
208 andcc %l5, _TIF_PERFCTR, %g0
209 sethi %hi(TSTATE_PEF), %o0
210 bne,pn %xcc, __handle_perfctrs
211 __handle_perfctrs_continue:
214 /* This fpdepth clear is necessary for non-syscall rtraps only */
216 bne,pn %xcc, __handle_userfpu
217 stb %g0, [%g6 + TI_FPDEPTH]
218 __handle_userfpu_continue:
220 rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
221 ldx [%sp + PTREGS_OFF + PT_V9_G2], %g2
223 ldx [%sp + PTREGS_OFF + PT_V9_G3], %g3
224 ldx [%sp + PTREGS_OFF + PT_V9_G4], %g4
225 ldx [%sp + PTREGS_OFF + PT_V9_G5], %g5
228 /* Must do this before thread reg is clobbered below. */
229 LOAD_PER_CPU_BASE(%g6, %g7)
231 ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
232 ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7
233 wrpr %g0, RTRAP_PSTATE_AG_IRQOFF, %pstate
234 ldx [%sp + PTREGS_OFF + PT_V9_I0], %i0
235 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
237 ldx [%sp + PTREGS_OFF + PT_V9_I2], %i2
238 ldx [%sp + PTREGS_OFF + PT_V9_I3], %i3
239 ldx [%sp + PTREGS_OFF + PT_V9_I4], %i4
240 ldx [%sp + PTREGS_OFF + PT_V9_I5], %i5
241 ldx [%sp + PTREGS_OFF + PT_V9_I6], %i6
242 ldx [%sp + PTREGS_OFF + PT_V9_I7], %i7
243 ldx [%sp + PTREGS_OFF + PT_V9_TPC], %l2
244 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %o2
246 ld [%sp + PTREGS_OFF + PT_V9_Y], %o3
251 wrpr %l1, %g0, %tstate
255 brnz,pn %l3, kern_rtt
256 mov PRIMARY_CONTEXT, %l7
257 ldxa [%l7 + %l7] ASI_DMMU, %l0
258 sethi %hi(sparc64_kern_pri_nuc_bits), %l1
259 ldx [%l1 + %lo(sparc64_kern_pri_nuc_bits)], %l1
261 stxa %l0, [%l7] ASI_DMMU
262 sethi %hi(KERNBASE), %l7
268 wrpr %l2, %g0, %canrestore
269 wrpr %l1, %g0, %wstate
270 wrpr %g0, %g0, %otherwin
272 rdpr %canrestore, %g1
273 wrpr %g1, 0x0, %cleanwin
280 #ifdef CONFIG_PREEMPT
281 ldsw [%g6 + TI_PRE_COUNT], %l5
282 brnz %l5, kern_fpucheck
283 ldx [%g6 + TI_FLAGS], %l5
284 andcc %l5, _TIF_NEED_RESCHED, %g0
285 be,pt %xcc, kern_fpucheck
288 bne,pn %xcc, kern_fpucheck
289 sethi %hi(PREEMPT_ACTIVE), %l6
290 stw %l6, [%g6 + TI_PRE_COUNT]
294 stw %g0, [%g6 + TI_PRE_COUNT]
296 kern_fpucheck: ldub [%g6 + TI_FPDEPTH], %l5
297 brz,pt %l5, rt_continue
299 add %g6, TI_FPSAVED, %l6
300 ldub [%l6 + %o0], %l2
304 andcc %l2, (FPRS_FEF|FPRS_DU), %g0
306 and %l2, FPRS_DL, %l6
307 andcc %l2, FPRS_FEF, %g0
312 wr %g1, FPRS_FEF, %fprs
314 add %g6, TI_XFSR, %o1
316 add %g6, TI_FPREGS, %o3
318 add %g6, TI_FPREGS+0x40, %o4
321 ldda [%o3 + %o2] ASI_BLK_P, %f0
322 ldda [%o4 + %o2] ASI_BLK_P, %f16
324 1: andcc %l2, FPRS_DU, %g0
329 ldda [%o3 + %o2] ASI_BLK_P, %f32
330 ldda [%o4 + %o2] ASI_BLK_P, %f48
332 ldx [%o1 + %o5], %fsr
333 2: stb %l5, [%g6 + TI_FPDEPTH]
334 ba,pt %xcc, rt_continue
336 5: wr %g0, FPRS_FEF, %fprs
339 add %g6, TI_FPREGS+0x80, %o3
340 add %g6, TI_FPREGS+0xc0, %o4
342 ldda [%o3 + %o2] ASI_BLK_P, %f32
343 ldda [%o4 + %o2] ASI_BLK_P, %f48
345 wr %g0, FPRS_DU, %fprs
346 ba,pt %xcc, rt_continue
347 stb %l5, [%g6 + TI_FPDEPTH]