2 * SMP boot-related support
4 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 * Copyright (C) 2001, 2004-2005 Intel Corp
7 * Rohit Seth <rohit.seth@intel.com>
8 * Suresh Siddha <suresh.b.siddha@intel.com>
9 * Gordon Jin <gordon.jin@intel.com>
10 * Ashok Raj <ashok.raj@intel.com>
12 * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
13 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
14 * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
15 * smp_boot_cpus()/smp_commence() is replaced by
16 * smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
17 * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
18 * 04/12/26 Jin Gordon <gordon.jin@intel.com>
19 * 04/12/26 Rohit Seth <rohit.seth@intel.com>
20 * Add multi-threading and multi-core detection
21 * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
22 * Setup cpu_sibling_map and cpu_core_map
25 #include <linux/module.h>
26 #include <linux/acpi.h>
27 #include <linux/bootmem.h>
28 #include <linux/cpu.h>
29 #include <linux/delay.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/irq.h>
33 #include <linux/kernel.h>
34 #include <linux/kernel_stat.h>
36 #include <linux/notifier.h>
37 #include <linux/smp.h>
38 #include <linux/smp_lock.h>
39 #include <linux/spinlock.h>
40 #include <linux/efi.h>
41 #include <linux/percpu.h>
42 #include <linux/bitops.h>
44 #include <asm/atomic.h>
45 #include <asm/cache.h>
46 #include <asm/current.h>
47 #include <asm/delay.h>
51 #include <asm/machvec.h>
54 #include <asm/pgalloc.h>
55 #include <asm/pgtable.h>
56 #include <asm/processor.h>
57 #include <asm/ptrace.h>
59 #include <asm/system.h>
60 #include <asm/tlbflush.h>
61 #include <asm/unistd.h>
66 #define Dprintk(x...) printk(x)
71 #ifdef CONFIG_HOTPLUG_CPU
72 #ifdef CONFIG_PERMIT_BSP_REMOVE
73 #define bsp_remove_ok 1
75 #define bsp_remove_ok 0
79 * Store all idle threads, this can be reused instead of creating
80 * a new thread. Also avoids complicated thread destroy functionality
83 struct task_struct *idle_thread_array[NR_CPUS];
86 * Global array allocated for NR_CPUS at boot time
88 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
91 * start_ap in head.S uses this to store current booting cpu
94 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
96 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
98 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
99 #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
103 #define get_idle_for_cpu(x) (NULL)
104 #define set_idle_for_cpu(x,p)
105 #define set_brendez_area(x)
110 * ITC synchronization related stuff:
113 #define SLAVE (SMP_CACHE_BYTES/8)
115 #define NUM_ROUNDS 64 /* magic value */
116 #define NUM_ITERS 5 /* likewise */
118 static DEFINE_SPINLOCK(itc_sync_lock);
119 static volatile unsigned long go[SLAVE + 1];
121 #define DEBUG_ITC_SYNC 0
123 extern void __devinit calibrate_delay (void);
124 extern void start_ap (void);
125 extern unsigned long ia64_iobase;
127 task_t *task_for_booting_cpu;
132 DEFINE_PER_CPU(int, cpu_state);
134 /* Bitmasks of currently online, and possible CPUs */
135 cpumask_t cpu_online_map;
136 EXPORT_SYMBOL(cpu_online_map);
137 cpumask_t cpu_possible_map = CPU_MASK_NONE;
138 EXPORT_SYMBOL(cpu_possible_map);
140 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
141 cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned;
142 int smp_num_siblings = 1;
143 int smp_num_cpucores = 1;
145 /* which logical CPU number maps to which CPU (physical APIC ID) */
146 volatile int ia64_cpu_to_sapicid[NR_CPUS];
147 EXPORT_SYMBOL(ia64_cpu_to_sapicid);
149 static volatile cpumask_t cpu_callin_map;
151 struct smp_boot_data smp_boot_data __initdata;
153 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
155 char __initdata no_int_routing;
157 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
159 #ifdef CONFIG_FORCE_CPEI_RETARGET
160 #define CPEI_OVERRIDE_DEFAULT (1)
162 #define CPEI_OVERRIDE_DEFAULT (0)
165 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
168 cmdl_force_cpei(char *str)
172 get_option (&str, &value);
173 force_cpei_retarget = value;
178 __setup("force_cpei=", cmdl_force_cpei);
181 nointroute (char *str)
184 printk ("no_int_routing on\n");
188 __setup("nointroute", nointroute);
190 static void fix_b0_for_bsp(void)
192 #ifdef CONFIG_HOTPLUG_CPU
194 static int fix_bsp_b0 = 1;
196 cpuid = smp_processor_id();
199 * Cache the b0 value on the first AP that comes up
201 if (!(fix_bsp_b0 && cpuid))
204 sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
205 printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
212 sync_master (void *arg)
214 unsigned long flags, i;
218 local_irq_save(flags);
220 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
224 go[SLAVE] = ia64_get_itc();
227 local_irq_restore(flags);
231 * Return the number of cycles by which our itc differs from the itc on the master
232 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
233 * negative that it is behind.
236 get_delta (long *rt, long *master)
238 unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
239 unsigned long tcenter, t0, t1, tm;
242 for (i = 0; i < NUM_ITERS; ++i) {
245 while (!(tm = go[SLAVE]))
250 if (t1 - t0 < best_t1 - best_t0)
251 best_t0 = t0, best_t1 = t1, best_tm = tm;
254 *rt = best_t1 - best_t0;
255 *master = best_tm - best_t0;
257 /* average best_t0 and best_t1 without overflow: */
258 tcenter = (best_t0/2 + best_t1/2);
259 if (best_t0 % 2 + best_t1 % 2 == 2)
261 return tcenter - best_tm;
265 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
266 * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
267 * unaccounted-for errors (such as getting a machine check in the middle of a calibration
268 * step). The basic idea is for the slave to ask the master what itc value it has and to
269 * read its own itc before and after the master responds. Each iteration gives us three
283 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
284 * and t1. If we achieve this, the clocks are synchronized provided the interconnect
285 * between the slave and the master is symmetric. Even if the interconnect were
286 * asymmetric, we would still know that the synchronization error is smaller than the
287 * roundtrip latency (t0 - t1).
289 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
290 * within one or two cycles. However, we can only *guarantee* that the synchronization is
291 * accurate to within a round-trip time, which is typically in the range of several
292 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
293 * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
294 * than half a micro second or so.
297 ia64_sync_itc (unsigned int master)
299 long i, delta, adj, adjust_latency = 0, done = 0;
300 unsigned long flags, rt, master_time_stamp, bound;
303 long rt; /* roundtrip time */
304 long master; /* master's timestamp */
305 long diff; /* difference between midpoint and master's timestamp */
306 long lat; /* estimate of itc adjustment latency */
311 * Make sure local timer ticks are disabled while we sync. If
312 * they were enabled, we'd have to worry about nasty issues
313 * like setting the ITC ahead of (or a long time before) the
314 * next scheduled tick.
316 BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
320 if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) {
321 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
326 cpu_relax(); /* wait for master to be ready */
328 spin_lock_irqsave(&itc_sync_lock, flags);
330 for (i = 0; i < NUM_ROUNDS; ++i) {
331 delta = get_delta(&rt, &master_time_stamp);
333 done = 1; /* let's lock on to this... */
339 adjust_latency += -delta;
340 adj = -delta + adjust_latency/4;
344 ia64_set_itc(ia64_get_itc() + adj);
348 t[i].master = master_time_stamp;
350 t[i].lat = adjust_latency/4;
354 spin_unlock_irqrestore(&itc_sync_lock, flags);
357 for (i = 0; i < NUM_ROUNDS; ++i)
358 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
359 t[i].rt, t[i].master, t[i].diff, t[i].lat);
362 printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
363 "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
367 * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
369 static inline void __devinit
370 smp_setup_percpu_timer (void)
374 static void __devinit
377 int cpuid, phys_id, itc_master;
378 extern void ia64_init_itm(void);
379 extern volatile int time_keeper_id;
381 #ifdef CONFIG_PERFMON
382 extern void pfm_init_percpu(void);
385 cpuid = smp_processor_id();
386 phys_id = hard_smp_processor_id();
387 itc_master = time_keeper_id;
389 if (cpu_online(cpuid)) {
390 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
398 cpu_set(cpuid, cpu_online_map);
399 unlock_ipi_calllock();
400 per_cpu(cpu_state, cpuid) = CPU_ONLINE;
402 smp_setup_percpu_timer();
404 ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
406 #ifdef CONFIG_PERFMON
412 if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
414 * Synchronize the ITC with the BP. Need to do this after irqs are
415 * enabled because ia64_sync_itc() calls smp_call_function_single(), which
416 * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
417 * local_bh_enable(), which bugs out if irqs are not enabled...
419 Dprintk("Going to syncup ITC with ITC Master.\n");
420 ia64_sync_itc(itc_master);
428 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
430 #ifdef CONFIG_IA32_SUPPORT
435 * Allow the master to continue.
437 cpu_set(cpuid, cpu_callin_map);
438 Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
443 * Activate a secondary processor. head.S calls this.
446 start_secondary (void *unused)
448 /* Early console may use I/O ports */
449 ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
450 Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
460 struct pt_regs * __devinit idle_regs(struct pt_regs *regs)
466 struct task_struct *idle;
467 struct completion done;
472 do_fork_idle(void *_c_idle)
474 struct create_idle *c_idle = _c_idle;
476 c_idle->idle = fork_idle(c_idle->cpu);
477 complete(&c_idle->done);
481 do_boot_cpu (int sapicid, int cpu)
484 struct create_idle c_idle = {
486 .done = COMPLETION_INITIALIZER(c_idle.done),
488 DECLARE_WORK(work, do_fork_idle, &c_idle);
490 c_idle.idle = get_idle_for_cpu(cpu);
492 init_idle(c_idle.idle, cpu);
497 * We can't use kernel_thread since we must avoid to reschedule the child.
499 if (!keventd_up() || current_is_keventd())
500 work.func(work.data);
502 schedule_work(&work);
503 wait_for_completion(&c_idle.done);
506 if (IS_ERR(c_idle.idle))
507 panic("failed fork for CPU %d", cpu);
509 set_idle_for_cpu(cpu, c_idle.idle);
512 task_for_booting_cpu = c_idle.idle;
514 Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
516 set_brendez_area(cpu);
517 platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
520 * Wait 10s total for the AP to start
522 Dprintk("Waiting on callin_map ...");
523 for (timeout = 0; timeout < 100000; timeout++) {
524 if (cpu_isset(cpu, cpu_callin_map))
525 break; /* It has booted */
530 if (!cpu_isset(cpu, cpu_callin_map)) {
531 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
532 ia64_cpu_to_sapicid[cpu] = -1;
533 cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */
543 get_option (&str, &ticks);
547 __setup("decay=", decay);
550 * Initialize the logical CPU number to SAPICID mapping
553 smp_build_cpu_map (void)
556 int boot_cpu_id = hard_smp_processor_id();
558 for (cpu = 0; cpu < NR_CPUS; cpu++) {
559 ia64_cpu_to_sapicid[cpu] = -1;
562 ia64_cpu_to_sapicid[0] = boot_cpu_id;
563 cpus_clear(cpu_present_map);
564 cpu_set(0, cpu_present_map);
565 cpu_set(0, cpu_possible_map);
566 for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
567 sapicid = smp_boot_data.cpu_phys_id[i];
568 if (sapicid == boot_cpu_id)
570 cpu_set(cpu, cpu_present_map);
571 cpu_set(cpu, cpu_possible_map);
572 ia64_cpu_to_sapicid[cpu] = sapicid;
578 * Cycle through the APs sending Wakeup IPIs to boot each.
581 smp_prepare_cpus (unsigned int max_cpus)
583 int boot_cpu_id = hard_smp_processor_id();
586 * Initialize the per-CPU profiling counter/multiplier
589 smp_setup_percpu_timer();
592 * We have the boot CPU online for sure.
594 cpu_set(0, cpu_online_map);
595 cpu_set(0, cpu_callin_map);
597 local_cpu_data->loops_per_jiffy = loops_per_jiffy;
598 ia64_cpu_to_sapicid[0] = boot_cpu_id;
600 printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
602 current_thread_info()->cpu = 0;
605 * If SMP should be disabled, then really disable it!
608 printk(KERN_INFO "SMP mode deactivated.\n");
609 cpus_clear(cpu_online_map);
610 cpus_clear(cpu_present_map);
611 cpus_clear(cpu_possible_map);
612 cpu_set(0, cpu_online_map);
613 cpu_set(0, cpu_present_map);
614 cpu_set(0, cpu_possible_map);
619 void __devinit smp_prepare_boot_cpu(void)
621 cpu_set(smp_processor_id(), cpu_online_map);
622 cpu_set(smp_processor_id(), cpu_callin_map);
623 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
626 #ifdef CONFIG_HOTPLUG_CPU
628 clear_cpu_sibling_map(int cpu)
632 for_each_cpu_mask(i, cpu_sibling_map[cpu])
633 cpu_clear(cpu, cpu_sibling_map[i]);
634 for_each_cpu_mask(i, cpu_core_map[cpu])
635 cpu_clear(cpu, cpu_core_map[i]);
637 cpu_sibling_map[cpu] = cpu_core_map[cpu] = CPU_MASK_NONE;
641 remove_siblinginfo(int cpu)
645 if (cpu_data(cpu)->threads_per_core == 1 &&
646 cpu_data(cpu)->cores_per_socket == 1) {
647 cpu_clear(cpu, cpu_core_map[cpu]);
648 cpu_clear(cpu, cpu_sibling_map[cpu]);
652 last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0);
654 /* remove it from all sibling map's */
655 clear_cpu_sibling_map(cpu);
658 extern void fixup_irqs(void);
660 int migrate_platform_irqs(unsigned int cpu)
663 irq_desc_t *desc = NULL;
668 * dont permit CPEI target to removed.
670 if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
671 printk ("CPU (%d) is CPEI Target\n", cpu);
672 if (can_cpei_retarget()) {
674 * Now re-target the CPEI to a different processor
676 new_cpei_cpu = any_online_cpu(cpu_online_map);
677 mask = cpumask_of_cpu(new_cpei_cpu);
678 set_cpei_target_cpu(new_cpei_cpu);
679 desc = irq_desc + ia64_cpe_irq;
681 * Switch for now, immediatly, we need to do fake intr
682 * as other interrupts, but need to study CPEI behaviour with
683 * polling before making changes.
686 desc->chip->disable(ia64_cpe_irq);
687 desc->chip->set_affinity(ia64_cpe_irq, mask);
688 desc->chip->enable(ia64_cpe_irq);
689 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
693 printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
700 /* must be called with cpucontrol mutex held */
701 int __cpu_disable(void)
703 int cpu = smp_processor_id();
706 * dont permit boot processor for now
708 if (cpu == 0 && !bsp_remove_ok) {
709 printk ("Your platform does not support removal of BSP\n");
713 cpu_clear(cpu, cpu_online_map);
715 if (migrate_platform_irqs(cpu)) {
716 cpu_set(cpu, cpu_online_map);
720 remove_siblinginfo(cpu);
721 cpu_clear(cpu, cpu_online_map);
723 local_flush_tlb_all();
724 cpu_clear(cpu, cpu_callin_map);
728 void __cpu_die(unsigned int cpu)
732 for (i = 0; i < 100; i++) {
733 /* They ack this in play_dead by setting CPU_DEAD */
734 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
736 printk ("CPU %d is now offline\n", cpu);
741 printk(KERN_ERR "CPU %u didn't die...\n", cpu);
743 #else /* !CONFIG_HOTPLUG_CPU */
744 int __cpu_disable(void)
749 void __cpu_die(unsigned int cpu)
751 /* We said "no" in __cpu_disable */
754 #endif /* CONFIG_HOTPLUG_CPU */
757 smp_cpus_done (unsigned int dummy)
760 unsigned long bogosum = 0;
763 * Allow the user to impress friends.
766 for_each_online_cpu(cpu) {
767 bogosum += cpu_data(cpu)->loops_per_jiffy;
770 printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
771 (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
774 static inline void __devinit
775 set_cpu_sibling_map(int cpu)
779 for_each_online_cpu(i) {
780 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
781 cpu_set(i, cpu_core_map[cpu]);
782 cpu_set(cpu, cpu_core_map[i]);
783 if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
784 cpu_set(i, cpu_sibling_map[cpu]);
785 cpu_set(cpu, cpu_sibling_map[i]);
792 __cpu_up (unsigned int cpu)
797 sapicid = ia64_cpu_to_sapicid[cpu];
802 * Already booted cpu? not valid anymore since we dont
803 * do idle loop tightspin anymore.
805 if (cpu_isset(cpu, cpu_callin_map))
808 per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
809 /* Processor goes to start_secondary(), sets online flag */
810 ret = do_boot_cpu(sapicid, cpu);
814 if (cpu_data(cpu)->threads_per_core == 1 &&
815 cpu_data(cpu)->cores_per_socket == 1) {
816 cpu_set(cpu, cpu_sibling_map[cpu]);
817 cpu_set(cpu, cpu_core_map[cpu]);
821 set_cpu_sibling_map(cpu);
827 * Assume that CPU's have been discovered by some platform-dependent interface. For
828 * SoftSDV/Lion, that would be ACPI.
830 * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
833 init_smp_config(void)
841 /* Tell SAL where to drop the AP's. */
842 ap_startup = (struct fptr *) start_ap;
843 sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
844 ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
846 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
847 ia64_sal_strerror(sal_ret));
851 * identify_siblings(cpu) gets called from identify_cpu. This populates the
852 * information related to logical execution units in per_cpu_data structure.
855 identify_siblings(struct cpuinfo_ia64 *c)
859 pal_logical_to_physical_t info;
861 if (smp_num_cpucores == 1 && smp_num_siblings == 1)
864 if ((status = ia64_pal_logical_to_phys(-1, &info)) != PAL_STATUS_SUCCESS) {
865 printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
869 if ((status = ia64_sal_physical_id_info(&pltid)) != PAL_STATUS_SUCCESS) {
870 printk(KERN_ERR "ia64_sal_pltid failed with %ld\n", status);
874 c->socket_id = (pltid << 8) | info.overview_ppid;
875 c->cores_per_socket = info.overview_cpp;
876 c->threads_per_core = info.overview_tpc;
877 c->num_log = info.overview_num_log;
879 c->core_id = info.log1_cid;
880 c->thread_id = info.log1_tid;