Merge refs/heads/upstream from master.kernel.org:/pub/scm/linux/kernel/git/jgarzik...
[linux-2.6] / arch / ppc64 / kernel / LparData.c
1 /* 
2  * Copyright 2001 Mike Corrigan, IBM Corp
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version
7  * 2 of the License, or (at your option) any later version.
8  */
9 #include <linux/config.h>
10 #include <linux/types.h>
11 #include <linux/threads.h>
12 #include <linux/module.h>
13 #include <linux/bitops.h>
14 #include <asm/processor.h>
15 #include <asm/ptrace.h>
16 #include <asm/naca.h>
17 #include <asm/abs_addr.h>
18 #include <asm/iSeries/ItLpNaca.h>
19 #include <asm/lppaca.h>
20 #include <asm/iSeries/ItLpRegSave.h>
21 #include <asm/paca.h>
22 #include <asm/iSeries/HvReleaseData.h>
23 #include <asm/iSeries/LparMap.h>
24 #include <asm/iSeries/ItVpdAreas.h>
25 #include <asm/iSeries/ItIplParmsReal.h>
26 #include <asm/iSeries/ItExtVpdPanel.h>
27 #include <asm/iSeries/ItLpQueue.h>
28 #include <asm/iSeries/IoHriProcessorVpd.h>
29 #include <asm/iSeries/ItSpCommArea.h>
30
31
32 /* The HvReleaseData is the root of the information shared between 
33  * the hypervisor and Linux.  
34  */
35 struct HvReleaseData hvReleaseData = {
36         .xDesc = 0xc8a5d9c4,    /* "HvRD" ebcdic */
37         .xSize = sizeof(struct HvReleaseData),
38         .xVpdAreasPtrOffset = offsetof(struct naca_struct, xItVpdAreas),
39         .xSlicNacaAddr = &naca,         /* 64-bit Naca address */
40         .xMsNucDataOffset = LPARMAP_PHYS,
41         .xFlags = HVREL_TAGSINACTIVE    /* tags inactive       */
42                                         /* 64 bit              */
43                                         /* shared processors   */
44                                         /* HMT allowed         */
45                   | 6,                  /* TEMP: This allows non-GA driver */
46         .xVrmIndex = 4,                 /* We are v5r2m0               */
47         .xMinSupportedPlicVrmIndex = 3,         /* v5r1m0 */
48         .xMinCompatablePlicVrmIndex = 3,        /* v5r1m0 */
49         .xVrmName = { 0xd3, 0x89, 0x95, 0xa4,   /* "Linux 2.4.64" ebcdic */
50                 0xa7, 0x40, 0xf2, 0x4b,
51                 0xf4, 0x4b, 0xf6, 0xf4 },
52 };
53
54 /*
55  * The NACA.  The first dword of the naca is required by the iSeries
56  * hypervisor to point to itVpdAreas.  The hypervisor finds the NACA
57  * through the pointer in hvReleaseData.
58  */
59 struct naca_struct naca = {
60         .xItVpdAreas = &itVpdAreas,
61         .xRamDisk = 0,
62         .xRamDiskSize = 0,
63 };
64
65 extern void system_reset_iSeries(void);
66 extern void machine_check_iSeries(void);
67 extern void data_access_iSeries(void);
68 extern void instruction_access_iSeries(void);
69 extern void hardware_interrupt_iSeries(void);
70 extern void alignment_iSeries(void);
71 extern void program_check_iSeries(void);
72 extern void fp_unavailable_iSeries(void);
73 extern void decrementer_iSeries(void);
74 extern void trap_0a_iSeries(void);
75 extern void trap_0b_iSeries(void);
76 extern void system_call_iSeries(void);
77 extern void single_step_iSeries(void);
78 extern void trap_0e_iSeries(void);
79 extern void performance_monitor_iSeries(void);
80 extern void data_access_slb_iSeries(void);
81 extern void instruction_access_slb_iSeries(void);
82         
83 struct ItLpNaca itLpNaca = {
84         .xDesc = 0xd397d581,            /* "LpNa" ebcdic */
85         .xSize = 0x0400,                /* size of ItLpNaca */
86         .xIntHdlrOffset = 0x0300,       /* offset to int array */
87         .xMaxIntHdlrEntries = 19,       /* # ents */
88         .xPrimaryLpIndex = 0,           /* Part # of primary */
89         .xServiceLpIndex = 0,           /* Part # of serv */
90         .xLpIndex = 0,                  /* Part # of me */
91         .xMaxLpQueues = 0,              /* # of LP queues */
92         .xLpQueueOffset = 0x100,        /* offset of start of LP queues */
93         .xPirEnvironMode = 0,           /* Piranha stuff */
94         .xPirConsoleMode = 0,
95         .xPirDasdMode = 0,
96         .xLparInstalled = 0,
97         .xSysPartitioned = 0,
98         .xHwSyncedTBs = 0,
99         .xIntProcUtilHmt = 0,
100         .xSpVpdFormat = 0,
101         .xIntProcRatio = 0,
102         .xPlicVrmIndex = 0,             /* VRM index of PLIC */
103         .xMinSupportedSlicVrmInd = 0,   /* min supported SLIC */
104         .xMinCompatableSlicVrmInd = 0,  /* min compat SLIC */
105         .xLoadAreaAddr = 0,             /* 64-bit addr of load area */
106         .xLoadAreaChunks = 0,           /* chunks for load area */
107         .xPaseSysCallCRMask = 0,        /* PASE mask */
108         .xSlicSegmentTablePtr = 0,      /* seg table */
109         .xOldLpQueue = { 0 },           /* Old LP Queue */
110         .xInterruptHdlr = {
111                 (u64)system_reset_iSeries,      /* 0x100 System Reset */
112                 (u64)machine_check_iSeries,     /* 0x200 Machine Check */
113                 (u64)data_access_iSeries,       /* 0x300 Data Access */
114                 (u64)instruction_access_iSeries, /* 0x400 Instruction Access */
115                 (u64)hardware_interrupt_iSeries, /* 0x500 External */
116                 (u64)alignment_iSeries,         /* 0x600 Alignment */
117                 (u64)program_check_iSeries,     /* 0x700 Program Check */
118                 (u64)fp_unavailable_iSeries,    /* 0x800 FP Unavailable */
119                 (u64)decrementer_iSeries,       /* 0x900 Decrementer */
120                 (u64)trap_0a_iSeries,           /* 0xa00 Trap 0A */
121                 (u64)trap_0b_iSeries,           /* 0xb00 Trap 0B */
122                 (u64)system_call_iSeries,       /* 0xc00 System Call */
123                 (u64)single_step_iSeries,       /* 0xd00 Single Step */
124                 (u64)trap_0e_iSeries,           /* 0xe00 Trap 0E */
125                 (u64)performance_monitor_iSeries,/* 0xf00 Performance Monitor */
126                 0,                              /* int 0x1000 */
127                 0,                              /* int 0x1010 */
128                 0,                              /* int 0x1020 CPU ctls */
129                 (u64)hardware_interrupt_iSeries, /* SC Ret Hdlr */
130                 (u64)data_access_slb_iSeries,   /* 0x380 D-SLB */
131                 (u64)instruction_access_slb_iSeries /* 0x480 I-SLB */
132         }
133 };
134 EXPORT_SYMBOL(itLpNaca);
135
136 /* May be filled in by the hypervisor so cannot end up in the BSS */
137 struct ItIplParmsReal xItIplParmsReal __attribute__((__section__(".data"))); 
138
139 /* May be filled in by the hypervisor so cannot end up in the BSS */
140 struct ItExtVpdPanel xItExtVpdPanel __attribute__((__section__(".data")));
141 EXPORT_SYMBOL(xItExtVpdPanel);
142
143 #define maxPhysicalProcessors 32
144
145 struct IoHriProcessorVpd xIoHriProcessorVpd[maxPhysicalProcessors] = {
146         {
147                 .xInstCacheOperandSize = 32,
148                 .xDataCacheOperandSize = 32,
149                 .xProcFreq     = 50000000,
150                 .xTimeBaseFreq = 50000000,
151                 .xPVR = 0x3600
152         }
153 };
154         
155 /* Space for Main Store Vpd 27,200 bytes */
156 /* May be filled in by the hypervisor so cannot end up in the BSS */
157 u64    xMsVpd[3400] __attribute__((__section__(".data")));
158
159 /* Space for Recovery Log Buffer */
160 /* May be filled in by the hypervisor so cannot end up in the BSS */
161 u64    xRecoveryLogBuffer[32] __attribute__((__section__(".data")));
162
163 struct SpCommArea xSpCommArea = {
164         .xDesc = 0xE2D7C3C2,
165         .xFormat = 1,
166 };
167
168 /* The LparMap data is now located at offset 0x6000 in head.S
169  * It was put there so that the HvReleaseData could address it
170  * with a 32-bit offset as required by the iSeries hypervisor
171  *
172  * The Naca has a pointer to the ItVpdAreas.  The hypervisor finds
173  * the Naca via the HvReleaseData area.  The HvReleaseData has the
174  * offset into the Naca of the pointer to the ItVpdAreas.
175  */
176 struct ItVpdAreas itVpdAreas = {
177         .xSlicDesc = 0xc9a3e5c1,                /* "ItVA" */
178         .xSlicSize = sizeof(struct ItVpdAreas),
179         .xSlicVpdEntries = ItVpdMaxEntries,     /* # VPD array entries */
180         .xSlicDmaEntries = ItDmaMaxEntries,     /* # DMA array entries */
181         .xSlicMaxLogicalProcs = NR_CPUS * 2,    /* Max logical procs */
182         .xSlicMaxPhysicalProcs = maxPhysicalProcessors, /* Max physical procs */
183         .xSlicDmaToksOffset = offsetof(struct ItVpdAreas, xPlicDmaToks),
184         .xSlicVpdAdrsOffset = offsetof(struct ItVpdAreas, xSlicVpdAdrs),
185         .xSlicDmaLensOffset = offsetof(struct ItVpdAreas, xPlicDmaLens),
186         .xSlicVpdLensOffset = offsetof(struct ItVpdAreas, xSlicVpdLens),
187         .xSlicMaxSlotLabels = 0,                /* max slot labels */
188         .xSlicMaxLpQueues = 1,                  /* max LP queues */
189         .xPlicDmaLens = { 0 },                  /* DMA lengths */
190         .xPlicDmaToks = { 0 },                  /* DMA tokens */
191         .xSlicVpdLens = {                       /* VPD lengths */
192                 0,0,0,                  /*  0 - 2 */
193                 sizeof(xItExtVpdPanel), /*       3 Extended VPD   */
194                 sizeof(struct paca_struct),     /*       4 length of Paca  */
195                 0,                      /*       5 */
196                 sizeof(struct ItIplParmsReal),/* 6 length of IPL parms */
197                 26992,                  /*       7 length of MS VPD */
198                 0,                      /*       8 */
199                 sizeof(struct ItLpNaca),/*       9 length of LP Naca */
200                 0,                      /*      10 */
201                 256,                    /*      11 length of Recovery Log Buf */
202                 sizeof(struct SpCommArea), /*   12 length of SP Comm Area */
203                 0,0,0,                  /* 13 - 15 */
204                 sizeof(struct IoHriProcessorVpd),/* 16 length of Proc Vpd */
205                 0,0,0,0,0,0,            /* 17 - 22  */
206                 sizeof(struct hvlpevent_queue), /* 23 length of Lp Queue */
207                 0,0                     /* 24 - 25 */
208                 },
209         .xSlicVpdAdrs = {                       /* VPD addresses */
210                 0,0,0,                  /*       0 -  2 */
211                 &xItExtVpdPanel,        /*       3 Extended VPD */
212                 &paca[0],               /*       4 first Paca */
213                 0,                      /*       5 */
214                 &xItIplParmsReal,       /*       6 IPL parms */
215                 &xMsVpd,                /*       7 MS Vpd */
216                 0,                      /*       8 */
217                 &itLpNaca,              /*       9 LpNaca */
218                 0,                      /*      10 */
219                 &xRecoveryLogBuffer,    /*      11 Recovery Log Buffer */
220                 &xSpCommArea,           /*      12 SP Comm Area */
221                 0,0,0,                  /* 13 - 15 */
222                 &xIoHriProcessorVpd,    /*      16 Proc Vpd */
223                 0,0,0,0,0,0,            /* 17 - 22 */
224                 &hvlpevent_queue,       /*      23 Lp Queue */
225                 0,0
226         }
227 };