2 * File: arch/blackfin/mach-bf533/boards/cm_bf533.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
7 * Description: Board description file
10 * Copyright 2004-2006 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #include <linux/device.h>
31 #include <linux/platform_device.h>
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/flash.h>
36 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
37 #include <linux/usb/isp1362.h>
39 #include <linux/ata_platform.h>
40 #include <linux/irq.h>
42 #include <asm/bfin5xx_spi.h>
43 #include <asm/portmux.h>
47 * Name the Board for the /proc/cpuinfo
49 const char bfin_board_name[] = "Bluetechnix CM BF533";
51 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
52 /* all SPI peripherals info goes here */
53 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
54 static struct mtd_partition bfin_spi_flash_partitions[] = {
56 .name = "bootloader(spi)",
59 .mask_flags = MTD_CAP_ROM
61 .name = "linux kernel(spi)",
65 .name = "file system(spi)",
71 static struct flash_platform_data bfin_spi_flash_data = {
73 .parts = bfin_spi_flash_partitions,
74 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
78 /* SPI flash chip (m25p64) */
79 static struct bfin5xx_spi_chip spi_flash_chip_info = {
80 .enable_dma = 0, /* use dma transfer with this chip*/
86 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
87 static struct bfin5xx_spi_chip spi_adc_chip_info = {
88 .enable_dma = 1, /* use dma transfer with this chip*/
93 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
94 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
100 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
101 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
107 static struct spi_board_info bfin_spi_board_info[] __initdata = {
108 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
110 /* the modalias must be the same as spi device driver name */
111 .modalias = "m25p80", /* Name of spi_driver for this device */
112 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
113 .bus_num = 0, /* Framework bus number */
114 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
115 .platform_data = &bfin_spi_flash_data,
116 .controller_data = &spi_flash_chip_info,
121 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
123 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
124 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
125 .bus_num = 0, /* Framework bus number */
126 .chip_select = 2, /* Framework chip select. */
127 .platform_data = NULL, /* No spi_driver specific config */
128 .controller_data = &spi_adc_chip_info,
132 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
134 .modalias = "ad1836-spi",
135 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
137 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
138 .controller_data = &ad1836_spi_chip_info,
142 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
144 .modalias = "spi_mmc_dummy",
145 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
148 .platform_data = NULL,
149 .controller_data = &spi_mmc_chip_info,
153 .modalias = "spi_mmc",
154 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
156 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
157 .platform_data = NULL,
158 .controller_data = &spi_mmc_chip_info,
165 static struct resource bfin_spi0_resource[] = {
167 .start = SPI0_REGBASE,
168 .end = SPI0_REGBASE + 0xFF,
169 .flags = IORESOURCE_MEM,
174 .flags = IORESOURCE_IRQ,
178 /* SPI controller data */
179 static struct bfin5xx_spi_master bfin_spi0_info = {
181 .enable_dma = 1, /* master has the ability to do dma transfer */
182 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
185 static struct platform_device bfin_spi0_device = {
187 .id = 0, /* Bus number */
188 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
189 .resource = bfin_spi0_resource,
191 .platform_data = &bfin_spi0_info, /* Passed to driver */
194 #endif /* spi master and devices */
196 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
197 static struct platform_device rtc_device = {
203 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
204 static struct resource smc91x_resources[] = {
207 .end = 0x20200300 + 16,
208 .flags = IORESOURCE_MEM,
212 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
215 static struct platform_device smc91x_device = {
218 .num_resources = ARRAY_SIZE(smc91x_resources),
219 .resource = smc91x_resources,
223 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
224 static struct resource bfin_uart_resources[] = {
228 .flags = IORESOURCE_MEM,
232 static struct platform_device bfin_uart_device = {
235 .num_resources = ARRAY_SIZE(bfin_uart_resources),
236 .resource = bfin_uart_resources,
240 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
241 static struct resource bfin_sir_resources[] = {
242 #ifdef CONFIG_BFIN_SIR0
246 .flags = IORESOURCE_MEM,
251 static struct platform_device bfin_sir_device = {
254 .num_resources = ARRAY_SIZE(bfin_sir_resources),
255 .resource = bfin_sir_resources,
259 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
260 static struct platform_device bfin_sport0_uart_device = {
261 .name = "bfin-sport-uart",
265 static struct platform_device bfin_sport1_uart_device = {
266 .name = "bfin-sport-uart",
271 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
272 static struct resource isp1362_hcd_resources[] = {
276 .flags = IORESOURCE_MEM,
280 .flags = IORESOURCE_MEM,
284 .flags = IORESOURCE_IRQ,
288 static struct isp1362_platform_data isp1362_priv = {
293 .int_edge_triggered = 0,
294 .remote_wakeup_connected = 0,
295 .no_power_switching = 1,
296 .power_switching_mode = 0,
299 static struct platform_device isp1362_hcd_device = {
300 .name = "isp1362-hcd",
303 .platform_data = &isp1362_priv,
305 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
306 .resource = isp1362_hcd_resources,
310 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
313 static struct pata_platform_info bfin_pata_platform_data = {
315 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
318 static struct resource bfin_pata_resources[] = {
322 .flags = IORESOURCE_MEM,
327 .flags = IORESOURCE_MEM,
332 .flags = IORESOURCE_IRQ,
336 static struct platform_device bfin_pata_device = {
337 .name = "pata_platform",
339 .num_resources = ARRAY_SIZE(bfin_pata_resources),
340 .resource = bfin_pata_resources,
342 .platform_data = &bfin_pata_platform_data,
347 static const unsigned int cclk_vlev_datasheet[] =
349 VRPAIR(VLEV_085, 250000000),
350 VRPAIR(VLEV_090, 376000000),
351 VRPAIR(VLEV_095, 426000000),
352 VRPAIR(VLEV_100, 426000000),
353 VRPAIR(VLEV_105, 476000000),
354 VRPAIR(VLEV_110, 476000000),
355 VRPAIR(VLEV_115, 476000000),
356 VRPAIR(VLEV_120, 600000000),
357 VRPAIR(VLEV_125, 600000000),
358 VRPAIR(VLEV_130, 600000000),
361 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
362 .tuple_tab = cclk_vlev_datasheet,
363 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
364 .vr_settling_time = 25 /* us */,
367 static struct platform_device bfin_dpmc = {
370 .platform_data = &bfin_dmpc_vreg_data,
374 static struct platform_device *cm_bf533_devices[] __initdata = {
378 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
382 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
386 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
387 &bfin_sport0_uart_device,
388 &bfin_sport1_uart_device,
391 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
395 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
399 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
403 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
407 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
412 static int __init cm_bf533_init(void)
414 printk(KERN_INFO "%s(): registering device resources\n", __func__);
415 platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
416 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
417 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
420 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
421 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
426 arch_initcall(cm_bf533_init);