2 * Driver for the NXP ISP1760 chip
4 * However, the code might contain some bugs. What doesn't work for sure is:
7 e The interrupt line is configured as active low, level.
9 * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/slab.h>
15 #include <linux/list.h>
16 #include <linux/usb.h>
17 #include <linux/debugfs.h>
18 #include <linux/uaccess.h>
20 #include <asm/unaligned.h>
22 #include "../core/hcd.h"
23 #include "isp1760-hcd.h"
25 static struct kmem_cache *qtd_cachep;
26 static struct kmem_cache *qh_cachep;
31 struct inter_packet_info atl_ints[32];
32 struct inter_packet_info int_ints[32];
33 struct memory_chunk memory_pool[BLOCKS];
35 /* periodic schedule support */
36 #define DEFAULT_I_TDPS 1024
37 unsigned periodic_size;
39 unsigned long reset_done;
40 unsigned long next_statechange;
41 unsigned int devflags;
44 static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd)
46 return (struct isp1760_hcd *) (hcd->hcd_priv);
48 static inline struct usb_hcd *priv_to_hcd(struct isp1760_hcd *priv)
50 return container_of((void *) priv, struct usb_hcd, hcd_priv);
53 /* Section 2.2 Host Controller Capability Registers */
54 #define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */
55 #define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */
56 #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */
57 #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */
58 #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */
59 #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */
60 #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */
62 /* Section 2.3 Host Controller Operational Registers */
63 #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */
64 #define CMD_RESET (1<<1) /* reset HC not bus */
65 #define CMD_RUN (1<<0) /* start/stop HC */
66 #define STS_PCD (1<<2) /* port change detect */
67 #define FLAG_CF (1<<0) /* true: we'll support "high speed" */
69 #define PORT_OWNER (1<<13) /* true: companion hc owns this port */
70 #define PORT_POWER (1<<12) /* true: has power (see PPC) */
71 #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */
72 #define PORT_RESET (1<<8) /* reset port */
73 #define PORT_SUSPEND (1<<7) /* suspend port */
74 #define PORT_RESUME (1<<6) /* resume it */
75 #define PORT_PE (1<<2) /* port enable */
76 #define PORT_CSC (1<<1) /* connect status change */
77 #define PORT_CONNECT (1<<0) /* device connected */
78 #define PORT_RWC_BITS (PORT_CSC)
81 struct isp1760_qtd *hw_next;
86 /* the rest is HCD-private */
87 struct list_head qtd_list;
93 #define URB_COMPLETE_NOTIFY (1 << 0)
94 #define URB_ENQUEUED (1 << 1)
95 #define URB_TYPE_ATL (1 << 2)
96 #define URB_TYPE_INT (1 << 3)
100 /* first part defined by EHCI spec */
101 struct list_head qtd_list;
102 struct isp1760_hcd *priv;
104 /* periodic schedule info */
105 unsigned short period; /* polling interval */
106 struct usb_device *dev;
112 #define ehci_port_speed(priv, portsc) (1 << USB_PORT_FEAT_HIGHSPEED)
114 static unsigned int isp1760_readl(__u32 __iomem *regs)
119 static void isp1760_writel(const unsigned int val, __u32 __iomem *regs)
125 * The next two copy via MMIO data to/from the device. memcpy_{to|from}io()
126 * doesn't quite work because some people have to enforce 32-bit access
128 static void priv_read_copy(struct isp1760_hcd *priv, u32 *src,
129 __u32 __iomem *dst, u32 len)
135 printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len);
140 *src = __raw_readl(dst);
149 /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully
152 val = isp1760_readl(dst);
164 static void priv_write_copy(const struct isp1760_hcd *priv, const u32 *src,
165 __u32 __iomem *dst, u32 len)
168 __raw_writel(*src, dst);
176 /* in case we have 3, 2 or 1 by left. The buffer is allocated and the
177 * extra bytes should not be read by the HW
180 __raw_writel(*src, dst);
183 /* memory management of the 60kb on the chip from 0x1000 to 0xffff */
184 static void init_memory(struct isp1760_hcd *priv)
190 for (i = 0; i < BLOCK_1_NUM; i++) {
191 priv->memory_pool[i].start = payload;
192 priv->memory_pool[i].size = BLOCK_1_SIZE;
193 priv->memory_pool[i].free = 1;
194 payload += priv->memory_pool[i].size;
198 for (i = BLOCK_1_NUM; i < BLOCK_1_NUM + BLOCK_2_NUM; i++) {
199 priv->memory_pool[i].start = payload;
200 priv->memory_pool[i].size = BLOCK_2_SIZE;
201 priv->memory_pool[i].free = 1;
202 payload += priv->memory_pool[i].size;
206 for (i = BLOCK_1_NUM + BLOCK_2_NUM; i < BLOCKS; i++) {
207 priv->memory_pool[i].start = payload;
208 priv->memory_pool[i].size = BLOCK_3_SIZE;
209 priv->memory_pool[i].free = 1;
210 payload += priv->memory_pool[i].size;
213 BUG_ON(payload - priv->memory_pool[i - 1].size > PAYLOAD_SIZE);
216 static u32 alloc_mem(struct isp1760_hcd *priv, u32 size)
221 return ISP1760_NULL_POINTER;
223 for (i = 0; i < BLOCKS; i++) {
224 if (priv->memory_pool[i].size >= size &&
225 priv->memory_pool[i].free) {
227 priv->memory_pool[i].free = 0;
228 return priv->memory_pool[i].start;
232 printk(KERN_ERR "ISP1760 MEM: can not allocate %d bytes of memory\n",
234 printk(KERN_ERR "Current memory map:\n");
235 for (i = 0; i < BLOCKS; i++) {
236 printk(KERN_ERR "Pool %2d size %4d status: %d\n",
237 i, priv->memory_pool[i].size,
238 priv->memory_pool[i].free);
240 /* XXX maybe -ENOMEM could be possible */
245 static void free_mem(struct isp1760_hcd *priv, u32 mem)
249 if (mem == ISP1760_NULL_POINTER)
252 for (i = 0; i < BLOCKS; i++) {
253 if (priv->memory_pool[i].start == mem) {
255 BUG_ON(priv->memory_pool[i].free);
257 priv->memory_pool[i].free = 1;
262 printk(KERN_ERR "Trying to free not-here-allocated memory :%08x\n",
267 static void isp1760_init_regs(struct usb_hcd *hcd)
269 isp1760_writel(0, hcd->regs + HC_BUFFER_STATUS_REG);
270 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
271 HC_ATL_PTD_SKIPMAP_REG);
272 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
273 HC_INT_PTD_SKIPMAP_REG);
274 isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs +
275 HC_ISO_PTD_SKIPMAP_REG);
277 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
278 HC_ATL_PTD_DONEMAP_REG);
279 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
280 HC_INT_PTD_DONEMAP_REG);
281 isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs +
282 HC_ISO_PTD_DONEMAP_REG);
285 static int handshake(struct isp1760_hcd *priv, void __iomem *ptr,
286 u32 mask, u32 done, int usec)
291 result = isp1760_readl(ptr);
303 /* reset a non-running (STS_HALT == 1) controller */
304 static int ehci_reset(struct isp1760_hcd *priv)
307 struct usb_hcd *hcd = priv_to_hcd(priv);
308 u32 command = isp1760_readl(hcd->regs + HC_USBCMD);
310 command |= CMD_RESET;
311 isp1760_writel(command, hcd->regs + HC_USBCMD);
312 hcd->state = HC_STATE_HALT;
313 priv->next_statechange = jiffies;
314 retval = handshake(priv, hcd->regs + HC_USBCMD,
315 CMD_RESET, 0, 250 * 1000);
319 static void qh_destroy(struct isp1760_qh *qh)
321 BUG_ON(!list_empty(&qh->qtd_list));
322 kmem_cache_free(qh_cachep, qh);
325 static struct isp1760_qh *isp1760_qh_alloc(struct isp1760_hcd *priv,
328 struct isp1760_qh *qh;
330 qh = kmem_cache_zalloc(qh_cachep, flags);
334 INIT_LIST_HEAD(&qh->qtd_list);
339 /* magic numbers that can affect system performance */
340 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
341 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
342 #define EHCI_TUNE_RL_TT 0
343 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
344 #define EHCI_TUNE_MULT_TT 1
345 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
347 /* one-time init, only for memory state */
348 static int priv_init(struct usb_hcd *hcd)
350 struct isp1760_hcd *priv = hcd_to_priv(hcd);
353 spin_lock_init(&priv->lock);
356 * hw default: 1K periodic list heads, one per frame.
357 * periodic_size can shrink by USBCMD update if hcc_params allows.
359 priv->periodic_size = DEFAULT_I_TDPS;
361 /* controllers may cache some of the periodic schedule ... */
362 hcc_params = isp1760_readl(hcd->regs + HC_HCCPARAMS);
363 /* full frame cache */
364 if (HCC_ISOC_CACHE(hcc_params))
366 else /* N microframes cached */
367 priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
372 static int isp1760_hc_setup(struct usb_hcd *hcd)
374 struct isp1760_hcd *priv = hcd_to_priv(hcd);
378 /* Setup HW Mode Control: This assumes a level active-low interrupt */
379 hwmode = HW_DATA_BUS_32BIT;
381 if (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16)
382 hwmode &= ~HW_DATA_BUS_32BIT;
383 if (priv->devflags & ISP1760_FLAG_ANALOG_OC)
384 hwmode |= HW_ANA_DIGI_OC;
385 if (priv->devflags & ISP1760_FLAG_DACK_POL_HIGH)
386 hwmode |= HW_DACK_POL_HIGH;
387 if (priv->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
388 hwmode |= HW_DREQ_POL_HIGH;
391 * We have to set this first in case we're in 16-bit mode.
392 * Write it twice to ensure correct upper bits if switching
395 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
396 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
398 isp1760_writel(0xdeadbabe, hcd->regs + HC_SCRATCH_REG);
399 /* Change bus pattern */
400 scratch = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
401 scratch = isp1760_readl(hcd->regs + HC_SCRATCH_REG);
402 if (scratch != 0xdeadbabe) {
403 printk(KERN_ERR "ISP1760: Scratch test failed.\n");
408 isp1760_init_regs(hcd);
411 isp1760_writel(SW_RESET_RESET_ALL, hcd->regs + HC_RESET_REG);
414 isp1760_writel(SW_RESET_RESET_HC, hcd->regs + HC_RESET_REG);
417 result = ehci_reset(priv);
423 isp1760_info(priv, "bus width: %d, oc: %s\n",
424 (priv->devflags & ISP1760_FLAG_BUS_WIDTH_16) ?
425 16 : 32, (priv->devflags & ISP1760_FLAG_ANALOG_OC) ?
426 "analog" : "digital");
429 isp1760_writel(hwmode | ALL_ATX_RESET, hcd->regs + HC_HW_MODE_CTRL);
431 isp1760_writel(hwmode, hcd->regs + HC_HW_MODE_CTRL);
433 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_REG);
434 isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_ENABLE);
437 * PORT 1 Control register of the ISP1760 is the OTG control
438 * register on ISP1761. Since there is no OTG or device controller
439 * support in this driver, we use port 1 as a "normal" USB host port on
442 isp1760_writel(PORT1_POWER | PORT1_INIT2,
443 hcd->regs + HC_PORT1_CTRL);
446 priv->hcs_params = isp1760_readl(hcd->regs + HC_HCSPARAMS);
448 return priv_init(hcd);
451 static void isp1760_init_maps(struct usb_hcd *hcd)
453 /*set last maps, for iso its only 1, else 32 tds bitmap*/
454 isp1760_writel(0x80000000, hcd->regs + HC_ATL_PTD_LASTPTD_REG);
455 isp1760_writel(0x80000000, hcd->regs + HC_INT_PTD_LASTPTD_REG);
456 isp1760_writel(0x00000001, hcd->regs + HC_ISO_PTD_LASTPTD_REG);
459 static void isp1760_enable_interrupts(struct usb_hcd *hcd)
461 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_AND_REG);
462 isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
463 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_AND_REG);
464 isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
465 isp1760_writel(0, hcd->regs + HC_ISO_IRQ_MASK_AND_REG);
466 isp1760_writel(0xffffffff, hcd->regs + HC_ISO_IRQ_MASK_OR_REG);
470 static int isp1760_run(struct usb_hcd *hcd)
472 struct isp1760_hcd *priv = hcd_to_priv(hcd);
478 hcd->uses_new_polling = 1;
481 hcd->state = HC_STATE_RUNNING;
482 isp1760_enable_interrupts(hcd);
483 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
484 isp1760_writel(temp | HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
486 command = isp1760_readl(hcd->regs + HC_USBCMD);
487 command &= ~(CMD_LRESET|CMD_RESET);
489 isp1760_writel(command, hcd->regs + HC_USBCMD);
491 retval = handshake(priv, hcd->regs + HC_USBCMD, CMD_RUN, CMD_RUN,
498 * Spec says to write FLAG_CF as last config action, priv code grabs
499 * the semaphore while doing so.
501 down_write(&ehci_cf_port_reset_rwsem);
502 isp1760_writel(FLAG_CF, hcd->regs + HC_CONFIGFLAG);
504 retval = handshake(priv, hcd->regs + HC_CONFIGFLAG, FLAG_CF, FLAG_CF,
506 up_write(&ehci_cf_port_reset_rwsem);
510 chipid = isp1760_readl(hcd->regs + HC_CHIP_ID_REG);
511 isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff,
514 /* PTD Register Init Part 2, Step 28 */
516 isp1760_init_maps(hcd);
518 /* GRR this is run-once init(), being done every time the HC starts.
519 * So long as they're part of class devices, we can't do it init()
520 * since the class device isn't created that early.
525 static u32 base_to_chip(u32 base)
527 return ((base - 0x400) >> 3);
530 static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh,
531 struct isp1760_qtd *qtd, struct urb *urb,
532 u32 payload, struct ptd *ptd)
542 u32 nak = NAK_COUNTER;
544 /* according to 3.6.2, max packet len can not be > 0x400 */
545 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
546 multi = 1 + ((maxpacket >> 11) & 0x3);
551 dw0 |= PTD_LENGTH(qtd->length);
552 dw0 |= PTD_MAXPACKET(maxpacket);
553 dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe));
554 dw1 = usb_pipeendpoint(urb->pipe) >> 1;
557 dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe));
559 pid_code = qtd->packet_type;
560 dw1 |= PTD_PID_TOKEN(pid_code);
562 if (usb_pipebulk(urb->pipe))
563 dw1 |= PTD_TRANS_BULK;
564 else if (usb_pipeint(urb->pipe))
565 dw1 |= PTD_TRANS_INT;
567 if (urb->dev->speed != USB_SPEED_HIGH) {
568 /* split transaction */
570 dw1 |= PTD_TRANS_SPLIT;
571 if (urb->dev->speed == USB_SPEED_LOW)
572 dw1 |= PTD_SE_USB_LOSPEED;
574 dw1 |= PTD_PORT_NUM(urb->dev->ttport);
575 dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum);
577 /* SE bit for Split INT transfers */
578 if (usb_pipeint(urb->pipe) &&
579 (urb->dev->speed == USB_SPEED_LOW))
586 dw0 |= PTD_MULTI(multi);
587 if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe))
594 dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload));
595 dw2 |= PTD_RL_CNT(rl);
596 dw3 |= PTD_NAC_CNT(nak);
599 if (usb_pipecontrol(urb->pipe))
600 dw3 |= PTD_DATA_TOGGLE(qtd->toggle);
607 dw3 |= PTD_CERR(ERR_COUNTER);
609 memset(ptd, 0, sizeof(*ptd));
611 ptd->dw0 = cpu_to_le32(dw0);
612 ptd->dw1 = cpu_to_le32(dw1);
613 ptd->dw2 = cpu_to_le32(dw2);
614 ptd->dw3 = cpu_to_le32(dw3);
617 static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
618 struct isp1760_qtd *qtd, struct urb *urb,
619 u32 payload, struct ptd *ptd)
628 maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
629 multi = 1 + ((maxpacket >> 11) & 0x3);
631 /* length of the data per uframe */
632 maxpacket = multi * maxpacket;
634 numberofusofs = urb->transfer_buffer_length / maxpacket;
635 if (urb->transfer_buffer_length % maxpacket)
640 for (i = 0; i < numberofusofs; i++) {
645 if (urb->dev->speed != USB_SPEED_HIGH) {
647 ptd->dw5 = cpu_to_le32(0x1c);
649 if (qh->period >= 32)
650 period = qh->period / 2;
657 period = qh->period/8;
664 if (qh->period >= 8) {
665 /* millisecond period */
666 period = (period << 3);
668 /* usof based tranmsfers */
669 /* minimum 4 usofs */
674 ptd->dw2 |= cpu_to_le32(period);
675 ptd->dw4 = cpu_to_le32(usof);
678 static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh,
679 struct isp1760_qtd *qtd, struct urb *urb,
680 u32 payload, struct ptd *ptd)
682 transform_into_atl(priv, qh, qtd, urb, payload, ptd);
683 transform_add_int(priv, qh, qtd, urb, payload, ptd);
686 static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len,
691 qtd->data_buffer = databuffer;
692 qtd->packet_type = GET_QTD_TOKEN_TYPE(token);
693 qtd->toggle = GET_DATA_TOGGLE(token);
695 if (len > HC_ATL_PL_SIZE)
696 count = HC_ATL_PL_SIZE;
704 static int check_error(struct ptd *ptd)
709 dw3 = le32_to_cpu(ptd->dw3);
710 if (dw3 & DW3_HALT_BIT)
713 if (dw3 & DW3_ERROR_BIT) {
714 printk(KERN_ERR "error bit is set in DW3\n");
718 if (dw3 & DW3_QTD_ACTIVE) {
719 printk(KERN_ERR "transfer active bit is set DW3\n");
720 printk(KERN_ERR "nak counter: %d, rl: %d\n", (dw3 >> 19) & 0xf,
721 (le32_to_cpu(ptd->dw2) >> 25) & 0xf);
727 static void check_int_err_status(u32 dw4)
733 for (i = 0; i < 8; i++) {
736 printk(KERN_ERR "ERROR: under run , %d\n", i);
740 printk(KERN_ERR "ERROR: transaction error, %d\n", i);
744 printk(KERN_ERR "ERROR: babble error, %d\n", i);
751 static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv,
755 struct usb_hcd *hcd = priv_to_hcd(priv);
757 token = qtd->packet_type;
759 if (qtd->length && (qtd->length <= HC_ATL_PL_SIZE)) {
765 priv_write_copy(priv, qtd->data_buffer,
772 static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload,
773 struct isp1760_hcd *priv, struct isp1760_qh *qh,
774 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
777 struct usb_hcd *hcd = priv_to_hcd(priv);
779 transform_into_atl(priv, qh, qtd, urb, payload, &ptd);
780 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + atl_regs, sizeof(ptd));
781 enqueue_one_qtd(qtd, priv, payload);
783 priv->atl_ints[slot].urb = urb;
784 priv->atl_ints[slot].qh = qh;
785 priv->atl_ints[slot].qtd = qtd;
786 priv->atl_ints[slot].data_buffer = qtd->data_buffer;
787 priv->atl_ints[slot].payload = payload;
788 qtd->status |= URB_ENQUEUED | URB_TYPE_ATL;
789 qtd->status |= slot << 16;
792 static void enqueue_one_int_qtd(u32 int_regs, u32 payload,
793 struct isp1760_hcd *priv, struct isp1760_qh *qh,
794 struct urb *urb, u32 slot, struct isp1760_qtd *qtd)
797 struct usb_hcd *hcd = priv_to_hcd(priv);
799 transform_into_int(priv, qh, qtd, urb, payload, &ptd);
800 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + int_regs, sizeof(ptd));
801 enqueue_one_qtd(qtd, priv, payload);
803 priv->int_ints[slot].urb = urb;
804 priv->int_ints[slot].qh = qh;
805 priv->int_ints[slot].qtd = qtd;
806 priv->int_ints[slot].data_buffer = qtd->data_buffer;
807 priv->int_ints[slot].payload = payload;
808 qtd->status |= URB_ENQUEUED | URB_TYPE_INT;
809 qtd->status |= slot << 16;
812 static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
813 struct isp1760_qtd *qtd)
815 struct isp1760_hcd *priv = hcd_to_priv(hcd);
816 u32 skip_map, or_map;
819 u32 atl_regs, payload;
823 * When this function is called from the interrupt handler to enqueue
824 * a follow-up packet, the SKIP register gets written and read back
825 * almost immediately. With ISP1761, this register requires a delay of
826 * 195ns between a write and subsequent read (see section 15.1.1.3).
829 skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
832 slot = __ffs(skip_map);
833 queue_entry = 1 << slot;
835 atl_regs = ATL_REGS_OFFSET + slot * sizeof(struct ptd);
837 payload = alloc_mem(priv, qtd->length);
839 enqueue_one_atl_qtd(atl_regs, payload, priv, qh, qtd->urb, slot, qtd);
841 or_map = isp1760_readl(hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
842 or_map |= queue_entry;
843 isp1760_writel(or_map, hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
845 skip_map &= ~queue_entry;
846 isp1760_writel(skip_map, hcd->regs + HC_ATL_PTD_SKIPMAP_REG);
848 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
849 buffstatus |= ATL_BUFFER;
850 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
853 static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh,
854 struct isp1760_qtd *qtd)
856 struct isp1760_hcd *priv = hcd_to_priv(hcd);
857 u32 skip_map, or_map;
860 u32 int_regs, payload;
864 * When this function is called from the interrupt handler to enqueue
865 * a follow-up packet, the SKIP register gets written and read back
866 * almost immediately. With ISP1761, this register requires a delay of
867 * 195ns between a write and subsequent read (see section 15.1.1.3).
870 skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG);
873 slot = __ffs(skip_map);
874 queue_entry = 1 << slot;
876 int_regs = INT_REGS_OFFSET + slot * sizeof(struct ptd);
878 payload = alloc_mem(priv, qtd->length);
880 enqueue_one_int_qtd(int_regs, payload, priv, qh, qtd->urb, slot, qtd);
882 or_map = isp1760_readl(hcd->regs + HC_INT_IRQ_MASK_OR_REG);
883 or_map |= queue_entry;
884 isp1760_writel(or_map, hcd->regs + HC_INT_IRQ_MASK_OR_REG);
886 skip_map &= ~queue_entry;
887 isp1760_writel(skip_map, hcd->regs + HC_INT_PTD_SKIPMAP_REG);
889 buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG);
890 buffstatus |= INT_BUFFER;
891 isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG);
894 static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb, int status)
895 __releases(priv->lock)
896 __acquires(priv->lock)
898 if (!urb->unlinked) {
899 if (status == -EINPROGRESS)
903 /* complete() can reenter this HCD */
904 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
905 spin_unlock(&priv->lock);
906 usb_hcd_giveback_urb(priv_to_hcd(priv), urb, status);
907 spin_lock(&priv->lock);
910 static void isp1760_qtd_free(struct isp1760_qtd *qtd)
912 kmem_cache_free(qtd_cachep, qtd);
915 static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd)
917 struct isp1760_qtd *tmp_qtd;
919 tmp_qtd = qtd->hw_next;
920 list_del(&qtd->qtd_list);
921 isp1760_qtd_free(qtd);
926 * Remove this QTD from the QH list and free its memory. If this QTD
927 * isn't the last one than remove also his successor(s).
928 * Returns the QTD which is part of an new URB and should be enqueued.
930 static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd)
932 struct isp1760_qtd *tmp_qtd;
936 tmp_qtd = qtd->hw_next;
937 last_one = qtd->status & URB_COMPLETE_NOTIFY;
938 list_del(&qtd->qtd_list);
939 isp1760_qtd_free(qtd);
941 } while (!last_one && qtd);
946 static void do_atl_int(struct usb_hcd *usb_hcd)
948 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
949 u32 done_map, skip_map;
951 struct urb *urb = NULL;
958 u32 status = -EINVAL;
960 struct isp1760_qtd *qtd;
961 struct isp1760_qh *qh;
965 done_map = isp1760_readl(usb_hcd->regs +
966 HC_ATL_PTD_DONEMAP_REG);
967 skip_map = isp1760_readl(usb_hcd->regs +
968 HC_ATL_PTD_SKIPMAP_REG);
970 or_map = isp1760_readl(usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
972 isp1760_writel(or_map, usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG);
974 atl_regs_base = ATL_REGS_OFFSET;
982 queue_entry = __ffs(done_map);
983 done_map &= ~(1 << queue_entry);
984 skip_map |= 1 << queue_entry;
986 atl_regs = atl_regs_base + queue_entry * sizeof(struct ptd);
988 urb = priv->atl_ints[queue_entry].urb;
989 qtd = priv->atl_ints[queue_entry].qtd;
990 qh = priv->atl_ints[queue_entry].qh;
991 payload = priv->atl_ints[queue_entry].payload;
994 printk(KERN_ERR "qh is 0\n");
997 isp1760_writel(atl_regs + ISP_BANK(0), usb_hcd->regs +
999 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1002 * write bank1 address twice to ensure the 90ns delay (time
1003 * between BANK0 write and the priv_read_copy() call is at
1004 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 109ns)
1006 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1009 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs +
1010 ISP_BANK(0), sizeof(ptd));
1012 dw1 = le32_to_cpu(ptd.dw1);
1013 dw2 = le32_to_cpu(ptd.dw2);
1014 dw3 = le32_to_cpu(ptd.dw3);
1015 rl = (dw2 >> 25) & 0x0f;
1016 nakcount = (dw3 >> 19) & 0xf;
1018 /* Transfer Error, *but* active and no HALT -> reload */
1019 if ((dw3 & DW3_ERROR_BIT) && (dw3 & DW3_QTD_ACTIVE) &&
1020 !(dw3 & DW3_HALT_BIT)) {
1022 /* according to ppriv code, we have to
1023 * reload this one if trasfered bytes != requested bytes
1024 * else act like everything went smooth..
1025 * XXX This just doesn't feel right and hasn't
1029 length = PTD_XFERRED_LENGTH(dw3);
1030 printk(KERN_ERR "Should reload now.... transfered %d "
1031 "of %zu\n", length, qtd->length);
1035 if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) {
1039 * NAKs are handled in HW by the chip. Usually if the
1040 * device is not able to send data fast enough.
1041 * This did not trigger for a long time now.
1043 printk(KERN_ERR "Reloading ptd %p/%p... qh %p readed: "
1044 "%d of %zu done: %08x cur: %08x\n", qtd,
1045 urb, qh, PTD_XFERRED_LENGTH(dw3),
1046 qtd->length, done_map,
1047 (1 << queue_entry));
1049 /* RL counter = ERR counter */
1050 dw3 &= ~(0xf << 19);
1052 dw3 &= ~(3 << (55 - 32));
1053 dw3 |= ERR_COUNTER << (55 - 32);
1056 * It is not needed to write skip map back because it
1057 * is unchanged. Just make sure that this entry is
1058 * unskipped once it gets written to the HW.
1060 skip_map &= ~(1 << queue_entry);
1061 or_map = isp1760_readl(usb_hcd->regs +
1062 HC_ATL_IRQ_MASK_OR_REG);
1063 or_map |= 1 << queue_entry;
1064 isp1760_writel(or_map, usb_hcd->regs +
1065 HC_ATL_IRQ_MASK_OR_REG);
1067 ptd.dw3 = cpu_to_le32(dw3);
1068 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1069 atl_regs, sizeof(ptd));
1071 ptd.dw0 |= cpu_to_le32(PTD_VALID);
1072 priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs +
1073 atl_regs, sizeof(ptd));
1075 buffstatus = isp1760_readl(usb_hcd->regs +
1076 HC_BUFFER_STATUS_REG);
1077 buffstatus |= ATL_BUFFER;
1078 isp1760_writel(buffstatus, usb_hcd->regs +
1079 HC_BUFFER_STATUS_REG);
1083 error = check_error(&ptd);
1086 priv->atl_ints[queue_entry].qh->toggle = 0;
1087 priv->atl_ints[queue_entry].qh->ping = 0;
1088 urb->status = -EPIPE;
1091 printk(KERN_ERR "Error in %s().\n", __func__);
1092 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1093 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1095 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1096 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1099 if (usb_pipetype(urb->pipe) == PIPE_BULK) {
1100 priv->atl_ints[queue_entry].qh->toggle = dw3 &
1102 priv->atl_ints[queue_entry].qh->ping = dw3 &
1107 length = PTD_XFERRED_LENGTH(dw3);
1109 switch (DW1_GET_PID(dw1)) {
1111 priv_read_copy(priv,
1112 priv->atl_ints[queue_entry].data_buffer,
1113 usb_hcd->regs + payload + ISP_BANK(1),
1118 urb->actual_length += length;
1125 priv->atl_ints[queue_entry].data_buffer = NULL;
1126 priv->atl_ints[queue_entry].urb = NULL;
1127 priv->atl_ints[queue_entry].qtd = NULL;
1128 priv->atl_ints[queue_entry].qh = NULL;
1130 free_mem(priv, payload);
1132 isp1760_writel(skip_map, usb_hcd->regs +
1133 HC_ATL_PTD_SKIPMAP_REG);
1135 if (urb->status == -EPIPE) {
1136 /* HALT was received */
1138 qtd = clean_up_qtdlist(qtd);
1139 isp1760_urb_done(priv, urb, urb->status);
1141 } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) {
1142 /* short BULK received */
1144 if (urb->transfer_flags & URB_SHORT_NOT_OK) {
1145 urb->status = -EREMOTEIO;
1146 isp1760_dbg(priv, "short bulk, %d instead %zu "
1147 "with URB_SHORT_NOT_OK flag.\n",
1148 length, qtd->length);
1151 if (urb->status == -EINPROGRESS)
1154 qtd = clean_up_qtdlist(qtd);
1156 isp1760_urb_done(priv, urb, urb->status);
1158 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1159 /* that was the last qtd of that URB */
1161 if (urb->status == -EINPROGRESS)
1164 qtd = clean_this_qtd(qtd);
1165 isp1760_urb_done(priv, urb, urb->status);
1168 /* next QTD of this URB */
1170 qtd = clean_this_qtd(qtd);
1175 enqueue_an_ATL_packet(usb_hcd, qh, qtd);
1177 skip_map = isp1760_readl(usb_hcd->regs +
1178 HC_ATL_PTD_SKIPMAP_REG);
1182 static void do_intl_int(struct usb_hcd *usb_hcd)
1184 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1185 u32 done_map, skip_map;
1187 struct urb *urb = NULL;
1195 struct isp1760_qtd *qtd;
1196 struct isp1760_qh *qh;
1198 done_map = isp1760_readl(usb_hcd->regs +
1199 HC_INT_PTD_DONEMAP_REG);
1200 skip_map = isp1760_readl(usb_hcd->regs +
1201 HC_INT_PTD_SKIPMAP_REG);
1203 or_map = isp1760_readl(usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1204 or_map &= ~done_map;
1205 isp1760_writel(or_map, usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG);
1207 int_regs_base = INT_REGS_OFFSET;
1213 queue_entry = __ffs(done_map);
1214 done_map &= ~(1 << queue_entry);
1215 skip_map |= 1 << queue_entry;
1217 int_regs = int_regs_base + queue_entry * sizeof(struct ptd);
1218 urb = priv->int_ints[queue_entry].urb;
1219 qtd = priv->int_ints[queue_entry].qtd;
1220 qh = priv->int_ints[queue_entry].qh;
1221 payload = priv->int_ints[queue_entry].payload;
1224 printk(KERN_ERR "(INT) qh is 0\n");
1228 isp1760_writel(int_regs + ISP_BANK(0), usb_hcd->regs +
1230 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1233 * write bank1 address twice to ensure the 90ns delay (time
1234 * between BANK0 write and the priv_read_copy() call is at
1235 * least 3*t_WHWL + 2*t_w11 = 3*25ns + 2*17ns = 92ns)
1237 isp1760_writel(payload + ISP_BANK(1), usb_hcd->regs +
1240 priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs +
1241 ISP_BANK(0), sizeof(ptd));
1242 dw1 = le32_to_cpu(ptd.dw1);
1243 dw3 = le32_to_cpu(ptd.dw3);
1244 check_int_err_status(le32_to_cpu(ptd.dw4));
1246 error = check_error(&ptd);
1249 printk(KERN_ERR "Error in %s().\n", __func__);
1250 printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x "
1251 "dw3: %08x dw4: %08x dw5: %08x dw6: "
1253 ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3,
1254 ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7);
1256 urb->status = -EPIPE;
1257 priv->int_ints[queue_entry].qh->toggle = 0;
1258 priv->int_ints[queue_entry].qh->ping = 0;
1261 priv->int_ints[queue_entry].qh->toggle =
1263 priv->int_ints[queue_entry].qh->ping = dw3 & (1 << 26);
1266 if (urb->dev->speed != USB_SPEED_HIGH)
1267 length = PTD_XFERRED_LENGTH_LO(dw3);
1269 length = PTD_XFERRED_LENGTH(dw3);
1272 switch (DW1_GET_PID(dw1)) {
1274 priv_read_copy(priv,
1275 priv->int_ints[queue_entry].data_buffer,
1276 usb_hcd->regs + payload + ISP_BANK(1),
1280 urb->actual_length += length;
1287 priv->int_ints[queue_entry].data_buffer = NULL;
1288 priv->int_ints[queue_entry].urb = NULL;
1289 priv->int_ints[queue_entry].qtd = NULL;
1290 priv->int_ints[queue_entry].qh = NULL;
1292 isp1760_writel(skip_map, usb_hcd->regs +
1293 HC_INT_PTD_SKIPMAP_REG);
1294 free_mem(priv, payload);
1296 if (urb->status == -EPIPE) {
1299 qtd = clean_up_qtdlist(qtd);
1300 isp1760_urb_done(priv, urb, urb->status);
1302 } else if (qtd->status & URB_COMPLETE_NOTIFY) {
1304 if (urb->status == -EINPROGRESS)
1307 qtd = clean_this_qtd(qtd);
1308 isp1760_urb_done(priv, urb, urb->status);
1311 /* next QTD of this URB */
1313 qtd = clean_this_qtd(qtd);
1318 enqueue_an_INT_packet(usb_hcd, qh, qtd);
1320 skip_map = isp1760_readl(usb_hcd->regs +
1321 HC_INT_PTD_SKIPMAP_REG);
1325 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
1326 static struct isp1760_qh *qh_make(struct isp1760_hcd *priv, struct urb *urb,
1329 struct isp1760_qh *qh;
1332 qh = isp1760_qh_alloc(priv, flags);
1337 * init endpoint/device data for this QH
1339 is_input = usb_pipein(urb->pipe);
1340 type = usb_pipetype(urb->pipe);
1342 if (type == PIPE_INTERRUPT) {
1344 if (urb->dev->speed == USB_SPEED_HIGH) {
1346 qh->period = urb->interval >> 3;
1347 if (qh->period == 0 && urb->interval != 1) {
1348 /* NOTE interval 2 or 4 uframes could work.
1349 * But interval 1 scheduling is simpler, and
1350 * includes high bandwidth.
1352 printk(KERN_ERR "intr period %d uframes, NYET!",
1358 qh->period = urb->interval;
1362 /* support for tt scheduling, and access to toggles */
1365 if (!usb_pipecontrol(urb->pipe))
1366 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input,
1372 * For control/bulk/interrupt, return QH with these TDs appended.
1373 * Allocates and initializes the QH if necessary.
1374 * Returns null if it can't allocate a QH it needs to.
1375 * If the QH has TDs (urbs) already, that's great.
1377 static struct isp1760_qh *qh_append_tds(struct isp1760_hcd *priv,
1378 struct urb *urb, struct list_head *qtd_list, int epnum,
1381 struct isp1760_qh *qh;
1382 struct isp1760_qtd *qtd;
1383 struct isp1760_qtd *prev_qtd;
1385 qh = (struct isp1760_qh *)*ptr;
1387 /* can't sleep here, we have priv->lock... */
1388 qh = qh_make(priv, urb, GFP_ATOMIC);
1394 qtd = list_entry(qtd_list->next, struct isp1760_qtd,
1396 if (!list_empty(&qh->qtd_list))
1397 prev_qtd = list_entry(qh->qtd_list.prev,
1398 struct isp1760_qtd, qtd_list);
1402 list_splice(qtd_list, qh->qtd_list.prev);
1404 BUG_ON(prev_qtd->hw_next);
1405 prev_qtd->hw_next = qtd;
1412 static void qtd_list_free(struct isp1760_hcd *priv, struct urb *urb,
1413 struct list_head *qtd_list)
1415 struct list_head *entry, *temp;
1417 list_for_each_safe(entry, temp, qtd_list) {
1418 struct isp1760_qtd *qtd;
1420 qtd = list_entry(entry, struct isp1760_qtd, qtd_list);
1421 list_del(&qtd->qtd_list);
1422 isp1760_qtd_free(qtd);
1426 static int isp1760_prepare_enqueue(struct isp1760_hcd *priv, struct urb *urb,
1427 struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p)
1429 struct isp1760_qtd *qtd;
1431 unsigned long flags;
1432 struct isp1760_qh *qh = NULL;
1436 qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list);
1437 epnum = urb->ep->desc.bEndpointAddress;
1439 spin_lock_irqsave(&priv->lock, flags);
1440 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &priv_to_hcd(priv)->flags)) {
1444 rc = usb_hcd_link_urb_to_ep(priv_to_hcd(priv), urb);
1448 qh = urb->ep->hcpriv;
1450 qh_busy = !list_empty(&qh->qtd_list);
1454 qh = qh_append_tds(priv, urb, qtd_list, epnum, &urb->ep->hcpriv);
1456 usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb);
1462 p(priv_to_hcd(priv), qh, qtd);
1465 spin_unlock_irqrestore(&priv->lock, flags);
1467 qtd_list_free(priv, urb, qtd_list);
1471 static struct isp1760_qtd *isp1760_qtd_alloc(struct isp1760_hcd *priv,
1474 struct isp1760_qtd *qtd;
1476 qtd = kmem_cache_zalloc(qtd_cachep, flags);
1478 INIT_LIST_HEAD(&qtd->qtd_list);
1484 * create a list of filled qtds for this URB; won't link into qh.
1486 static struct list_head *qh_urb_transaction(struct isp1760_hcd *priv,
1487 struct urb *urb, struct list_head *head, gfp_t flags)
1489 struct isp1760_qtd *qtd, *qtd_prev;
1496 * URBs map to sequences of QTDs: one logical transaction
1498 qtd = isp1760_qtd_alloc(priv, flags);
1502 list_add_tail(&qtd->qtd_list, head);
1504 urb->status = -EINPROGRESS;
1507 /* for split transactions, SplitXState initialized to zero */
1509 len = urb->transfer_buffer_length;
1510 is_input = usb_pipein(urb->pipe);
1511 if (usb_pipecontrol(urb->pipe)) {
1513 qtd_fill(qtd, urb->setup_packet,
1514 sizeof(struct usb_ctrlrequest),
1517 /* ... and always at least one more pid */
1518 token ^= DATA_TOGGLE;
1520 qtd = isp1760_qtd_alloc(priv, flags);
1524 qtd_prev->hw_next = qtd;
1525 list_add_tail(&qtd->qtd_list, head);
1527 /* for zero length DATA stages, STATUS is always IN */
1533 * data transfer stage: buffer setup
1535 buf = urb->transfer_buffer;
1542 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1545 * buffer gets wrapped in one or more qtds;
1546 * last one may be "short" (including zero len)
1547 * and may serve as a control status ack
1553 /* XXX This looks like usb storage / SCSI bug */
1554 printk(KERN_ERR "buf is null, dma is %08lx len is %d\n",
1555 (long unsigned)urb->transfer_dma, len);
1559 this_qtd_len = qtd_fill(qtd, buf, len, token);
1560 len -= this_qtd_len;
1561 buf += this_qtd_len;
1563 /* qh makes control packets use qtd toggle; maybe switch it */
1564 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1565 token ^= DATA_TOGGLE;
1571 qtd = isp1760_qtd_alloc(priv, flags);
1575 qtd_prev->hw_next = qtd;
1576 list_add_tail(&qtd->qtd_list, head);
1580 * control requests may need a terminating data "status" ack;
1581 * bulk ones may need a terminating short packet (zero length).
1583 if (urb->transfer_buffer_length != 0) {
1586 if (usb_pipecontrol(urb->pipe)) {
1588 /* "in" <--> "out" */
1591 token |= DATA_TOGGLE;
1592 } else if (usb_pipebulk(urb->pipe)
1593 && (urb->transfer_flags & URB_ZERO_PACKET)
1594 && !(urb->transfer_buffer_length % maxpacket)) {
1599 qtd = isp1760_qtd_alloc(priv, flags);
1603 qtd_prev->hw_next = qtd;
1604 list_add_tail(&qtd->qtd_list, head);
1606 /* never any data in such packets */
1607 qtd_fill(qtd, NULL, 0, token);
1611 qtd->status = URB_COMPLETE_NOTIFY;
1615 qtd_list_free(priv, urb, head);
1619 static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
1622 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1623 struct list_head qtd_list;
1626 INIT_LIST_HEAD(&qtd_list);
1628 switch (usb_pipetype(urb->pipe)) {
1632 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1634 pe = enqueue_an_ATL_packet;
1637 case PIPE_INTERRUPT:
1638 if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags))
1640 pe = enqueue_an_INT_packet;
1643 case PIPE_ISOCHRONOUS:
1644 printk(KERN_ERR "PIPE_ISOCHRONOUS ain't supported\n");
1649 return isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe);
1652 static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
1655 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1656 struct inter_packet_info *ints;
1658 u32 reg_base, or_reg, skip_reg;
1659 unsigned long flags;
1663 switch (usb_pipetype(urb->pipe)) {
1664 case PIPE_ISOCHRONOUS:
1668 case PIPE_INTERRUPT:
1669 ints = priv->int_ints;
1670 reg_base = INT_REGS_OFFSET;
1671 or_reg = HC_INT_IRQ_MASK_OR_REG;
1672 skip_reg = HC_INT_PTD_SKIPMAP_REG;
1673 pe = enqueue_an_INT_packet;
1677 ints = priv->atl_ints;
1678 reg_base = ATL_REGS_OFFSET;
1679 or_reg = HC_ATL_IRQ_MASK_OR_REG;
1680 skip_reg = HC_ATL_PTD_SKIPMAP_REG;
1681 pe = enqueue_an_ATL_packet;
1685 memset(&ptd, 0, sizeof(ptd));
1686 spin_lock_irqsave(&priv->lock, flags);
1688 for (i = 0; i < 32; i++) {
1689 if (ints->urb == urb) {
1692 struct isp1760_qtd *qtd;
1693 struct isp1760_qh *qh = ints->qh;
1695 skip_map = isp1760_readl(hcd->regs + skip_reg);
1697 isp1760_writel(skip_map, hcd->regs + skip_reg);
1699 or_map = isp1760_readl(hcd->regs + or_reg);
1700 or_map &= ~(1 << i);
1701 isp1760_writel(or_map, hcd->regs + or_reg);
1703 priv_write_copy(priv, (u32 *)&ptd, hcd->regs + reg_base
1704 + i * sizeof(ptd), sizeof(ptd));
1706 qtd = clean_up_qtdlist(qtd);
1708 free_mem(priv, ints->payload);
1713 ints->data_buffer = NULL;
1716 isp1760_urb_done(priv, urb, status);
1721 } else if (ints->qtd) {
1722 struct isp1760_qtd *qtd, *prev_qtd = ints->qtd;
1724 for (qtd = ints->qtd->hw_next; qtd; qtd = qtd->hw_next) {
1725 if (qtd->urb == urb) {
1726 prev_qtd->hw_next = clean_up_qtdlist(qtd);
1727 isp1760_urb_done(priv, urb, status);
1732 /* we found the urb before the end of the list */
1739 spin_unlock_irqrestore(&priv->lock, flags);
1743 static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd)
1745 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
1747 irqreturn_t irqret = IRQ_NONE;
1749 spin_lock(&priv->lock);
1751 if (!(usb_hcd->state & HC_STATE_RUNNING))
1754 imask = isp1760_readl(usb_hcd->regs + HC_INTERRUPT_REG);
1755 if (unlikely(!imask))
1758 isp1760_writel(imask, usb_hcd->regs + HC_INTERRUPT_REG);
1759 if (imask & HC_ATL_INT)
1760 do_atl_int(usb_hcd);
1762 if (imask & HC_INTL_INT)
1763 do_intl_int(usb_hcd);
1765 irqret = IRQ_HANDLED;
1767 spin_unlock(&priv->lock);
1771 static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf)
1773 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1774 u32 temp, status = 0;
1777 unsigned long flags;
1779 /* if !USB_SUSPEND, root hub timers won't get shut down ... */
1780 if (!HC_IS_RUNNING(hcd->state))
1783 /* init status to no-changes */
1787 spin_lock_irqsave(&priv->lock, flags);
1788 temp = isp1760_readl(hcd->regs + HC_PORTSC1);
1790 if (temp & PORT_OWNER) {
1791 if (temp & PORT_CSC) {
1793 isp1760_writel(temp, hcd->regs + HC_PORTSC1);
1799 * Return status information even for ports with OWNER set.
1800 * Otherwise khubd wouldn't see the disconnect event when a
1801 * high-speed device is switched over to the companion
1802 * controller by the user.
1805 if ((temp & mask) != 0
1806 || ((temp & PORT_RESUME) != 0
1807 && time_after_eq(jiffies,
1808 priv->reset_done))) {
1809 buf [0] |= 1 << (0 + 1);
1812 /* FIXME autosuspend idle root hubs */
1814 spin_unlock_irqrestore(&priv->lock, flags);
1815 return status ? retval : 0;
1818 static void isp1760_hub_descriptor(struct isp1760_hcd *priv,
1819 struct usb_hub_descriptor *desc)
1821 int ports = HCS_N_PORTS(priv->hcs_params);
1824 desc->bDescriptorType = 0x29;
1825 /* priv 1.0, 2.3.9 says 20ms max */
1826 desc->bPwrOn2PwrGood = 10;
1827 desc->bHubContrCurrent = 0;
1829 desc->bNbrPorts = ports;
1830 temp = 1 + (ports / 8);
1831 desc->bDescLength = 7 + 2 * temp;
1833 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
1834 memset(&desc->bitmap[0], 0, temp);
1835 memset(&desc->bitmap[temp], 0xff, temp);
1837 /* per-port overcurrent reporting */
1839 if (HCS_PPC(priv->hcs_params))
1840 /* per-port power control */
1843 /* no power switching */
1845 desc->wHubCharacteristics = cpu_to_le16(temp);
1848 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
1850 static int check_reset_complete(struct isp1760_hcd *priv, int index,
1851 u32 __iomem *status_reg, int port_status)
1853 if (!(port_status & PORT_CONNECT))
1856 /* if reset finished and it's still not enabled -- handoff */
1857 if (!(port_status & PORT_PE)) {
1859 printk(KERN_ERR "port %d full speed --> companion\n",
1862 port_status |= PORT_OWNER;
1863 port_status &= ~PORT_RWC_BITS;
1864 isp1760_writel(port_status, status_reg);
1867 printk(KERN_ERR "port %d high speed\n", index + 1);
1872 static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq,
1873 u16 wValue, u16 wIndex, char *buf, u16 wLength)
1875 struct isp1760_hcd *priv = hcd_to_priv(hcd);
1876 int ports = HCS_N_PORTS(priv->hcs_params);
1877 u32 __iomem *status_reg = hcd->regs + HC_PORTSC1;
1879 unsigned long flags;
1884 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
1885 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
1886 * (track current state ourselves) ... blink for diagnostics,
1887 * power, "this is the one", etc. EHCI spec supports this.
1890 spin_lock_irqsave(&priv->lock, flags);
1892 case ClearHubFeature:
1894 case C_HUB_LOCAL_POWER:
1895 case C_HUB_OVER_CURRENT:
1896 /* no hub-wide feature/status flags */
1902 case ClearPortFeature:
1903 if (!wIndex || wIndex > ports)
1906 temp = isp1760_readl(status_reg);
1909 * Even if OWNER is set, so the port is owned by the
1910 * companion controller, khubd needs to be able to clear
1911 * the port-change status bits (especially
1912 * USB_PORT_FEAT_C_CONNECTION).
1916 case USB_PORT_FEAT_ENABLE:
1917 isp1760_writel(temp & ~PORT_PE, status_reg);
1919 case USB_PORT_FEAT_C_ENABLE:
1922 case USB_PORT_FEAT_SUSPEND:
1923 if (temp & PORT_RESET)
1926 if (temp & PORT_SUSPEND) {
1927 if ((temp & PORT_PE) == 0)
1929 /* resume signaling for 20 msec */
1930 temp &= ~(PORT_RWC_BITS);
1931 isp1760_writel(temp | PORT_RESUME,
1933 priv->reset_done = jiffies +
1934 msecs_to_jiffies(20);
1937 case USB_PORT_FEAT_C_SUSPEND:
1938 /* we auto-clear this feature */
1940 case USB_PORT_FEAT_POWER:
1941 if (HCS_PPC(priv->hcs_params))
1942 isp1760_writel(temp & ~PORT_POWER, status_reg);
1944 case USB_PORT_FEAT_C_CONNECTION:
1945 isp1760_writel(temp | PORT_CSC,
1948 case USB_PORT_FEAT_C_OVER_CURRENT:
1951 case USB_PORT_FEAT_C_RESET:
1952 /* GetPortStatus clears reset */
1957 isp1760_readl(hcd->regs + HC_USBCMD);
1959 case GetHubDescriptor:
1960 isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *)
1964 /* no hub-wide feature/status flags */
1968 if (!wIndex || wIndex > ports)
1972 temp = isp1760_readl(status_reg);
1974 /* wPortChange bits */
1975 if (temp & PORT_CSC)
1976 status |= 1 << USB_PORT_FEAT_C_CONNECTION;
1979 /* whoever resumes must GetPortStatus to complete it!! */
1980 if (temp & PORT_RESUME) {
1981 printk(KERN_ERR "Port resume should be skipped.\n");
1983 /* Remote Wakeup received? */
1984 if (!priv->reset_done) {
1985 /* resume signaling for 20 msec */
1986 priv->reset_done = jiffies
1987 + msecs_to_jiffies(20);
1988 /* check the port again */
1989 mod_timer(&priv_to_hcd(priv)->rh_timer,
1993 /* resume completed? */
1994 else if (time_after_eq(jiffies,
1995 priv->reset_done)) {
1996 status |= 1 << USB_PORT_FEAT_C_SUSPEND;
1997 priv->reset_done = 0;
1999 /* stop resume signaling */
2000 temp = isp1760_readl(status_reg);
2002 temp & ~(PORT_RWC_BITS | PORT_RESUME),
2004 retval = handshake(priv, status_reg,
2005 PORT_RESUME, 0, 2000 /* 2msec */);
2008 "port %d resume error %d\n",
2009 wIndex + 1, retval);
2012 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
2016 /* whoever resets must GetPortStatus to complete it!! */
2017 if ((temp & PORT_RESET)
2018 && time_after_eq(jiffies,
2019 priv->reset_done)) {
2020 status |= 1 << USB_PORT_FEAT_C_RESET;
2021 priv->reset_done = 0;
2023 /* force reset to complete */
2024 isp1760_writel(temp & ~PORT_RESET,
2026 /* REVISIT: some hardware needs 550+ usec to clear
2027 * this bit; seems too long to spin routinely...
2029 retval = handshake(priv, status_reg,
2030 PORT_RESET, 0, 750);
2032 isp1760_err(priv, "port %d reset error %d\n",
2033 wIndex + 1, retval);
2037 /* see what we found out */
2038 temp = check_reset_complete(priv, wIndex, status_reg,
2039 isp1760_readl(status_reg));
2042 * Even if OWNER is set, there's no harm letting khubd
2043 * see the wPortStatus values (they should all be 0 except
2044 * for PORT_POWER anyway).
2047 if (temp & PORT_OWNER)
2048 printk(KERN_ERR "Warning: PORT_OWNER is set\n");
2050 if (temp & PORT_CONNECT) {
2051 status |= 1 << USB_PORT_FEAT_CONNECTION;
2052 /* status may be from integrated TT */
2053 status |= ehci_port_speed(priv, temp);
2056 status |= 1 << USB_PORT_FEAT_ENABLE;
2057 if (temp & (PORT_SUSPEND|PORT_RESUME))
2058 status |= 1 << USB_PORT_FEAT_SUSPEND;
2059 if (temp & PORT_RESET)
2060 status |= 1 << USB_PORT_FEAT_RESET;
2061 if (temp & PORT_POWER)
2062 status |= 1 << USB_PORT_FEAT_POWER;
2064 put_unaligned(cpu_to_le32(status), (__le32 *) buf);
2068 case C_HUB_LOCAL_POWER:
2069 case C_HUB_OVER_CURRENT:
2070 /* no hub-wide feature/status flags */
2076 case SetPortFeature:
2077 selector = wIndex >> 8;
2079 if (!wIndex || wIndex > ports)
2082 temp = isp1760_readl(status_reg);
2083 if (temp & PORT_OWNER)
2086 /* temp &= ~PORT_RWC_BITS; */
2088 case USB_PORT_FEAT_ENABLE:
2089 isp1760_writel(temp | PORT_PE, status_reg);
2092 case USB_PORT_FEAT_SUSPEND:
2093 if ((temp & PORT_PE) == 0
2094 || (temp & PORT_RESET) != 0)
2097 isp1760_writel(temp | PORT_SUSPEND, status_reg);
2099 case USB_PORT_FEAT_POWER:
2100 if (HCS_PPC(priv->hcs_params))
2101 isp1760_writel(temp | PORT_POWER,
2104 case USB_PORT_FEAT_RESET:
2105 if (temp & PORT_RESUME)
2107 /* line status bits may report this as low speed,
2108 * which can be fine if this root hub has a
2109 * transaction translator built in.
2111 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
2112 && PORT_USB11(temp)) {
2119 * caller must wait, then call GetPortStatus
2120 * usb 2.0 spec says 50 ms resets on root
2122 priv->reset_done = jiffies +
2123 msecs_to_jiffies(50);
2125 isp1760_writel(temp, status_reg);
2130 isp1760_readl(hcd->regs + HC_USBCMD);
2135 /* "stall" on error */
2138 spin_unlock_irqrestore(&priv->lock, flags);
2142 static void isp1760_endpoint_disable(struct usb_hcd *usb_hcd,
2143 struct usb_host_endpoint *ep)
2145 struct isp1760_hcd *priv = hcd_to_priv(usb_hcd);
2146 struct isp1760_qh *qh;
2147 struct isp1760_qtd *qtd;
2148 unsigned long flags;
2150 spin_lock_irqsave(&priv->lock, flags);
2157 /* more than entry might get removed */
2158 if (list_empty(&qh->qtd_list))
2161 qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd,
2164 if (qtd->status & URB_ENQUEUED) {
2166 spin_unlock_irqrestore(&priv->lock, flags);
2167 isp1760_urb_dequeue(usb_hcd, qtd->urb, -ECONNRESET);
2168 spin_lock_irqsave(&priv->lock, flags);
2173 clean_up_qtdlist(qtd);
2174 isp1760_urb_done(priv, urb, -ECONNRESET);
2179 /* remove requests and leak them.
2180 * ATL are pretty fast done, INT could take a while...
2181 * The latter shoule be removed
2184 spin_unlock_irqrestore(&priv->lock, flags);
2187 static int isp1760_get_frame(struct usb_hcd *hcd)
2189 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2192 fr = isp1760_readl(hcd->regs + HC_FRINDEX);
2193 return (fr >> 3) % priv->periodic_size;
2196 static void isp1760_stop(struct usb_hcd *hcd)
2198 struct isp1760_hcd *priv = hcd_to_priv(hcd);
2201 isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1,
2205 spin_lock_irq(&priv->lock);
2208 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2209 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
2210 spin_unlock_irq(&priv->lock);
2212 isp1760_writel(0, hcd->regs + HC_CONFIGFLAG);
2215 static void isp1760_shutdown(struct usb_hcd *hcd)
2220 temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL);
2221 isp1760_writel(temp &= ~HW_GLOBAL_INTR_EN, hcd->regs + HC_HW_MODE_CTRL);
2223 command = isp1760_readl(hcd->regs + HC_USBCMD);
2224 command &= ~CMD_RUN;
2225 isp1760_writel(command, hcd->regs + HC_USBCMD);
2228 static const struct hc_driver isp1760_hc_driver = {
2229 .description = "isp1760-hcd",
2230 .product_desc = "NXP ISP1760 USB Host Controller",
2231 .hcd_priv_size = sizeof(struct isp1760_hcd),
2233 .flags = HCD_MEMORY | HCD_USB2,
2234 .reset = isp1760_hc_setup,
2235 .start = isp1760_run,
2236 .stop = isp1760_stop,
2237 .shutdown = isp1760_shutdown,
2238 .urb_enqueue = isp1760_urb_enqueue,
2239 .urb_dequeue = isp1760_urb_dequeue,
2240 .endpoint_disable = isp1760_endpoint_disable,
2241 .get_frame_number = isp1760_get_frame,
2242 .hub_status_data = isp1760_hub_status_data,
2243 .hub_control = isp1760_hub_control,
2246 int __init init_kmem_once(void)
2248 qtd_cachep = kmem_cache_create("isp1760_qtd",
2249 sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY |
2250 SLAB_MEM_SPREAD, NULL);
2255 qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh),
2256 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL);
2259 kmem_cache_destroy(qtd_cachep);
2266 void deinit_kmem_cache(void)
2268 kmem_cache_destroy(qtd_cachep);
2269 kmem_cache_destroy(qh_cachep);
2272 struct usb_hcd *isp1760_register(phys_addr_t res_start, resource_size_t res_len,
2273 int irq, unsigned long irqflags,
2274 struct device *dev, const char *busname,
2275 unsigned int devflags)
2277 struct usb_hcd *hcd;
2278 struct isp1760_hcd *priv;
2282 return ERR_PTR(-ENODEV);
2284 /* prevent usb-core allocating DMA pages */
2285 dev->dma_mask = NULL;
2287 hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev_name(dev));
2289 return ERR_PTR(-ENOMEM);
2291 priv = hcd_to_priv(hcd);
2292 priv->devflags = devflags;
2294 hcd->regs = ioremap(res_start, res_len);
2301 hcd->rsrc_start = res_start;
2302 hcd->rsrc_len = res_len;
2304 ret = usb_add_hcd(hcd, irq, irqflags);
2316 return ERR_PTR(ret);
2319 MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
2320 MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
2321 MODULE_LICENSE("GPL v2");