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   1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
   2  * time.c: UltraSparc timer and TOD clock support.
   3  *
   4  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
   6  *
   7  * Based largely on code which is:
   8  *
   9  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/errno.h>
  14 #include <linux/module.h>
  15 #include <linux/sched.h>
  16 #include <linux/kernel.h>
  17 #include <linux/param.h>
  18 #include <linux/string.h>
  19 #include <linux/mm.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/time.h>
  22 #include <linux/timex.h>
  23 #include <linux/init.h>
  24 #include <linux/ioport.h>
  25 #include <linux/mc146818rtc.h>
  26 #include <linux/delay.h>
  27 #include <linux/profile.h>
  28 #include <linux/bcd.h>
  29 #include <linux/jiffies.h>
  30 #include <linux/cpufreq.h>
  31 #include <linux/percpu.h>
  32 #include <linux/profile.h>
  33
  34 #include <asm/oplib.h>
  35 #include <asm/mostek.h>
  36 #include <asm/timer.h>
  37 #include <asm/irq.h>
  38 #include <asm/io.h>
  39 #include <asm/sbus.h>
  40 #include <asm/fhc.h>
  41 #include <asm/pbm.h>
  42 #include <asm/ebus.h>
  43 #include <asm/isa.h>
  44 #include <asm/starfire.h>
  45 #include <asm/smp.h>
  46 #include <asm/sections.h>
  47 #include <asm/cpudata.h>
  48
  49 DEFINE_SPINLOCK(mostek_lock);
  50 DEFINE_SPINLOCK(rtc_lock);
  51 void __iomem *mstk48t02_regs = NULL;
  52 #ifdef CONFIG_PCI
  53 unsigned long ds1287_regs = 0UL;
  54 #endif
  55
  56 extern unsigned long wall_jiffies;
  57
  58 static void __iomem *mstk48t08_regs;
  59 static void __iomem *mstk48t59_regs;
  60
  61 static int set_rtc_mmss(unsigned long);
  62
  63 #define TICK_PRIV_BIT   (1UL << 63)
  64
  65 #ifdef CONFIG_SMP
  66 unsigned long profile_pc(struct pt_regs *regs)
  67 {
  68         unsigned long pc = instruction_pointer(regs);
  69
  70         if (in_lock_functions(pc))
  71                 return regs->u_regs[UREG_RETPC];
  72         return pc;
  73 }
  74 EXPORT_SYMBOL(profile_pc);
  75 #endif
  76
  77 static void tick_disable_protection(void)
  78 {
  79         /* Set things up so user can access tick register for profiling
  80          * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
  81          * read back of %tick after writing it.
  82          */
  83         __asm__ __volatile__(
  84         "       ba,pt   %%xcc, 1f\n"
  85         "        nop\n"
  86         "       .align  64\n"
  87         "1:     rd      %%tick, %%g2\n"
  88         "       add     %%g2, 6, %%g2\n"
  89         "       andn    %%g2, %0, %%g2\n"
  90         "       wrpr    %%g2, 0, %%tick\n"
  91         "       rdpr    %%tick, %%g0"
  92         : /* no outputs */
  93         : "r" (TICK_PRIV_BIT)
  94         : "g2");
  95 }
  96
  97 static void tick_init_tick(unsigned long offset)
  98 {
  99         tick_disable_protection();
 100
 101         __asm__ __volatile__(
 102         "       rd      %%tick, %%g1\n"
 103         "       andn    %%g1, %1, %%g1\n"
 104         "       ba,pt   %%xcc, 1f\n"
 105         "        add    %%g1, %0, %%g1\n"
 106         "       .align  64\n"
 107         "1:     wr      %%g1, 0x0, %%tick_cmpr\n"
 108         "       rd      %%tick_cmpr, %%g0"
 109         : /* no outputs */
 110         : "r" (offset), "r" (TICK_PRIV_BIT)
 111         : "g1");
 112 }
 113
 114 static unsigned long tick_get_tick(void)
 115 {
 116         unsigned long ret;
 117
 118         __asm__ __volatile__("rd        %%tick, %0\n\t"
 119                              "mov       %0, %0"
 120                              : "=r" (ret));
 121
 122         return ret & ~TICK_PRIV_BIT;
 123 }
 124
 125 static unsigned long tick_get_compare(void)
 126 {
 127         unsigned long ret;
 128
 129         __asm__ __volatile__("rd        %%tick_cmpr, %0\n\t"
 130                              "mov       %0, %0"
 131                              : "=r" (ret));
 132
 133         return ret;
 134 }
 135
 136 static unsigned long tick_add_compare(unsigned long adj)
 137 {
 138         unsigned long new_compare;
 139
 140         /* Workaround for Spitfire Errata (#54 I think??), I discovered
 141          * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
 142          * number 103640.
 143          *
 144          * On Blackbird writes to %tick_cmpr can fail, the
 145          * workaround seems to be to execute the wr instruction
 146          * at the start of an I-cache line, and perform a dummy
 147          * read back from %tick_cmpr right after writing to it. -DaveM
 148          */
 149         __asm__ __volatile__("rd        %%tick_cmpr, %0\n\t"
 150                              "ba,pt     %%xcc, 1f\n\t"
 151                              " add      %0, %1, %0\n\t"
 152                              ".align    64\n"
 153                              "1:\n\t"
 154                              "wr        %0, 0, %%tick_cmpr\n\t"
 155                              "rd        %%tick_cmpr, %%g0"
 156                              : "=&r" (new_compare)
 157                              : "r" (adj));
 158
 159         return new_compare;
 160 }
 161
 162 static unsigned long tick_add_tick(unsigned long adj, unsigned long offset)
 163 {
 164         unsigned long new_tick, tmp;
 165
 166         /* Also need to handle Blackbird bug here too. */
 167         __asm__ __volatile__("rd        %%tick, %0\n\t"
 168                              "add       %0, %2, %0\n\t"
 169                              "wrpr      %0, 0, %%tick\n\t"
 170                              "andn      %0, %4, %1\n\t"
 171                              "ba,pt     %%xcc, 1f\n\t"
 172                              " add      %1, %3, %1\n\t"
 173                              ".align    64\n"
 174                              "1:\n\t"
 175                              "wr        %1, 0, %%tick_cmpr\n\t"
 176                              "rd        %%tick_cmpr, %%g0"
 177                              : "=&r" (new_tick), "=&r" (tmp)
 178                              : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
 179
 180         return new_tick;
 181 }
 182
 183 static struct sparc64_tick_ops tick_operations __read_mostly = {
 184         .init_tick      =       tick_init_tick,
 185         .get_tick       =       tick_get_tick,
 186         .get_compare    =       tick_get_compare,
 187         .add_tick       =       tick_add_tick,
 188         .add_compare    =       tick_add_compare,
 189         .softint_mask   =       1UL << 0,
 190 };
 191
 192 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
 193
 194 static void stick_init_tick(unsigned long offset)
 195 {
 196         /* Writes to the %tick and %stick register are not
 197          * allowed on sun4v.  The Hypervisor controls that
 198          * bit, per-strand.
 199          */
 200         if (tlb_type != hypervisor) {
 201                 tick_disable_protection();
 202
 203                 /* Let the user get at STICK too. */
 204                 __asm__ __volatile__(
 205                 "       rd      %%asr24, %%g2\n"
 206                 "       andn    %%g2, %0, %%g2\n"
 207                 "       wr      %%g2, 0, %%asr24"
 208                 : /* no outputs */
 209                 : "r" (TICK_PRIV_BIT)
 210                 : "g1", "g2");
 211         }
 212
 213         __asm__ __volatile__(
 214         "       rd      %%asr24, %%g1\n"
 215         "       andn    %%g1, %1, %%g1\n"
 216         "       add     %%g1, %0, %%g1\n"
 217         "       wr      %%g1, 0x0, %%asr25"
 218         : /* no outputs */
 219         : "r" (offset), "r" (TICK_PRIV_BIT)
 220         : "g1");
 221 }
 222
 223 static unsigned long stick_get_tick(void)
 224 {
 225         unsigned long ret;
 226
 227         __asm__ __volatile__("rd        %%asr24, %0"
 228                              : "=r" (ret));
 229
 230         return ret & ~TICK_PRIV_BIT;
 231 }
 232
 233 static unsigned long stick_get_compare(void)
 234 {
 235         unsigned long ret;
 236
 237         __asm__ __volatile__("rd        %%asr25, %0"
 238                              : "=r" (ret));
 239
 240         return ret;
 241 }
 242
 243 static unsigned long stick_add_tick(unsigned long adj, unsigned long offset)
 244 {
 245         unsigned long new_tick, tmp;
 246
 247         __asm__ __volatile__("rd        %%asr24, %0\n\t"
 248                              "add       %0, %2, %0\n\t"
 249                              "wr        %0, 0, %%asr24\n\t"
 250                              "andn      %0, %4, %1\n\t"
 251                              "add       %1, %3, %1\n\t"
 252                              "wr        %1, 0, %%asr25"
 253                              : "=&r" (new_tick), "=&r" (tmp)
 254                              : "r" (adj), "r" (offset), "r" (TICK_PRIV_BIT));
 255
 256         return new_tick;
 257 }
 258
 259 static unsigned long stick_add_compare(unsigned long adj)
 260 {
 261         unsigned long new_compare;
 262
 263         __asm__ __volatile__("rd        %%asr25, %0\n\t"
 264                              "add       %0, %1, %0\n\t"
 265                              "wr        %0, 0, %%asr25"
 266                              : "=&r" (new_compare)
 267                              : "r" (adj));
 268
 269         return new_compare;
 270 }
 271
 272 static struct sparc64_tick_ops stick_operations __read_mostly = {
 273         .init_tick      =       stick_init_tick,
 274         .get_tick       =       stick_get_tick,
 275         .get_compare    =       stick_get_compare,
 276         .add_tick       =       stick_add_tick,
 277         .add_compare    =       stick_add_compare,
 278         .softint_mask   =       1UL << 16,
 279 };
 280
 281 /* On Hummingbird the STICK/STICK_CMPR register is implemented
 282  * in I/O space.  There are two 64-bit registers each, the
 283  * first holds the low 32-bits of the value and the second holds
 284  * the high 32-bits.
 285  *
 286  * Since STICK is constantly updating, we have to access it carefully.
 287  *
 288  * The sequence we use to read is:
 289  * 1) read high
 290  * 2) read low
 291  * 3) read high again, if it rolled re-read both low and high again.
 292  *
 293  * Writing STICK safely is also tricky:
 294  * 1) write low to zero
 295  * 2) write high
 296  * 3) write low
 297  */
 298 #define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
 299 #define HBIRD_STICK_ADDR        0x1fe0000f070UL
 300
 301 static unsigned long __hbird_read_stick(void)
 302 {
 303         unsigned long ret, tmp1, tmp2, tmp3;
 304         unsigned long addr = HBIRD_STICK_ADDR+8;
 305
 306         __asm__ __volatile__("ldxa      [%1] %5, %2\n"
 307                              "1:\n\t"
 308                              "sub       %1, 0x8, %1\n\t"
 309                              "ldxa      [%1] %5, %3\n\t"
 310                              "add       %1, 0x8, %1\n\t"
 311                              "ldxa      [%1] %5, %4\n\t"
 312                              "cmp       %4, %2\n\t"
 313                              "bne,a,pn  %%xcc, 1b\n\t"
 314                              " mov      %4, %2\n\t"
 315                              "sllx      %4, 32, %4\n\t"
 316                              "or        %3, %4, %0\n\t"
 317                              : "=&r" (ret), "=&r" (addr),
 318                                "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
 319                              : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
 320
 321         return ret;
 322 }
 323
 324 static unsigned long __hbird_read_compare(void)
 325 {
 326         unsigned long low, high;
 327         unsigned long addr = HBIRD_STICKCMP_ADDR;
 328
 329         __asm__ __volatile__("ldxa      [%2] %3, %0\n\t"
 330                              "add       %2, 0x8, %2\n\t"
 331                              "ldxa      [%2] %3, %1"
 332                              : "=&r" (low), "=&r" (high), "=&r" (addr)
 333                              : "i" (ASI_PHYS_BYPASS_EC_E), "2" (addr));
 334
 335         return (high << 32UL) | low;
 336 }
 337
 338 static void __hbird_write_stick(unsigned long val)
 339 {
 340         unsigned long low = (val & 0xffffffffUL);
 341         unsigned long high = (val >> 32UL);
 342         unsigned long addr = HBIRD_STICK_ADDR;
 343
 344         __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
 345                              "add       %0, 0x8, %0\n\t"
 346                              "stxa      %3, [%0] %4\n\t"
 347                              "sub       %0, 0x8, %0\n\t"
 348                              "stxa      %2, [%0] %4"
 349                              : "=&r" (addr)
 350                              : "0" (addr), "r" (low), "r" (high),
 351                                "i" (ASI_PHYS_BYPASS_EC_E));
 352 }
 353
 354 static void __hbird_write_compare(unsigned long val)
 355 {
 356         unsigned long low = (val & 0xffffffffUL);
 357         unsigned long high = (val >> 32UL);
 358         unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
 359
 360         __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
 361                              "sub       %0, 0x8, %0\n\t"
 362                              "stxa      %2, [%0] %4"
 363                              : "=&r" (addr)
 364                              : "0" (addr), "r" (low), "r" (high),
 365                                "i" (ASI_PHYS_BYPASS_EC_E));
 366 }
 367
 368 static void hbtick_init_tick(unsigned long offset)
 369 {
 370         unsigned long val;
 371
 372         tick_disable_protection();
 373
 374         /* XXX This seems to be necessary to 'jumpstart' Hummingbird
 375          * XXX into actually sending STICK interrupts.  I think because
 376          * XXX of how we store %tick_cmpr in head.S this somehow resets the
 377          * XXX {TICK + STICK} interrupt mux.  -DaveM
 378          */
 379         __hbird_write_stick(__hbird_read_stick());
 380
 381         val = __hbird_read_stick() & ~TICK_PRIV_BIT;
 382         __hbird_write_compare(val + offset);
 383 }
 384
 385 static unsigned long hbtick_get_tick(void)
 386 {
 387         return __hbird_read_stick() & ~TICK_PRIV_BIT;
 388 }
 389
 390 static unsigned long hbtick_get_compare(void)
 391 {
 392         return __hbird_read_compare();
 393 }
 394
 395 static unsigned long hbtick_add_tick(unsigned long adj, unsigned long offset)
 396 {
 397         unsigned long val;
 398
 399         val = __hbird_read_stick() + adj;
 400         __hbird_write_stick(val);
 401
 402         val &= ~TICK_PRIV_BIT;
 403         __hbird_write_compare(val + offset);
 404
 405         return val;
 406 }
 407
 408 static unsigned long hbtick_add_compare(unsigned long adj)
 409 {
 410         unsigned long val = __hbird_read_compare() + adj;
 411
 412         val &= ~TICK_PRIV_BIT;
 413         __hbird_write_compare(val);
 414
 415         return val;
 416 }
 417
 418 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
 419         .init_tick      =       hbtick_init_tick,
 420         .get_tick       =       hbtick_get_tick,
 421         .get_compare    =       hbtick_get_compare,
 422         .add_tick       =       hbtick_add_tick,
 423         .add_compare    =       hbtick_add_compare,
 424         .softint_mask   =       1UL << 0,
 425 };
 426
 427 /* timer_interrupt() needs to keep up the real-time clock,
 428  * as well as call the "do_timer()" routine every clocktick
 429  *
 430  * NOTE: On SUN5 systems the ticker interrupt comes in using 2
 431  *       interrupts, one at level14 and one with softint bit 0.
 432  */
 433 unsigned long timer_tick_offset __read_mostly;
 434
 435 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
 436
 437 #define TICK_SIZE (tick_nsec / 1000)
 438
 439 static inline void timer_check_rtc(void)
 440 {
 441         /* last time the cmos clock got updated */
 442         static long last_rtc_update;
 443
 444         /* Determine when to update the Mostek clock. */
 445         if (ntp_synced() &&
 446             xtime.tv_sec > last_rtc_update + 660 &&
 447             (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
 448             (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
 449                 if (set_rtc_mmss(xtime.tv_sec) == 0)
 450                         last_rtc_update = xtime.tv_sec;
 451                 else
 452                         last_rtc_update = xtime.tv_sec - 600;
 453                         /* do it again in 60 s */
 454         }
 455 }
 456
 457 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
 458 {
 459         unsigned long ticks, compare, pstate;
 460
 461         write_seqlock(&xtime_lock);
 462
 463         do {
 464 #ifndef CONFIG_SMP
 465                 profile_tick(CPU_PROFILING, regs);
 466                 update_process_times(user_mode(regs));
 467 #endif
 468                 do_timer(regs);
 469
 470                 /* Guarantee that the following sequences execute
 471                  * uninterrupted.
 472                  */
 473                 __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 474                                      "wrpr      %0, %1, %%pstate"
 475                                      : "=r" (pstate)
 476                                      : "i" (PSTATE_IE));
 477
 478                 compare = tick_ops->add_compare(timer_tick_offset);
 479                 ticks = tick_ops->get_tick();
 480
 481                 /* Restore PSTATE_IE. */
 482                 __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
 483                                      : /* no outputs */
 484                                      : "r" (pstate));
 485         } while (time_after_eq(ticks, compare));
 486
 487         timer_check_rtc();
 488
 489         write_sequnlock(&xtime_lock);
 490
 491         return IRQ_HANDLED;
 492 }
 493
 494 #ifdef CONFIG_SMP
 495 void timer_tick_interrupt(struct pt_regs *regs)
 496 {
 497         write_seqlock(&xtime_lock);
 498
 499         do_timer(regs);
 500
 501         timer_check_rtc();
 502
 503         write_sequnlock(&xtime_lock);
 504 }
 505 #endif
 506
 507 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
 508 static void __init kick_start_clock(void)
 509 {
 510         void __iomem *regs = mstk48t02_regs;
 511         u8 sec, tmp;
 512         int i, count;
 513
 514         prom_printf("CLOCK: Clock was stopped. Kick start ");
 515
 516         spin_lock_irq(&mostek_lock);
 517
 518         /* Turn on the kick start bit to start the oscillator. */
 519         tmp = mostek_read(regs + MOSTEK_CREG);
 520         tmp |= MSTK_CREG_WRITE;
 521         mostek_write(regs + MOSTEK_CREG, tmp);
 522         tmp = mostek_read(regs + MOSTEK_SEC);
 523         tmp &= ~MSTK_STOP;
 524         mostek_write(regs + MOSTEK_SEC, tmp);
 525         tmp = mostek_read(regs + MOSTEK_HOUR);
 526         tmp |= MSTK_KICK_START;
 527         mostek_write(regs + MOSTEK_HOUR, tmp);
 528         tmp = mostek_read(regs + MOSTEK_CREG);
 529         tmp &= ~MSTK_CREG_WRITE;
 530         mostek_write(regs + MOSTEK_CREG, tmp);
 531
 532         spin_unlock_irq(&mostek_lock);
 533
 534         /* Delay to allow the clock oscillator to start. */
 535         sec = MSTK_REG_SEC(regs);
 536         for (i = 0; i < 3; i++) {
 537                 while (sec == MSTK_REG_SEC(regs))
 538                         for (count = 0; count < 100000; count++)
 539                                 /* nothing */ ;
 540                 prom_printf(".");
 541                 sec = MSTK_REG_SEC(regs);
 542         }
 543         prom_printf("\n");
 544
 545         spin_lock_irq(&mostek_lock);
 546
 547         /* Turn off kick start and set a "valid" time and date. */
 548         tmp = mostek_read(regs + MOSTEK_CREG);
 549         tmp |= MSTK_CREG_WRITE;
 550         mostek_write(regs + MOSTEK_CREG, tmp);
 551         tmp = mostek_read(regs + MOSTEK_HOUR);
 552         tmp &= ~MSTK_KICK_START;
 553         mostek_write(regs + MOSTEK_HOUR, tmp);
 554         MSTK_SET_REG_SEC(regs,0);
 555         MSTK_SET_REG_MIN(regs,0);
 556         MSTK_SET_REG_HOUR(regs,0);
 557         MSTK_SET_REG_DOW(regs,5);
 558         MSTK_SET_REG_DOM(regs,1);
 559         MSTK_SET_REG_MONTH(regs,8);
 560         MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
 561         tmp = mostek_read(regs + MOSTEK_CREG);
 562         tmp &= ~MSTK_CREG_WRITE;
 563         mostek_write(regs + MOSTEK_CREG, tmp);
 564
 565         spin_unlock_irq(&mostek_lock);
 566
 567         /* Ensure the kick start bit is off. If it isn't, turn it off. */
 568         while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
 569                 prom_printf("CLOCK: Kick start still on!\n");
 570
 571                 spin_lock_irq(&mostek_lock);
 572
 573                 tmp = mostek_read(regs + MOSTEK_CREG);
 574                 tmp |= MSTK_CREG_WRITE;
 575                 mostek_write(regs + MOSTEK_CREG, tmp);
 576
 577                 tmp = mostek_read(regs + MOSTEK_HOUR);
 578                 tmp &= ~MSTK_KICK_START;
 579                 mostek_write(regs + MOSTEK_HOUR, tmp);
 580
 581                 tmp = mostek_read(regs + MOSTEK_CREG);
 582                 tmp &= ~MSTK_CREG_WRITE;
 583                 mostek_write(regs + MOSTEK_CREG, tmp);
 584
 585                 spin_unlock_irq(&mostek_lock);
 586         }
 587
 588         prom_printf("CLOCK: Kick start procedure successful.\n");
 589 }
 590
 591 /* Return nonzero if the clock chip battery is low. */
 592 static int __init has_low_battery(void)
 593 {
 594         void __iomem *regs = mstk48t02_regs;
 595         u8 data1, data2;
 596
 597         spin_lock_irq(&mostek_lock);
 598
 599         data1 = mostek_read(regs + MOSTEK_EEPROM);      /* Read some data. */
 600         mostek_write(regs + MOSTEK_EEPROM, ~data1);     /* Write back the complement. */
 601         data2 = mostek_read(regs + MOSTEK_EEPROM);      /* Read back the complement. */
 602         mostek_write(regs + MOSTEK_EEPROM, data1);      /* Restore original value. */
 603
 604         spin_unlock_irq(&mostek_lock);
 605
 606         return (data1 == data2);        /* Was the write blocked? */
 607 }
 608
 609 /* Probe for the real time clock chip. */
 610 static void __init set_system_time(void)
 611 {
 612         unsigned int year, mon, day, hour, min, sec;
 613         void __iomem *mregs = mstk48t02_regs;
 614 #ifdef CONFIG_PCI
 615         unsigned long dregs = ds1287_regs;
 616 #else
 617         unsigned long dregs = 0UL;
 618 #endif
 619         u8 tmp;
 620
 621         if (!mregs && !dregs) {
 622                 prom_printf("Something wrong, clock regs not mapped yet.\n");
 623                 prom_halt();
 624         }
 625
 626         if (mregs) {
 627                 spin_lock_irq(&mostek_lock);
 628
 629                 /* Traditional Mostek chip. */
 630                 tmp = mostek_read(mregs + MOSTEK_CREG);
 631                 tmp |= MSTK_CREG_READ;
 632                 mostek_write(mregs + MOSTEK_CREG, tmp);
 633
 634                 sec = MSTK_REG_SEC(mregs);
 635                 min = MSTK_REG_MIN(mregs);
 636                 hour = MSTK_REG_HOUR(mregs);
 637                 day = MSTK_REG_DOM(mregs);
 638                 mon = MSTK_REG_MONTH(mregs);
 639                 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
 640         } else {
 641                 int i;
 642
 643                 /* Dallas 12887 RTC chip. */
 644
 645                 /* Stolen from arch/i386/kernel/time.c, see there for
 646                  * credits and descriptive comments.
 647                  */
 648                 for (i = 0; i < 1000000; i++) {
 649                         if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
 650                                 break;
 651                         udelay(10);
 652                 }
 653                 for (i = 0; i < 1000000; i++) {
 654                         if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
 655                                 break;
 656                         udelay(10);
 657                 }
 658                 do {
 659                         sec  = CMOS_READ(RTC_SECONDS);
 660                         min  = CMOS_READ(RTC_MINUTES);
 661                         hour = CMOS_READ(RTC_HOURS);
 662                         day  = CMOS_READ(RTC_DAY_OF_MONTH);
 663                         mon  = CMOS_READ(RTC_MONTH);
 664                         year = CMOS_READ(RTC_YEAR);
 665                 } while (sec != CMOS_READ(RTC_SECONDS));
 666                 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 667                         BCD_TO_BIN(sec);
 668                         BCD_TO_BIN(min);
 669                         BCD_TO_BIN(hour);
 670                         BCD_TO_BIN(day);
 671                         BCD_TO_BIN(mon);
 672                         BCD_TO_BIN(year);
 673                 }
 674                 if ((year += 1900) < 1970)
 675                         year += 100;
 676         }
 677
 678         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 679         xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 680         set_normalized_timespec(&wall_to_monotonic,
 681                                 -xtime.tv_sec, -xtime.tv_nsec);
 682
 683         if (mregs) {
 684                 tmp = mostek_read(mregs + MOSTEK_CREG);
 685                 tmp &= ~MSTK_CREG_READ;
 686                 mostek_write(mregs + MOSTEK_CREG, tmp);
 687
 688                 spin_unlock_irq(&mostek_lock);
 689         }
 690 }
 691
 692 /* davem suggests we keep this within the 4M locked kernel image */
 693 static u32 starfire_get_time(void)
 694 {
 695         static char obp_gettod[32];
 696         static u32 unix_tod;
 697
 698         sprintf(obp_gettod, "h# %08x unix-gettod",
 699                 (unsigned int) (long) &unix_tod);
 700         prom_feval(obp_gettod);
 701
 702         return unix_tod;
 703 }
 704
 705 static u32 hypervisor_get_time(void)
 706 {
 707         register unsigned long func asm("%o5");
 708         register unsigned long arg0 asm("%o0");
 709         register unsigned long arg1 asm("%o1");
 710         int retries = 10000;
 711
 712 retry:
 713         func = HV_FAST_TOD_GET;
 714         arg0 = 0;
 715         arg1 = 0;
 716         __asm__ __volatile__("ta        %6"
 717                              : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
 718                              : "0" (func), "1" (arg0), "2" (arg1),
 719                                "i" (HV_FAST_TRAP));
 720         if (arg0 == HV_EOK)
 721                 return arg1;
 722         if (arg0 == HV_EWOULDBLOCK) {
 723                 if (--retries > 0) {
 724                         udelay(100);
 725                         goto retry;
 726                 }
 727                 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
 728                 return 0;
 729         }
 730         printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
 731         return 0;
 732 }
 733
 734 void __init clock_probe(void)
 735 {
 736         struct linux_prom_registers clk_reg[2];
 737         char model[128];
 738         int node, busnd = -1, err;
 739         unsigned long flags;
 740         struct linux_central *cbus;
 741 #ifdef CONFIG_PCI
 742         struct linux_ebus *ebus = NULL;
 743         struct sparc_isa_bridge *isa_br = NULL;
 744 #endif
 745         static int invoked;
 746
 747         if (invoked)
 748                 return;
 749         invoked = 1;
 750
 751
 752         if (this_is_starfire) {
 753                 xtime.tv_sec = starfire_get_time();
 754                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 755                 set_normalized_timespec(&wall_to_monotonic,
 756                                         -xtime.tv_sec, -xtime.tv_nsec);
 757                 return;
 758         }
 759         if (tlb_type == hypervisor) {
 760                 xtime.tv_sec = hypervisor_get_time();
 761                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 762                 set_normalized_timespec(&wall_to_monotonic,
 763                                         -xtime.tv_sec, -xtime.tv_nsec);
 764                 return;
 765         }
 766
 767         local_irq_save(flags);
 768
 769         cbus = central_bus;
 770         if (cbus != NULL)
 771                 busnd = central_bus->child->prom_node;
 772
 773         /* Check FHC Central then EBUSs then ISA bridges then SBUSs.
 774          * That way we handle the presence of multiple properly.
 775          *
 776          * As a special case, machines with Central must provide the
 777          * timer chip there.
 778          */
 779 #ifdef CONFIG_PCI
 780         if (ebus_chain != NULL) {
 781                 ebus = ebus_chain;
 782                 if (busnd == -1)
 783                         busnd = ebus->prom_node;
 784         }
 785         if (isa_chain != NULL) {
 786                 isa_br = isa_chain;
 787                 if (busnd == -1)
 788                         busnd = isa_br->prom_node;
 789         }
 790 #endif
 791         if (sbus_root != NULL && busnd == -1)
 792                 busnd = sbus_root->prom_node;
 793
 794         if (busnd == -1) {
 795                 prom_printf("clock_probe: problem, cannot find bus to search.\n");
 796                 prom_halt();
 797         }
 798
 799         node = prom_getchild(busnd);
 800
 801         while (1) {
 802                 if (!node)
 803                         model[0] = 0;
 804                 else
 805                         prom_getstring(node, "model", model, sizeof(model));
 806                 if (strcmp(model, "mk48t02") &&
 807                     strcmp(model, "mk48t08") &&
 808                     strcmp(model, "mk48t59") &&
 809                     strcmp(model, "m5819") &&
 810                     strcmp(model, "m5819p") &&
 811                     strcmp(model, "m5823") &&
 812                     strcmp(model, "ds1287")) {
 813                         if (cbus != NULL) {
 814                                 prom_printf("clock_probe: Central bus lacks timer chip.\n");
 815                                 prom_halt();
 816                         }
 817
 818                         if (node != 0)
 819                                 node = prom_getsibling(node);
 820 #ifdef CONFIG_PCI
 821                         while ((node == 0) && ebus != NULL) {
 822                                 ebus = ebus->next;
 823                                 if (ebus != NULL) {
 824                                         busnd = ebus->prom_node;
 825                                         node = prom_getchild(busnd);
 826                                 }
 827                         }
 828                         while ((node == 0) && isa_br != NULL) {
 829                                 isa_br = isa_br->next;
 830                                 if (isa_br != NULL) {
 831                                         busnd = isa_br->prom_node;
 832                                         node = prom_getchild(busnd);
 833                                 }
 834                         }
 835 #endif
 836                         if (node == 0) {
 837                                 prom_printf("clock_probe: Cannot find timer chip\n");
 838                                 prom_halt();
 839                         }
 840                         continue;
 841                 }
 842
 843                 err = prom_getproperty(node, "reg", (char *)clk_reg,
 844                                        sizeof(clk_reg));
 845                 if(err == -1) {
 846                         prom_printf("clock_probe: Cannot get Mostek reg property\n");
 847                         prom_halt();
 848                 }
 849
 850                 if (cbus != NULL) {
 851                         apply_fhc_ranges(central_bus->child, clk_reg, 1);
 852                         apply_central_ranges(central_bus, clk_reg, 1);
 853                 }
 854 #ifdef CONFIG_PCI
 855                 else if (ebus != NULL) {
 856                         struct linux_ebus_device *edev;
 857
 858                         for_each_ebusdev(edev, ebus)
 859                                 if (edev->prom_node == node)
 860                                         break;
 861                         if (edev == NULL) {
 862                                 if (isa_chain != NULL)
 863                                         goto try_isa_clock;
 864                                 prom_printf("%s: Mostek not probed by EBUS\n",
 865                                             __FUNCTION__);
 866                                 prom_halt();
 867                         }
 868
 869                         if (!strcmp(model, "ds1287") ||
 870                             !strcmp(model, "m5819") ||
 871                             !strcmp(model, "m5819p") ||
 872                             !strcmp(model, "m5823")) {
 873                                 ds1287_regs = edev->resource[0].start;
 874                         } else {
 875                                 mstk48t59_regs = (void __iomem *)
 876                                         edev->resource[0].start;
 877                                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 878                         }
 879                         break;
 880                 }
 881                 else if (isa_br != NULL) {
 882                         struct sparc_isa_device *isadev;
 883
 884 try_isa_clock:
 885                         for_each_isadev(isadev, isa_br)
 886                                 if (isadev->prom_node == node)
 887                                         break;
 888                         if (isadev == NULL) {
 889                                 prom_printf("%s: Mostek not probed by ISA\n");
 890                                 prom_halt();
 891                         }
 892                         if (!strcmp(model, "ds1287") ||
 893                             !strcmp(model, "m5819") ||
 894                             !strcmp(model, "m5819p") ||
 895                             !strcmp(model, "m5823")) {
 896                                 ds1287_regs = isadev->resource.start;
 897                         } else {
 898                                 mstk48t59_regs = (void __iomem *)
 899                                         isadev->resource.start;
 900                                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 901                         }
 902                         break;
 903                 }
 904 #endif
 905                 else {
 906                         if (sbus_root->num_sbus_ranges) {
 907                                 int nranges = sbus_root->num_sbus_ranges;
 908                                 int rngc;
 909
 910                                 for (rngc = 0; rngc < nranges; rngc++)
 911                                         if (clk_reg[0].which_io ==
 912                                             sbus_root->sbus_ranges[rngc].ot_child_space)
 913                                                 break;
 914                                 if (rngc == nranges) {
 915                                         prom_printf("clock_probe: Cannot find ranges for "
 916                                                     "clock regs.\n");
 917                                         prom_halt();
 918                                 }
 919                                 clk_reg[0].which_io =
 920                                         sbus_root->sbus_ranges[rngc].ot_parent_space;
 921                                 clk_reg[0].phys_addr +=
 922                                         sbus_root->sbus_ranges[rngc].ot_parent_base;
 923                         }
 924                 }
 925
 926                 if(model[5] == '0' && model[6] == '2') {
 927                         mstk48t02_regs = (void __iomem *)
 928                                 (((u64)clk_reg[0].phys_addr) |
 929                                  (((u64)clk_reg[0].which_io)<<32UL));
 930                 } else if(model[5] == '0' && model[6] == '8') {
 931                         mstk48t08_regs = (void __iomem *)
 932                                 (((u64)clk_reg[0].phys_addr) |
 933                                  (((u64)clk_reg[0].which_io)<<32UL));
 934                         mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
 935                 } else {
 936                         mstk48t59_regs = (void __iomem *)
 937                                 (((u64)clk_reg[0].phys_addr) |
 938                                  (((u64)clk_reg[0].which_io)<<32UL));
 939                         mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 940                 }
 941                 break;
 942         }
 943
 944         if (mstk48t02_regs != NULL) {
 945                 /* Report a low battery voltage condition. */
 946                 if (has_low_battery())
 947                         prom_printf("NVRAM: Low battery voltage!\n");
 948
 949                 /* Kick start the clock if it is completely stopped. */
 950                 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
 951                         kick_start_clock();
 952         }
 953
 954         set_system_time();
 955
 956         local_irq_restore(flags);
 957 }
 958
 959 /* This is gets the master TICK_INT timer going. */
 960 static unsigned long sparc64_init_timers(void)
 961 {
 962         unsigned long clock;
 963         int node;
 964 #ifdef CONFIG_SMP
 965         extern void smp_tick_init(void);
 966 #endif
 967
 968         if (tlb_type == spitfire) {
 969                 unsigned long ver, manuf, impl;
 970
 971                 __asm__ __volatile__ ("rdpr %%ver, %0"
 972                                       : "=&r" (ver));
 973                 manuf = ((ver >> 48) & 0xffff);
 974                 impl = ((ver >> 32) & 0xffff);
 975                 if (manuf == 0x17 && impl == 0x13) {
 976                         /* Hummingbird, aka Ultra-IIe */
 977                         tick_ops = &hbtick_operations;
 978                         node = prom_root_node;
 979                         clock = prom_getint(node, "stick-frequency");
 980                 } else {
 981                         tick_ops = &tick_operations;
 982                         cpu_find_by_instance(0, &node, NULL);
 983                         clock = prom_getint(node, "clock-frequency");
 984                 }
 985         } else {
 986                 tick_ops = &stick_operations;
 987                 node = prom_root_node;
 988                 clock = prom_getint(node, "stick-frequency");
 989         }
 990         timer_tick_offset = clock / HZ;
 991
 992 #ifdef CONFIG_SMP
 993         smp_tick_init();
 994 #endif
 995
 996         return clock;
 997 }
 998
 999 static void sparc64_start_timers(irqreturn_t (*cfunc)(int, void *, struct pt_regs *))
1000 {
1001         unsigned long pstate;
1002         int err;
1003
1004         /* Register IRQ handler. */
1005         err = request_irq(build_irq(0, 0, 0UL, 0UL), cfunc, 0,
1006                           "timer", NULL);
1007
1008         if (err) {
1009                 prom_printf("Serious problem, cannot register TICK_INT\n");
1010                 prom_halt();
1011         }
1012
1013         /* Guarantee that the following sequences execute
1014          * uninterrupted.
1015          */
1016         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
1017                              "wrpr      %0, %1, %%pstate"
1018                              : "=r" (pstate)
1019                              : "i" (PSTATE_IE));
1020
1021         tick_ops->init_tick(timer_tick_offset);
1022
1023         /* Restore PSTATE_IE. */
1024         __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
1025                              : /* no outputs */
1026                              : "r" (pstate));
1027
1028         local_irq_enable();
1029 }
1030
1031 struct freq_table {
1032         unsigned long clock_tick_ref;
1033         unsigned int ref_freq;
1034 };
1035 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
1036
1037 unsigned long sparc64_get_clock_tick(unsigned int cpu)
1038 {
1039         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1040
1041         if (ft->clock_tick_ref)
1042                 return ft->clock_tick_ref;
1043         return cpu_data(cpu).clock_tick;
1044 }
1045
1046 #ifdef CONFIG_CPU_FREQ
1047
1048 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
1049                                     void *data)
1050 {
1051         struct cpufreq_freqs *freq = data;
1052         unsigned int cpu = freq->cpu;
1053         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
1054
1055         if (!ft->ref_freq) {
1056                 ft->ref_freq = freq->old;
1057                 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
1058         }
1059         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
1060             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
1061             (val == CPUFREQ_RESUMECHANGE)) {
1062                 cpu_data(cpu).clock_tick =
1063                         cpufreq_scale(ft->clock_tick_ref,
1064                                       ft->ref_freq,
1065                                       freq->new);
1066         }
1067
1068         return 0;
1069 }
1070
1071 static struct notifier_block sparc64_cpufreq_notifier_block = {
1072         .notifier_call  = sparc64_cpufreq_notifier
1073 };
1074
1075 #endif /* CONFIG_CPU_FREQ */
1076
1077 static struct time_interpolator sparc64_cpu_interpolator = {
1078         .source         =       TIME_SOURCE_CPU,
1079         .shift          =       16,
1080         .mask           =       0xffffffffffffffffLL
1081 };
1082
1083 /* The quotient formula is taken from the IA64 port. */
1084 #define SPARC64_NSEC_PER_CYC_SHIFT      30UL
1085 void __init time_init(void)
1086 {
1087         unsigned long clock = sparc64_init_timers();
1088
1089         sparc64_cpu_interpolator.frequency = clock;
1090         register_time_interpolator(&sparc64_cpu_interpolator);
1091
1092         /* Now that the interpolator is registered, it is
1093          * safe to start the timer ticking.
1094          */
1095         sparc64_start_timers(timer_interrupt);
1096
1097         timer_ticks_per_nsec_quotient =
1098                 (((NSEC_PER_SEC << SPARC64_NSEC_PER_CYC_SHIFT) +
1099                   (clock / 2)) / clock);
1100
1101 #ifdef CONFIG_CPU_FREQ
1102         cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1103                                   CPUFREQ_TRANSITION_NOTIFIER);
1104 #endif
1105 }
1106
1107 unsigned long long sched_clock(void)
1108 {
1109         unsigned long ticks = tick_ops->get_tick();
1110
1111         return (ticks * timer_ticks_per_nsec_quotient)
1112                 >> SPARC64_NSEC_PER_CYC_SHIFT;
1113 }
1114
1115 static int set_rtc_mmss(unsigned long nowtime)
1116 {
1117         int real_seconds, real_minutes, chip_minutes;
1118         void __iomem *mregs = mstk48t02_regs;
1119 #ifdef CONFIG_PCI
1120         unsigned long dregs = ds1287_regs;
1121 #else
1122         unsigned long dregs = 0UL;
1123 #endif
1124         unsigned long flags;
1125         u8 tmp;
1126
1127         /*
1128          * Not having a register set can lead to trouble.
1129          * Also starfire doesn't have a tod clock.
1130          */
1131         if (!mregs && !dregs)
1132                 return -1;
1133
1134         if (mregs) {
1135                 spin_lock_irqsave(&mostek_lock, flags);
1136
1137                 /* Read the current RTC minutes. */
1138                 tmp = mostek_read(mregs + MOSTEK_CREG);
1139                 tmp |= MSTK_CREG_READ;
1140                 mostek_write(mregs + MOSTEK_CREG, tmp);
1141
1142                 chip_minutes = MSTK_REG_MIN(mregs);
1143
1144                 tmp = mostek_read(mregs + MOSTEK_CREG);
1145                 tmp &= ~MSTK_CREG_READ;
1146                 mostek_write(mregs + MOSTEK_CREG, tmp);
1147
1148                 /*
1149                  * since we're only adjusting minutes and seconds,
1150                  * don't interfere with hour overflow. This avoids
1151                  * messing with unknown time zones but requires your
1152                  * RTC not to be off by more than 15 minutes
1153                  */
1154                 real_seconds = nowtime % 60;
1155                 real_minutes = nowtime / 60;
1156                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1157                         real_minutes += 30;     /* correct for half hour time zone */
1158                 real_minutes %= 60;
1159
1160                 if (abs(real_minutes - chip_minutes) < 30) {
1161                         tmp = mostek_read(mregs + MOSTEK_CREG);
1162                         tmp |= MSTK_CREG_WRITE;
1163                         mostek_write(mregs + MOSTEK_CREG, tmp);
1164
1165                         MSTK_SET_REG_SEC(mregs,real_seconds);
1166                         MSTK_SET_REG_MIN(mregs,real_minutes);
1167
1168                         tmp = mostek_read(mregs + MOSTEK_CREG);
1169                         tmp &= ~MSTK_CREG_WRITE;
1170                         mostek_write(mregs + MOSTEK_CREG, tmp);
1171
1172                         spin_unlock_irqrestore(&mostek_lock, flags);
1173
1174                         return 0;
1175                 } else {
1176                         spin_unlock_irqrestore(&mostek_lock, flags);
1177
1178                         return -1;
1179                 }
1180         } else {
1181                 int retval = 0;
1182                 unsigned char save_control, save_freq_select;
1183
1184                 /* Stolen from arch/i386/kernel/time.c, see there for
1185                  * credits and descriptive comments.
1186                  */
1187                 spin_lock_irqsave(&rtc_lock, flags);
1188                 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1189                 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1190
1191                 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1192                 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1193
1194                 chip_minutes = CMOS_READ(RTC_MINUTES);
1195                 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1196                         BCD_TO_BIN(chip_minutes);
1197                 real_seconds = nowtime % 60;
1198                 real_minutes = nowtime / 60;
1199                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1200                         real_minutes += 30;
1201                 real_minutes %= 60;
1202
1203                 if (abs(real_minutes - chip_minutes) < 30) {
1204                         if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1205                                 BIN_TO_BCD(real_seconds);
1206                                 BIN_TO_BCD(real_minutes);
1207                         }
1208                         CMOS_WRITE(real_seconds,RTC_SECONDS);
1209                         CMOS_WRITE(real_minutes,RTC_MINUTES);
1210                 } else {
1211                         printk(KERN_WARNING
1212                                "set_rtc_mmss: can't update from %d to %d\n",
1213                                chip_minutes, real_minutes);
1214                         retval = -1;
1215                 }
1216
1217                 CMOS_WRITE(save_control, RTC_CONTROL);
1218                 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1219                 spin_unlock_irqrestore(&rtc_lock, flags);
1220
1221                 return retval;
1222         }
1223 }