2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
11 * This module provides support for automatic detection and
12 * configuration of all PCI IDE interfaces present in a system.
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/pci.h>
19 #include <linux/init.h>
20 #include <linux/timer.h>
22 #include <linux/interrupt.h>
23 #include <linux/ide.h>
24 #include <linux/dma-mapping.h>
31 * ide_match_hwif - match a PCI IDE against an ide_hwif
32 * @io_base: I/O base of device
33 * @bootable: set if its bootable
34 * @name: name of device
36 * Match a PCI IDE port against an entry in ide_hwifs[],
37 * based on io_base port if possible. Return the matching hwif,
38 * or a new hwif. If we find an error (clashing, out of devices, etc)
41 * FIXME: we need to handle mmio matches here too
44 static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
50 * Look for a hwif with matching io_base specified using
51 * parameters to ide_setup().
53 for (h = 0; h < MAX_HWIFS; ++h) {
55 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
56 if (hwif->chipset == ide_forced)
57 return hwif; /* a perfect match */
61 * Look for a hwif with matching io_base default value.
62 * If chipset is "ide_unknown", then claim that hwif slot.
63 * Otherwise, some other chipset has already claimed it.. :(
65 for (h = 0; h < MAX_HWIFS; ++h) {
67 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
68 if (hwif->chipset == ide_unknown)
69 return hwif; /* match */
70 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
71 name, io_base, hwif->name);
72 return NULL; /* already claimed */
76 * Okay, there is no hwif matching our io_base,
77 * so we'll just claim an unassigned slot.
78 * Give preference to claiming other slots before claiming ide0/ide1,
79 * just in case there's another interface yet-to-be-scanned
80 * which uses ports 1f0/170 (the ide0/ide1 defaults).
82 * Unless there is a bootable card that does not use the standard
83 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
86 for (h = 0; h < MAX_HWIFS; ++h) {
88 if (hwif->chipset == ide_unknown)
89 return hwif; /* pick an unused entry */
92 for (h = 2; h < MAX_HWIFS; ++h) {
94 if (hwif->chipset == ide_unknown)
95 return hwif; /* pick an unused entry */
98 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) {
100 if (hwif->chipset == ide_unknown)
101 return hwif; /* pick an unused entry */
103 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
108 * ide_setup_pci_baseregs - place a PCI IDE controller native
109 * @dev: PCI device of interface to switch native
110 * @name: Name of interface
112 * We attempt to place the PCI interface into PCI native mode. If
113 * we succeed the BARs are ok and the controller is in PCI mode.
114 * Returns 0 on success or an errno code.
116 * FIXME: if we program the interface and then fail to set the BARS
117 * we don't switch it back to legacy mode. Do we actually care ??
120 static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
125 * Place both IDE interfaces into PCI "native" mode:
127 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
129 if ((progif & 0xa) != 0xa) {
130 printk(KERN_INFO "%s: device not capable of full "
131 "native PCI mode\n", name);
134 printk("%s: placing both ports into native PCI mode\n", name);
135 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
136 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
138 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
139 "0x%04x, got 0x%04x\n",
140 name, progif|5, progif);
147 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
149 * ide_get_or_set_dma_base - setup BMIBA
151 * @hwif: IDE interface
153 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
154 * Where a device has a partner that is already in DMA mode we check
155 * and enforce IDE simplex rules.
158 static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
160 unsigned long dma_base = 0;
161 struct pci_dev *dev = hwif->pci_dev;
164 return hwif->dma_base;
166 if (hwif->mate && hwif->mate->dma_base) {
167 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
169 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
171 dma_base = pci_resource_start(dev, baridx);
174 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
177 if ((d->host_flags & IDE_HFLAG_CS5520) == 0 && dma_base) {
179 dma_base += hwif->channel ? 8 : 0;
181 switch(dev->device) {
182 case PCI_DEVICE_ID_AL_M5219:
183 case PCI_DEVICE_ID_AL_M5229:
184 case PCI_DEVICE_ID_AMD_VIPER_7409:
185 case PCI_DEVICE_ID_CMD_643:
186 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
187 case PCI_DEVICE_ID_REVOLUTION:
188 simplex_stat = inb(dma_base + 2);
189 outb(simplex_stat & 0x60, dma_base + 2);
190 simplex_stat = inb(dma_base + 2);
191 if (simplex_stat & 0x80) {
192 printk(KERN_INFO "%s: simplex device: "
199 * If the device claims "simplex" DMA,
200 * this means only one of the two interfaces
201 * can be trusted with DMA at any point in time.
202 * So we should enable DMA only on one of the
205 simplex_stat = hwif->INB(dma_base + 2);
206 if (simplex_stat & 0x80) {
207 /* simplex device? */
209 * At this point we haven't probed the drives so we can't make the
210 * appropriate decision. Really we should defer this problem
211 * until we tune the drive then try to grab DMA ownership if we want
212 * to be the DMA end. This has to be become dynamic to handle hot
215 if (hwif->mate && hwif->mate->dma_base) {
216 printk(KERN_INFO "%s: simplex device: "
226 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
228 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
230 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
231 " PCI slot %s\n", d->name, dev->vendor, dev->device,
232 dev->revision, pci_name(dev));
235 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
239 * ide_pci_enable - do PCI enables
243 * Enable the IDE PCI device. We attempt to enable the device in full
244 * but if that fails then we only need BAR4 so we will enable that.
246 * Returns zero on success or an error code
249 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
253 if (pci_enable_device(dev)) {
254 ret = pci_enable_device_bars(dev, 1 << 4);
256 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
257 "Could not enable device.\n", d->name);
260 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
264 * assume all devices can do 32-bit DMA for now, we can add
265 * a DMA mask field to the struct ide_port_info if we need it
266 * (or let lower level driver set the DMA mask)
268 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
270 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
274 /* FIXME: Temporary - until we put in the hotplug interface logic
275 Check that the bits we want are not in use by someone else. */
276 ret = pci_request_region(dev, 4, "ide_tmp");
280 pci_release_region(dev, 4);
286 * ide_pci_configure - configure an unconfigured device
290 * Enable and configure the PCI device we have been passed.
291 * Returns zero on success or an error code.
294 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
298 * PnP BIOS was *supposed* to have setup this device, but we
299 * can do it ourselves, so long as the BIOS has assigned an IRQ
300 * (or possibly the device is using a "legacy header" for IRQs).
301 * Maybe the user deliberately *disabled* the device,
302 * but we'll eventually ignore it again if no drives respond.
304 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
306 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
309 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
310 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
313 if (!(pcicmd & PCI_COMMAND_IO)) {
314 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
321 * ide_pci_check_iomem - check a register is I/O
326 * Checks if a BAR is configured and points to MMIO space. If so
327 * print an error and return an error code. Otherwise return 0
330 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar)
332 ulong flags = pci_resource_flags(dev, bar);
335 if (!flags || pci_resource_len(dev, bar) == 0)
339 if(flags & PCI_BASE_ADDRESS_IO_MASK)
343 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
345 "<andre@linux-ide.org>.\n", d->name);
350 * ide_hwif_configure - configure an IDE interface
351 * @dev: PCI device holding interface
353 * @mate: Paired interface if any
355 * Perform the initial set up for the hardware interface structure. This
356 * is done per interface port rather than per PCI device. There may be
357 * more than one port per device.
359 * Returns the new hardware interface structure, or NULL on a failure
362 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq)
364 unsigned long ctl = 0, base = 0;
366 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
368 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
369 /* Possibly we should fail if these checks report true */
370 ide_pci_check_iomem(dev, d, 2*port);
371 ide_pci_check_iomem(dev, d, 2*port+1);
373 ctl = pci_resource_start(dev, 2*port+1);
374 base = pci_resource_start(dev, 2*port);
375 if ((ctl && !base) || (base && !ctl)) {
376 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
377 "for port %d, skipping\n", d->name, port);
383 /* Use default values */
384 ctl = port ? 0x374 : 0x3f4;
385 base = port ? 0x170 : 0x1f0;
387 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
388 return NULL; /* no room in ide_hwifs[] */
389 if (hwif->io_ports[IDE_DATA_OFFSET] != base ||
390 hwif->io_ports[IDE_CONTROL_OFFSET] != (ctl | 2)) {
393 memset(&hw, 0, sizeof(hw));
394 #ifndef CONFIG_IDE_ARCH_OBSOLETE_INIT
395 ide_std_init_ports(&hw, base, ctl | 2);
397 ide_init_hwif_ports(&hw, base, ctl | 2, NULL);
399 memcpy(hwif->io_ports, hw.io_ports, sizeof(hwif->io_ports));
400 hwif->noprobe = !hwif->io_ports[IDE_DATA_OFFSET];
402 hwif->chipset = d->chipset ? d->chipset : ide_pci;
405 hwif->channel = port;
417 * ide_hwif_setup_dma - configure DMA interface
420 * @hwif: IDE interface
422 * Set up the DMA base for the interface. Enable the master bits as
423 * necessary and attempt to bring the device DMA into a ready to use
427 static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif)
429 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
432 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
434 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
435 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
436 (dev->class & 0x80))) {
437 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif);
438 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
440 * Set up BM-DMA capability
441 * (PnP BIOS should have done this)
444 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
445 printk(KERN_ERR "%s: %s error updating PCICMD\n",
446 hwif->name, d->name);
452 d->init_dma(hwif, dma_base);
454 ide_setup_dma(hwif, dma_base, 8);
457 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
458 "(BIOS)\n", hwif->name, d->name);
461 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
465 * ide_setup_pci_controller - set up IDE PCI
468 * @noisy: verbose flag
469 * @config: returned as 1 if we configured the hardware
471 * Set up the PCI and controller side of the IDE interface. This brings
472 * up the PCI side of the device, checks that the device is enabled
473 * and enables it if need be
476 static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
482 ide_setup_pci_noise(dev, d);
484 ret = ide_pci_enable(dev, d);
488 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
490 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
493 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
494 ret = ide_pci_configure(dev, d);
498 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
506 * ide_pci_setup_ports - configure ports/devices on PCI IDE
510 * @idx: ATA index table to update
512 * Scan the interfaces attached to this device and do any
513 * necessary per port setup. Attach the devices and ask the
514 * generic DMA layer to do its work for us.
516 * Normally called automaticall from do_ide_pci_setup_device,
517 * but is also used directly as a helper function by some controllers
518 * where the chipset setup is not the default PCI IDE one.
521 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
523 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
524 ide_hwif_t *hwif, *mate = NULL;
528 * Set up the IDE ports
531 for (port = 0; port < channels; ++port) {
532 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
534 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
535 (tmp & e->mask) != e->val)) {
536 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
537 continue; /* port not enabled */
540 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
543 /* setup proper ancestral information */
544 hwif->gendev.parent = &dev->dev;
546 *(idx + port) = hwif->index;
552 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
553 ide_hwif_setup_dma(dev, d, hwif);
555 if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) ||
556 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS))
557 hwif->irq = port ? 15 : 14;
559 hwif->fixup = d->fixup;
561 hwif->host_flags = d->host_flags;
562 hwif->pio_mask = d->pio_mask;
564 if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate)
565 hwif->mate->serialized = hwif->serialized = 1;
567 if (d->host_flags & IDE_HFLAG_IO_32BIT) {
568 hwif->drives[0].io_32bit = 1;
569 hwif->drives[1].io_32bit = 1;
572 if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) {
573 hwif->drives[0].unmask = 1;
574 hwif->drives[1].unmask = 1;
577 if (hwif->dma_base) {
578 hwif->swdma_mask = d->swdma_mask;
579 hwif->mwdma_mask = d->mwdma_mask;
580 hwif->ultra_mask = d->udma_mask;
583 hwif->drives[0].autotune = 1;
584 hwif->drives[1].autotune = 1;
586 if (d->host_flags & IDE_HFLAG_RQSIZE_256)
590 /* Call chipset-specific routine
591 * for each enabled hwif
599 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
602 * ide_setup_pci_device() looks at the primary/secondary interfaces
603 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
604 * for use with them. This generic code works for most PCI chipsets.
606 * One thing that is not standardized is the location of the
607 * primary/secondary interface "enable/disable" bits. For chipsets that
608 * we "know" about, this information is in the struct ide_port_info;
609 * for all other chipsets, we just assume both interfaces are enabled.
611 static int do_ide_setup_pci_device(struct pci_dev *dev,
612 const struct ide_port_info *d,
615 int tried_config = 0;
618 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
623 * Can we trust the reported IRQ?
627 /* Is it an "IDE storage" device in non-PCI mode? */
628 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
630 printk(KERN_INFO "%s: not 100%% native mode: "
631 "will probe irqs later\n", d->name);
633 * This allows offboard ide-pci cards the enable a BIOS,
634 * verify interrupt settings of split-mirror pci-config
635 * space, place chipset into init-mode, and/or preserve
636 * an interrupt if the card is not native ide support.
638 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
642 } else if (tried_config) {
644 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
646 } else if (!pciirq) {
648 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
652 if (d->init_chipset) {
653 ret = d->init_chipset(dev, d->name);
658 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
662 /* FIXME: silent failure can happen */
664 ide_pci_setup_ports(dev, d, pciirq, idx);
669 int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
671 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
674 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
682 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
684 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
685 const struct ide_port_info *d)
687 struct pci_dev *pdev[] = { dev1, dev2 };
689 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
691 for (i = 0; i < 2; i++) {
692 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i);
694 * FIXME: Mom, mom, they stole me the helper function to undo
695 * do_ide_setup_pci_device() on the first device!
706 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);
708 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
713 static int pre_init = 1; /* Before first ordered IDE scan */
714 static LIST_HEAD(ide_pci_drivers);
717 * __ide_pci_register_driver - attach IDE driver
718 * @driver: pci driver
719 * @module: owner module of the driver
721 * Registers a driver with the IDE layer. The IDE layer arranges that
722 * boot time setup is done in the expected device order and then
723 * hands the controllers off to the core PCI code to do the rest of
726 * Returns are the same as for pci_register_driver
729 int __ide_pci_register_driver(struct pci_driver *driver, struct module *module,
730 const char *mod_name)
733 return __pci_register_driver(driver, module, mod_name);
734 driver->driver.owner = module;
735 list_add_tail(&driver->node, &ide_pci_drivers);
739 EXPORT_SYMBOL_GPL(__ide_pci_register_driver);
742 * ide_scan_pcidev - find an IDE driver for a device
743 * @dev: PCI device to check
745 * Look for an IDE driver to handle the device we are considering.
746 * This is only used during boot up to get the ordering correct. After
747 * boot up the pci layer takes over the job.
750 static int __init ide_scan_pcidev(struct pci_dev *dev)
753 struct pci_driver *d;
755 list_for_each(l, &ide_pci_drivers) {
756 d = list_entry(l, struct pci_driver, node);
758 const struct pci_device_id *id = pci_match_id(d->id_table,
760 if (id != NULL && d->probe(dev, id) >= 0) {
771 * ide_scan_pcibus - perform the initial IDE driver scan
772 * @scan_direction: set for reverse order scanning
774 * Perform the initial bus rather than driver ordered scan of the
775 * PCI drivers. After this all IDE pci handling becomes standard
776 * module ordering not traditionally ordered.
779 void __init ide_scan_pcibus (int scan_direction)
781 struct pci_dev *dev = NULL;
782 struct pci_driver *d;
783 struct list_head *l, *n;
787 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
788 ide_scan_pcidev(dev);
790 while ((dev = pci_get_device_reverse(PCI_ANY_ID, PCI_ANY_ID, dev))
792 ide_scan_pcidev(dev);
795 * Hand the drivers over to the PCI layer now we
799 list_for_each_safe(l, n, &ide_pci_drivers) {
801 d = list_entry(l, struct pci_driver, node);
802 if (__pci_register_driver(d, d->driver.owner, d->driver.mod_name))
803 printk(KERN_ERR "%s: failed to register driver for %s\n",
804 __FUNCTION__, d->driver.mod_name);