Merge branch 'master' into next
[linux-2.6] / drivers / media / dvb / frontends / tda10048.c
1 /*
2     NXP TDA10048HN DVB OFDM demodulator driver
3
4     Copyright (C) 2008 Steven Toth <stoth@linuxtv.org>
5
6     This program is free software; you can redistribute it and/or modify
7     it under the terms of the GNU General Public License as published by
8     the Free Software Foundation; either version 2 of the License, or
9     (at your option) any later version.
10
11     This program is distributed in the hope that it will be useful,
12     but WITHOUT ANY WARRANTY; without even the implied warranty of
13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14     GNU General Public License for more details.
15
16     You should have received a copy of the GNU General Public License
17     along with this program; if not, write to the Free Software
18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/module.h>
25 #include <linux/string.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
28 #include "dvb_frontend.h"
29 #include "dvb_math.h"
30 #include "tda10048.h"
31
32 #define TDA10048_DEFAULT_FIRMWARE "dvb-fe-tda10048-1.0.fw"
33 #define TDA10048_DEFAULT_FIRMWARE_SIZE 24878
34
35 /* Register name definitions */
36 #define TDA10048_IDENTITY          0x00
37 #define TDA10048_VERSION           0x01
38 #define TDA10048_DSP_CODE_CPT      0x0C
39 #define TDA10048_DSP_CODE_IN       0x0E
40 #define TDA10048_IN_CONF1          0x10
41 #define TDA10048_IN_CONF2          0x11
42 #define TDA10048_IN_CONF3          0x12
43 #define TDA10048_OUT_CONF1         0x14
44 #define TDA10048_OUT_CONF2         0x15
45 #define TDA10048_OUT_CONF3         0x16
46 #define TDA10048_AUTO              0x18
47 #define TDA10048_SYNC_STATUS       0x1A
48 #define TDA10048_CONF_C4_1         0x1E
49 #define TDA10048_CONF_C4_2         0x1F
50 #define TDA10048_CODE_IN_RAM       0x20
51 #define TDA10048_CHANNEL_INFO_1_R  0x22
52 #define TDA10048_CHANNEL_INFO_2_R  0x23
53 #define TDA10048_CHANNEL_INFO1     0x24
54 #define TDA10048_CHANNEL_INFO2     0x25
55 #define TDA10048_TIME_ERROR_R      0x26
56 #define TDA10048_TIME_ERROR        0x27
57 #define TDA10048_FREQ_ERROR_LSB_R  0x28
58 #define TDA10048_FREQ_ERROR_MSB_R  0x29
59 #define TDA10048_FREQ_ERROR_LSB    0x2A
60 #define TDA10048_FREQ_ERROR_MSB    0x2B
61 #define TDA10048_IT_SEL            0x30
62 #define TDA10048_IT_STAT           0x32
63 #define TDA10048_DSP_AD_LSB        0x3C
64 #define TDA10048_DSP_AD_MSB        0x3D
65 #define TDA10048_DSP_REF_LSB       0x3E
66 #define TDA10048_DSP_REF_MSB       0x3F
67 #define TDA10048_CONF_TRISTATE1    0x44
68 #define TDA10048_CONF_TRISTATE2    0x45
69 #define TDA10048_CONF_POLARITY     0x46
70 #define TDA10048_GPIO_SP_DS0       0x48
71 #define TDA10048_GPIO_SP_DS1       0x49
72 #define TDA10048_GPIO_SP_DS2       0x4A
73 #define TDA10048_GPIO_SP_DS3       0x4B
74 #define TDA10048_GPIO_OUT_SEL      0x4C
75 #define TDA10048_GPIO_SELECT       0x4D
76 #define TDA10048_IC_MODE           0x4E
77 #define TDA10048_CONF_XO           0x50
78 #define TDA10048_CONF_PLL1         0x51
79 #define TDA10048_CONF_PLL2         0x52
80 #define TDA10048_CONF_PLL3         0x53
81 #define TDA10048_CONF_ADC          0x54
82 #define TDA10048_CONF_ADC_2        0x55
83 #define TDA10048_CONF_C1_1         0x60
84 #define TDA10048_CONF_C1_3         0x62
85 #define TDA10048_AGC_CONF          0x70
86 #define TDA10048_AGC_THRESHOLD_LSB 0x72
87 #define TDA10048_AGC_THRESHOLD_MSB 0x73
88 #define TDA10048_AGC_RENORM        0x74
89 #define TDA10048_AGC_GAINS         0x76
90 #define TDA10048_AGC_TUN_MIN       0x78
91 #define TDA10048_AGC_TUN_MAX       0x79
92 #define TDA10048_AGC_IF_MIN        0x7A
93 #define TDA10048_AGC_IF_MAX        0x7B
94 #define TDA10048_AGC_TUN_LEVEL     0x7E
95 #define TDA10048_AGC_IF_LEVEL      0x7F
96 #define TDA10048_DIG_AGC_LEVEL     0x81
97 #define TDA10048_FREQ_PHY2_LSB     0x86
98 #define TDA10048_FREQ_PHY2_MSB     0x87
99 #define TDA10048_TIME_INVWREF_LSB  0x88
100 #define TDA10048_TIME_INVWREF_MSB  0x89
101 #define TDA10048_TIME_WREF_LSB     0x8A
102 #define TDA10048_TIME_WREF_MID1    0x8B
103 #define TDA10048_TIME_WREF_MID2    0x8C
104 #define TDA10048_TIME_WREF_MSB     0x8D
105 #define TDA10048_NP_OUT            0xA2
106 #define TDA10048_CELL_ID_LSB       0xA4
107 #define TDA10048_CELL_ID_MSB       0xA5
108 #define TDA10048_EXTTPS_ODD        0xAA
109 #define TDA10048_EXTTPS_EVEN       0xAB
110 #define TDA10048_TPS_LENGTH        0xAC
111 #define TDA10048_FREE_REG_1        0xB2
112 #define TDA10048_FREE_REG_2        0xB3
113 #define TDA10048_CONF_C3_1         0xC0
114 #define TDA10048_CYBER_CTRL        0xC2
115 #define TDA10048_CBER_NMAX_LSB     0xC4
116 #define TDA10048_CBER_NMAX_MSB     0xC5
117 #define TDA10048_CBER_LSB          0xC6
118 #define TDA10048_CBER_MSB          0xC7
119 #define TDA10048_VBER_LSB          0xC8
120 #define TDA10048_VBER_MID          0xC9
121 #define TDA10048_VBER_MSB          0xCA
122 #define TDA10048_CYBER_LUT         0xCC
123 #define TDA10048_UNCOR_CTRL        0xCD
124 #define TDA10048_UNCOR_CPT_LSB     0xCE
125 #define TDA10048_UNCOR_CPT_MSB     0xCF
126 #define TDA10048_SOFT_IT_C3        0xD6
127 #define TDA10048_CONF_TS2          0xE0
128 #define TDA10048_CONF_TS1          0xE1
129
130 static unsigned int debug;
131
132 #define dprintk(level, fmt, arg...)\
133         do { if (debug >= level)\
134                 printk(KERN_DEBUG "tda10048: " fmt, ## arg);\
135         } while (0)
136
137 struct tda10048_state {
138
139         struct i2c_adapter *i2c;
140
141         /* configuration settings */
142         const struct tda10048_config *config;
143         struct dvb_frontend frontend;
144
145         int fwloaded;
146 };
147
148 static struct init_tab {
149         u8      reg;
150         u16     data;
151 } init_tab[] = {
152         { TDA10048_CONF_PLL1, 0x08 },
153         { TDA10048_CONF_ADC_2, 0x00 },
154         { TDA10048_CONF_C4_1, 0x00 },
155         { TDA10048_CONF_PLL1, 0x0f },
156         { TDA10048_CONF_PLL2, 0x0a },
157         { TDA10048_CONF_PLL3, 0x43 },
158         { TDA10048_FREQ_PHY2_LSB, 0x02 },
159         { TDA10048_FREQ_PHY2_MSB, 0x0a },
160         { TDA10048_TIME_WREF_LSB, 0xbd },
161         { TDA10048_TIME_WREF_MID1, 0xe4 },
162         { TDA10048_TIME_WREF_MID2, 0xa8 },
163         { TDA10048_TIME_WREF_MSB, 0x02 },
164         { TDA10048_TIME_INVWREF_LSB, 0x04 },
165         { TDA10048_TIME_INVWREF_MSB, 0x06 },
166         { TDA10048_CONF_C4_1, 0x00 },
167         { TDA10048_CONF_C1_1, 0xa8 },
168         { TDA10048_AGC_CONF, 0x16 },
169         { TDA10048_CONF_C1_3, 0x0b },
170         { TDA10048_AGC_TUN_MIN, 0x00 },
171         { TDA10048_AGC_TUN_MAX, 0xff },
172         { TDA10048_AGC_IF_MIN, 0x00 },
173         { TDA10048_AGC_IF_MAX, 0xff },
174         { TDA10048_AGC_THRESHOLD_MSB, 0x00 },
175         { TDA10048_AGC_THRESHOLD_LSB, 0x70 },
176         { TDA10048_CYBER_CTRL, 0x38 },
177         { TDA10048_AGC_GAINS, 0x12 },
178         { TDA10048_CONF_XO, 0x00 },
179         { TDA10048_CONF_TS1, 0x07 },
180         { TDA10048_IC_MODE, 0x00 },
181         { TDA10048_CONF_TS2, 0xc0 },
182         { TDA10048_CONF_TRISTATE1, 0x21 },
183         { TDA10048_CONF_TRISTATE2, 0x00 },
184         { TDA10048_CONF_POLARITY, 0x00 },
185         { TDA10048_CONF_C4_2, 0x04 },
186         { TDA10048_CONF_ADC, 0x60 },
187         { TDA10048_CONF_ADC_2, 0x10 },
188         { TDA10048_CONF_ADC, 0x60 },
189         { TDA10048_CONF_ADC_2, 0x00 },
190         { TDA10048_CONF_C1_1, 0xa8 },
191         { TDA10048_UNCOR_CTRL, 0x00 },
192         { TDA10048_CONF_C4_2, 0x04 },
193 };
194
195 static int tda10048_writereg(struct tda10048_state *state, u8 reg, u8 data)
196 {
197         int ret;
198         u8 buf [] = { reg, data };
199         struct i2c_msg msg = {
200                 .addr = state->config->demod_address,
201                 .flags = 0, .buf = buf, .len = 2 };
202
203         dprintk(2, "%s(reg = 0x%02x, data = 0x%02x)\n", __func__, reg, data);
204
205         ret = i2c_transfer(state->i2c, &msg, 1);
206
207         if (ret != 1)
208                 printk("%s: writereg error (ret == %i)\n", __func__, ret);
209
210         return (ret != 1) ? -1 : 0;
211 }
212
213 static u8 tda10048_readreg(struct tda10048_state *state, u8 reg)
214 {
215         int ret;
216         u8 b0 [] = { reg };
217         u8 b1 [] = { 0 };
218         struct i2c_msg msg [] = {
219                 { .addr = state->config->demod_address,
220                         .flags = 0, .buf = b0, .len = 1 },
221                 { .addr = state->config->demod_address,
222                         .flags = I2C_M_RD, .buf = b1, .len = 1 } };
223
224         dprintk(2, "%s(reg = 0x%02x)\n", __func__, reg);
225
226         ret = i2c_transfer(state->i2c, msg, 2);
227
228         if (ret != 2)
229                 printk(KERN_ERR "%s: readreg error (ret == %i)\n",
230                         __func__, ret);
231
232         return b1[0];
233 }
234
235 static int tda10048_writeregbulk(struct tda10048_state *state, u8 reg,
236                                  const u8 *data, u16 len)
237 {
238         int ret = -EREMOTEIO;
239         struct i2c_msg msg;
240         u8 *buf;
241
242         dprintk(2, "%s(%d, ?, len = %d)\n", __func__, reg, len);
243
244         buf = kmalloc(len + 1, GFP_KERNEL);
245         if (buf == NULL) {
246                 ret = -ENOMEM;
247                 goto error;
248         }
249
250         *buf = reg;
251         memcpy(buf + 1, data, len);
252
253         msg.addr = state->config->demod_address;
254         msg.flags = 0;
255         msg.buf = buf;
256         msg.len = len + 1;
257
258         dprintk(2, "%s():  write len = %d\n",
259                 __func__, msg.len);
260
261         ret = i2c_transfer(state->i2c, &msg, 1);
262         if (ret != 1) {
263                 printk(KERN_ERR "%s(): writereg error err %i\n",
264                          __func__, ret);
265                 ret = -EREMOTEIO;
266         }
267
268 error:
269         kfree(buf);
270
271         return ret;
272 }
273
274 static int tda10048_firmware_upload(struct dvb_frontend *fe)
275 {
276         struct tda10048_state *state = fe->demodulator_priv;
277         const struct firmware *fw;
278         int ret;
279         int pos = 0;
280         int cnt;
281         u8 wlen = state->config->fwbulkwritelen;
282
283         if ((wlen != TDA10048_BULKWRITE_200) && (wlen != TDA10048_BULKWRITE_50))
284                 wlen = TDA10048_BULKWRITE_200;
285
286         /* request the firmware, this will block and timeout */
287         printk(KERN_INFO "%s: waiting for firmware upload (%s)...\n",
288                 __func__,
289                 TDA10048_DEFAULT_FIRMWARE);
290
291         ret = request_firmware(&fw, TDA10048_DEFAULT_FIRMWARE,
292                 &state->i2c->dev);
293         if (ret) {
294                 printk(KERN_ERR "%s: Upload failed. (file not found?)\n",
295                         __func__);
296                 return -EIO;
297         } else {
298                 printk(KERN_INFO "%s: firmware read %Zu bytes.\n",
299                         __func__,
300                         fw->size);
301                 ret = 0;
302         }
303
304         if (fw->size != TDA10048_DEFAULT_FIRMWARE_SIZE) {
305                 printk(KERN_ERR "%s: firmware incorrect size\n", __func__);
306                 ret = -EIO;
307         } else {
308                 printk(KERN_INFO "%s: firmware uploading\n", __func__);
309
310                 /* Soft reset */
311                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
312                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
313                                 & 0xfe);
314                 tda10048_writereg(state, TDA10048_CONF_TRISTATE1,
315                         tda10048_readreg(state, TDA10048_CONF_TRISTATE1)
316                                 | 0x01);
317
318                 /* Put the demod into host download mode */
319                 tda10048_writereg(state, TDA10048_CONF_C4_1,
320                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xf9);
321
322                 /* Boot the DSP */
323                 tda10048_writereg(state, TDA10048_CONF_C4_1,
324                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x08);
325
326                 /* Prepare for download */
327                 tda10048_writereg(state, TDA10048_DSP_CODE_CPT, 0);
328
329                 /* Download the firmware payload */
330                 while (pos < fw->size) {
331
332                         if ((fw->size - pos) > wlen)
333                                 cnt = wlen;
334                         else
335                                 cnt = fw->size - pos;
336
337                         tda10048_writeregbulk(state, TDA10048_DSP_CODE_IN,
338                                 &fw->data[pos], cnt);
339
340                         pos += cnt;
341                 }
342
343                 ret = -EIO;
344                 /* Wait up to 250ms for the DSP to boot */
345                 for (cnt = 0; cnt < 250 ; cnt += 10) {
346
347                         msleep(10);
348
349                         if (tda10048_readreg(state, TDA10048_SYNC_STATUS)
350                                 & 0x40) {
351                                 ret = 0;
352                                 break;
353                         }
354                 }
355         }
356
357         release_firmware(fw);
358
359         if (ret == 0) {
360                 printk(KERN_INFO "%s: firmware uploaded\n", __func__);
361                 state->fwloaded = 1;
362         } else
363                 printk(KERN_ERR "%s: firmware upload failed\n", __func__);
364
365         return ret;
366 }
367
368 static int tda10048_set_inversion(struct dvb_frontend *fe, int inversion)
369 {
370         struct tda10048_state *state = fe->demodulator_priv;
371
372         dprintk(1, "%s(%d)\n", __func__, inversion);
373
374         if (inversion == TDA10048_INVERSION_ON)
375                 tda10048_writereg(state, TDA10048_CONF_C1_1,
376                         tda10048_readreg(state, TDA10048_CONF_C1_1) | 0x20);
377         else
378                 tda10048_writereg(state, TDA10048_CONF_C1_1,
379                         tda10048_readreg(state, TDA10048_CONF_C1_1) & 0xdf);
380
381         return 0;
382 }
383
384 /* Retrieve the demod settings */
385 static int tda10048_get_tps(struct tda10048_state *state,
386         struct dvb_ofdm_parameters *p)
387 {
388         u8 val;
389
390         /* Make sure the TPS regs are valid */
391         if (!(tda10048_readreg(state, TDA10048_AUTO) & 0x01))
392                 return -EAGAIN;
393
394         val = tda10048_readreg(state, TDA10048_OUT_CONF2);
395         switch ((val & 0x60) >> 5) {
396         case 0: p->constellation =   QPSK; break;
397         case 1: p->constellation = QAM_16; break;
398         case 2: p->constellation = QAM_64; break;
399         }
400         switch ((val & 0x18) >> 3) {
401         case 0: p->hierarchy_information = HIERARCHY_NONE; break;
402         case 1: p->hierarchy_information =    HIERARCHY_1; break;
403         case 2: p->hierarchy_information =    HIERARCHY_2; break;
404         case 3: p->hierarchy_information =    HIERARCHY_4; break;
405         }
406         switch (val & 0x07) {
407         case 0: p->code_rate_HP = FEC_1_2; break;
408         case 1: p->code_rate_HP = FEC_2_3; break;
409         case 2: p->code_rate_HP = FEC_3_4; break;
410         case 3: p->code_rate_HP = FEC_5_6; break;
411         case 4: p->code_rate_HP = FEC_7_8; break;
412         }
413
414         val = tda10048_readreg(state, TDA10048_OUT_CONF3);
415         switch (val & 0x07) {
416         case 0: p->code_rate_LP = FEC_1_2; break;
417         case 1: p->code_rate_LP = FEC_2_3; break;
418         case 2: p->code_rate_LP = FEC_3_4; break;
419         case 3: p->code_rate_LP = FEC_5_6; break;
420         case 4: p->code_rate_LP = FEC_7_8; break;
421         }
422
423         val = tda10048_readreg(state, TDA10048_OUT_CONF1);
424         switch ((val & 0x0c) >> 2) {
425         case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
426         case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
427         case 2: p->guard_interval =  GUARD_INTERVAL_1_8; break;
428         case 3: p->guard_interval =  GUARD_INTERVAL_1_4; break;
429         }
430         switch (val & 0x02) {
431         case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
432         case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
433         }
434
435         return 0;
436 }
437
438 static int tda10048_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
439 {
440         struct tda10048_state *state = fe->demodulator_priv;
441         dprintk(1, "%s(%d)\n", __func__, enable);
442
443         if (enable)
444                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
445                         tda10048_readreg(state, TDA10048_CONF_C4_1) | 0x02);
446         else
447                 return tda10048_writereg(state, TDA10048_CONF_C4_1,
448                         tda10048_readreg(state, TDA10048_CONF_C4_1) & 0xfd);
449 }
450
451 static int tda10048_output_mode(struct dvb_frontend *fe, int serial)
452 {
453         struct tda10048_state *state = fe->demodulator_priv;
454         dprintk(1, "%s(%d)\n", __func__, serial);
455
456         /* Ensure pins are out of tri-state */
457         tda10048_writereg(state, TDA10048_CONF_TRISTATE1, 0x21);
458         tda10048_writereg(state, TDA10048_CONF_TRISTATE2, 0x00);
459
460         if (serial) {
461                 tda10048_writereg(state, TDA10048_IC_MODE, 0x80 | 0x20);
462                 tda10048_writereg(state, TDA10048_CONF_TS2, 0xc0);
463         } else {
464                 tda10048_writereg(state, TDA10048_IC_MODE, 0x00);
465                 tda10048_writereg(state, TDA10048_CONF_TS2, 0x01);
466         }
467
468         return 0;
469 }
470
471 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
472 /* TODO: Support manual tuning with specific params */
473 static int tda10048_set_frontend(struct dvb_frontend *fe,
474         struct dvb_frontend_parameters *p)
475 {
476         struct tda10048_state *state = fe->demodulator_priv;
477
478         dprintk(1, "%s(frequency=%d)\n", __func__, p->frequency);
479
480         if (fe->ops.tuner_ops.set_params) {
481
482                 if (fe->ops.i2c_gate_ctrl)
483                         fe->ops.i2c_gate_ctrl(fe, 1);
484
485                 fe->ops.tuner_ops.set_params(fe, p);
486
487                 if (fe->ops.i2c_gate_ctrl)
488                         fe->ops.i2c_gate_ctrl(fe, 0);
489         }
490
491         /* Enable demod TPS auto detection and begin acquisition */
492         tda10048_writereg(state, TDA10048_AUTO, 0x57);
493
494         return 0;
495 }
496
497 /* Establish sane defaults and load firmware. */
498 static int tda10048_init(struct dvb_frontend *fe)
499 {
500         struct tda10048_state *state = fe->demodulator_priv;
501         int ret = 0, i;
502
503         dprintk(1, "%s()\n", __func__);
504
505         /* Apply register defaults */
506         for (i = 0; i < ARRAY_SIZE(init_tab); i++)
507                 tda10048_writereg(state, init_tab[i].reg, init_tab[i].data);
508
509         if (state->fwloaded == 0)
510                 ret = tda10048_firmware_upload(fe);
511
512         /* Set either serial or parallel */
513         tda10048_output_mode(fe, state->config->output_mode);
514
515         /* set inversion */
516         tda10048_set_inversion(fe, state->config->inversion);
517
518         /* Ensure we leave the gate closed */
519         tda10048_i2c_gate_ctrl(fe, 0);
520
521         return ret;
522 }
523
524 static int tda10048_read_status(struct dvb_frontend *fe, fe_status_t *status)
525 {
526         struct tda10048_state *state = fe->demodulator_priv;
527         u8 reg;
528
529         *status = 0;
530
531         reg = tda10048_readreg(state, TDA10048_SYNC_STATUS);
532
533         dprintk(1, "%s() status =0x%02x\n", __func__, reg);
534
535         if (reg & 0x02)
536                 *status |= FE_HAS_CARRIER;
537
538         if (reg & 0x04)
539                 *status |= FE_HAS_SIGNAL;
540
541         if (reg & 0x08) {
542                 *status |= FE_HAS_LOCK;
543                 *status |= FE_HAS_VITERBI;
544                 *status |= FE_HAS_SYNC;
545         }
546
547         return 0;
548 }
549
550 static int tda10048_read_ber(struct dvb_frontend *fe, u32 *ber)
551 {
552         struct tda10048_state *state = fe->demodulator_priv;
553
554         dprintk(1, "%s()\n", __func__);
555
556         /* TODO: A reset may be required here */
557         *ber = tda10048_readreg(state, TDA10048_CBER_MSB) << 8 |
558                 tda10048_readreg(state, TDA10048_CBER_LSB);
559
560         return 0;
561 }
562
563 static int tda10048_read_signal_strength(struct dvb_frontend *fe,
564         u16 *signal_strength)
565 {
566         struct tda10048_state *state = fe->demodulator_priv;
567         u8 v;
568
569         dprintk(1, "%s()\n", __func__);
570
571         *signal_strength = 65535;
572
573         v = tda10048_readreg(state, TDA10048_NP_OUT);
574         if (v > 0)
575                 *signal_strength -= (v << 8) | v;
576
577         return 0;
578 }
579
580 /* SNR lookup table */
581 static struct snr_tab {
582         u8 val;
583         u8 data;
584 } snr_tab[] = {
585         {   0,   0 },
586         {   1, 246 },
587         {   2, 215 },
588         {   3, 198 },
589         {   4, 185 },
590         {   5, 176 },
591         {   6, 168 },
592         {   7, 161 },
593         {   8, 155 },
594         {   9, 150 },
595         {  10, 146 },
596         {  11, 141 },
597         {  12, 138 },
598         {  13, 134 },
599         {  14, 131 },
600         {  15, 128 },
601         {  16, 125 },
602         {  17, 122 },
603         {  18, 120 },
604         {  19, 118 },
605         {  20, 115 },
606         {  21, 113 },
607         {  22, 111 },
608         {  23, 109 },
609         {  24, 107 },
610         {  25, 106 },
611         {  26, 104 },
612         {  27, 102 },
613         {  28, 101 },
614         {  29,  99 },
615         {  30,  98 },
616         {  31,  96 },
617         {  32,  95 },
618         {  33,  94 },
619         {  34,  92 },
620         {  35,  91 },
621         {  36,  90 },
622         {  37,  89 },
623         {  38,  88 },
624         {  39,  86 },
625         {  40,  85 },
626         {  41,  84 },
627         {  42,  83 },
628         {  43,  82 },
629         {  44,  81 },
630         {  45,  80 },
631         {  46,  79 },
632         {  47,  78 },
633         {  48,  77 },
634         {  49,  76 },
635         {  50,  76 },
636         {  51,  75 },
637         {  52,  74 },
638         {  53,  73 },
639         {  54,  72 },
640         {  56,  71 },
641         {  57,  70 },
642         {  58,  69 },
643         {  60,  68 },
644         {  61,  67 },
645         {  63,  66 },
646         {  64,  65 },
647         {  66,  64 },
648         {  67,  63 },
649         {  68,  62 },
650         {  69,  62 },
651         {  70,  61 },
652         {  72,  60 },
653         {  74,  59 },
654         {  75,  58 },
655         {  77,  57 },
656         {  79,  56 },
657         {  81,  55 },
658         {  83,  54 },
659         {  85,  53 },
660         {  87,  52 },
661         {  89,  51 },
662         {  91,  50 },
663         {  93,  49 },
664         {  95,  48 },
665         {  97,  47 },
666         { 100,  46 },
667         { 102,  45 },
668         { 104,  44 },
669         { 107,  43 },
670         { 109,  42 },
671         { 112,  41 },
672         { 114,  40 },
673         { 117,  39 },
674         { 120,  38 },
675         { 123,  37 },
676         { 125,  36 },
677         { 128,  35 },
678         { 131,  34 },
679         { 134,  33 },
680         { 138,  32 },
681         { 141,  31 },
682         { 144,  30 },
683         { 147,  29 },
684         { 151,  28 },
685         { 154,  27 },
686         { 158,  26 },
687         { 162,  25 },
688         { 165,  24 },
689         { 169,  23 },
690         { 173,  22 },
691         { 177,  21 },
692         { 181,  20 },
693         { 186,  19 },
694         { 190,  18 },
695         { 194,  17 },
696         { 199,  16 },
697         { 204,  15 },
698         { 208,  14 },
699         { 213,  13 },
700         { 218,  12 },
701         { 223,  11 },
702         { 229,  10 },
703         { 234,   9 },
704         { 239,   8 },
705         { 245,   7 },
706         { 251,   6 },
707         { 255,   5 },
708 };
709
710 static int tda10048_read_snr(struct dvb_frontend *fe, u16 *snr)
711 {
712         struct tda10048_state *state = fe->demodulator_priv;
713         u8 v;
714         int i, ret = -EINVAL;
715
716         dprintk(1, "%s()\n", __func__);
717
718         v = tda10048_readreg(state, TDA10048_NP_OUT);
719         for (i = 0; i < ARRAY_SIZE(snr_tab); i++) {
720                 if (v <= snr_tab[i].val) {
721                         *snr = snr_tab[i].data;
722                         ret = 0;
723                         break;
724                 }
725         }
726
727         return ret;
728 }
729
730 static int tda10048_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
731 {
732         struct tda10048_state *state = fe->demodulator_priv;
733
734         dprintk(1, "%s()\n", __func__);
735
736         *ucblocks = tda10048_readreg(state, TDA10048_UNCOR_CPT_MSB) << 8 |
737                 tda10048_readreg(state, TDA10048_UNCOR_CPT_LSB);
738
739         return 0;
740 }
741
742 static int tda10048_get_frontend(struct dvb_frontend *fe,
743         struct dvb_frontend_parameters *p)
744 {
745         struct tda10048_state *state = fe->demodulator_priv;
746
747         dprintk(1, "%s()\n", __func__);
748
749         p->inversion = tda10048_readreg(state, TDA10048_CONF_C1_1)
750                 & 0x20 ? INVERSION_ON : INVERSION_OFF;
751
752         return tda10048_get_tps(state, &p->u.ofdm);
753 }
754
755 static int tda10048_get_tune_settings(struct dvb_frontend *fe,
756         struct dvb_frontend_tune_settings *tune)
757 {
758         tune->min_delay_ms = 1000;
759         return 0;
760 }
761
762 static void tda10048_release(struct dvb_frontend *fe)
763 {
764         struct tda10048_state *state = fe->demodulator_priv;
765         dprintk(1, "%s()\n", __func__);
766         kfree(state);
767 }
768
769 static struct dvb_frontend_ops tda10048_ops;
770
771 struct dvb_frontend *tda10048_attach(const struct tda10048_config *config,
772         struct i2c_adapter *i2c)
773 {
774         struct tda10048_state *state = NULL;
775
776         dprintk(1, "%s()\n", __func__);
777
778         /* allocate memory for the internal state */
779         state = kmalloc(sizeof(struct tda10048_state), GFP_KERNEL);
780         if (state == NULL)
781                 goto error;
782
783         /* setup the state */
784         state->config = config;
785         state->i2c = i2c;
786         state->fwloaded = 0;
787
788         /* check if the demod is present */
789         if (tda10048_readreg(state, TDA10048_IDENTITY) != 0x048)
790                 goto error;
791
792         /* create dvb_frontend */
793         memcpy(&state->frontend.ops, &tda10048_ops,
794                 sizeof(struct dvb_frontend_ops));
795         state->frontend.demodulator_priv = state;
796
797         /* Leave the gate closed */
798         tda10048_i2c_gate_ctrl(&state->frontend, 0);
799
800         return &state->frontend;
801
802 error:
803         kfree(state);
804         return NULL;
805 }
806 EXPORT_SYMBOL(tda10048_attach);
807
808 static struct dvb_frontend_ops tda10048_ops = {
809
810         .info = {
811                 .name                   = "NXP TDA10048HN DVB-T",
812                 .type                   = FE_OFDM,
813                 .frequency_min          = 177000000,
814                 .frequency_max          = 858000000,
815                 .frequency_stepsize     = 166666,
816                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
817                 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
818                 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
819                 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
820                 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
821         },
822
823         .release = tda10048_release,
824         .init = tda10048_init,
825         .i2c_gate_ctrl = tda10048_i2c_gate_ctrl,
826         .set_frontend = tda10048_set_frontend,
827         .get_frontend = tda10048_get_frontend,
828         .get_tune_settings = tda10048_get_tune_settings,
829         .read_status = tda10048_read_status,
830         .read_ber = tda10048_read_ber,
831         .read_signal_strength = tda10048_read_signal_strength,
832         .read_snr = tda10048_read_snr,
833         .read_ucblocks = tda10048_read_ucblocks,
834 };
835
836 module_param(debug, int, 0644);
837 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
838
839 MODULE_DESCRIPTION("NXP TDA10048HN DVB-T Demodulator driver");
840 MODULE_AUTHOR("Steven Toth");
841 MODULE_LICENSE("GPL");