git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/boot/dts/mpc8272ads.dts

   1 /*
   2  * MPC8272 ADS Device Tree Source
   3  *
   4  * Copyright 2005 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 / {
  13         model = "MPC8272ADS";
  14         compatible = "MPC8260ADS";
  15         #address-cells = <1>;
  16         #size-cells = <1>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 PowerPC,8272@0 {
  23                         device_type = "cpu";
  24                         reg = <0>;
  25                         d-cache-line-size = <20>;       // 32 bytes
  26                         i-cache-line-size = <20>;       // 32 bytes
  27                         d-cache-size = <4000>;          // L1, 16K
  28                         i-cache-size = <4000>;          // L1, 16K
  29                         timebase-frequency = <0>;
  30                         bus-frequency = <0>;
  31                         clock-frequency = <0>;
  32                 };
  33         };
  34
  35         pci_pic: interrupt-controller@f8200000 {
  36                 #address-cells = <0>;
  37                 #interrupt-cells = <2>;
  38                 interrupt-controller;
  39                 reg = <f8200000 f8200004>;
  40                 device_type = "pci-pic";
  41         };
  42
  43         memory {
  44                 device_type = "memory";
  45                 reg = <00000000 4000000 f4500000 00000020>;
  46         };
  47
  48         chosen {
  49                 name = "chosen";
  50                 linux,platform = <0>;
  51                 interrupt-controller = <&Cpm_pic>;
  52         };
  53
  54         soc8272@f0000000 {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 device_type = "soc";
  58                 ranges = <00000000 f0000000 00053000>;
  59                 reg = <f0000000 10000>;
  60
  61                 mdio@0 {
  62                         device_type = "mdio";
  63                         compatible = "fs_enet";
  64                         reg = <0 0>;
  65                         #address-cells = <1>;
  66                         #size-cells = <0>;
  67
  68                         phy0:ethernet-phy@0 {
  69                                 interrupt-parent = <&Cpm_pic>;
  70                                 interrupts = <17 4>;
  71                                 reg = <0>;
  72                                 bitbang = [ 12 12 13 02 02 01 ];
  73                                 device_type = "ethernet-phy";
  74                         };
  75
  76                         phy1:ethernet-phy@1 {
  77                                 interrupt-parent = <&Cpm_pic>;
  78                                 interrupts = <17 4>;
  79                                 bitbang = [ 12 12 13 02 02 01 ];
  80                                 reg = <3>;
  81                                 device_type = "ethernet-phy";
  82                         };
  83                 };
  84
  85                 ethernet@24000 {
  86                         #address-cells = <1>;
  87                         #size-cells = <0>;
  88                         device_type = "network";
  89                         device-id = <1>;
  90                         compatible = "fs_enet";
  91                         model = "FCC";
  92                         reg = <11300 20 8400 100 11380 30>;
  93                         mac-address = [ 00 11 2F 99 43 54 ];
  94                         interrupts = <20 2>;
  95                         interrupt-parent = <&Cpm_pic>;
  96                         phy-handle = <&Phy0>;
  97                         rx-clock = <13>;
  98                         tx-clock = <12>;
  99                 };
 100
 101                 ethernet@25000 {
 102                         device_type = "network";
 103                         device-id = <2>;
 104                         compatible = "fs_enet";
 105                         model = "FCC";
 106                         reg = <11320 20 8500 100 113b0 30>;
 107                         mac-address = [ 00 11 2F 99 44 54 ];
 108                         interrupts = <21 2>;
 109                         interrupt-parent = <&Cpm_pic>;
 110                         phy-handle = <&Phy1>;
 111                         rx-clock = <17>;
 112                         tx-clock = <18>;
 113                 };
 114
 115                 cpm@f0000000 {
 116                         #address-cells = <1>;
 117                         #size-cells = <1>;
 118                         device_type = "cpm";
 119                         model = "CPM2";
 120                         ranges = <00000000 00000000 20000>;
 121                         reg = <0 20000>;
 122                         command-proc = <119c0>;
 123                         brg-frequency = <17D7840>;
 124                         cpm_clk = <BEBC200>;
 125
 126                         scc@11a00 {
 127                                 device_type = "serial";
 128                                 compatible = "cpm_uart";
 129                                 model = "SCC";
 130                                 device-id = <1>;
 131                                 reg = <11a00 20 8000 100>;
 132                                 current-speed = <1c200>;
 133                                 interrupts = <28 2>;
 134                                 interrupt-parent = <&Cpm_pic>;
 135                                 clock-setup = <0 00ffffff>;
 136                                 rx-clock = <1>;
 137                                 tx-clock = <1>;
 138                         };
 139
 140                         scc@11a60 {
 141                                 device_type = "serial";
 142                                 compatible = "cpm_uart";
 143                                 model = "SCC";
 144                                 device-id = <4>;
 145                                 reg = <11a60 20 8300 100>;
 146                                 current-speed = <1c200>;
 147                                 interrupts = <2b 2>;
 148                                 interrupt-parent = <&Cpm_pic>;
 149                                 clock-setup = <1b ffffff00>;
 150                                 rx-clock = <4>;
 151                                 tx-clock = <4>;
 152                         };
 153                 };
 154
 155                 cpm_pic:interrupt-controller@10c00 {
 156                         #address-cells = <0>;
 157                         #interrupt-cells = <2>;
 158                         interrupt-controller;
 159                         reg = <10c00 80>;
 160                         device_type = "cpm-pic";
 161                         compatible = "CPM2";
 162                 };
 163
 164                 pci@0500 {
 165                         #interrupt-cells = <1>;
 166                         #size-cells = <2>;
 167                         #address-cells = <3>;
 168                         compatible = "8272";
 169                         device_type = "pci";
 170                         reg = <10430 4dc>;
 171                         clock-frequency = <3f940aa>;
 172                         interrupt-map-mask = <f800 0 0 7>;
 173                         interrupt-map = <
 174                                         /* IDSEL 0x16 */
 175                                          b000 0 0 1 f8200000 40 8
 176                                          b000 0 0 2 f8200000 41 8
 177                                          b000 0 0 3 f8200000 42 8
 178                                          b000 0 0 4 f8200000 43 8
 179
 180                                         /* IDSEL 0x17 */
 181                                          b800 0 0 1 f8200000 43 8
 182                                          b800 0 0 2 f8200000 40 8
 183                                          b800 0 0 3 f8200000 41 8
 184                                          b800 0 0 4 f8200000 42 8
 185
 186                                         /* IDSEL 0x18 */
 187                                          c000 0 0 1 f8200000 42 8
 188                                          c000 0 0 2 f8200000 43 8
 189                                          c000 0 0 3 f8200000 40 8
 190                                          c000 0 0 4 f8200000 41 8>;
 191                         interrupt-parent = <&Cpm_pic>;
 192                         interrupts = <14 8>;
 193                         bus-range = <0 0>;
 194                         ranges = <02000000 0 80000000 80000000 0 40000000
 195                                   01000000 0 00000000 f6000000 0 02000000>;
 196                 };
 197
 198 /* May need to remove if on a part without crypto engine */
 199                 crypto@30000 {
 200                         device_type = "crypto";
 201                         model = "SEC2";
 202                         compatible = "talitos";
 203                         reg = <30000 10000>;
 204                         interrupts = <b 2>;
 205                         interrupt-parent = <&Cpm_pic>;
 206                         num-channels = <4>;
 207                         channel-fifo-len = <18>;
 208                         exec-units-mask = <0000007e>;
 209 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
 210                         descriptor-types-mask = <01010ebf>;
 211                 };
 212         };
 213 };