2 * Support for NXT2002 and NXT2004 - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray (kirk.lapray@gmail.com)
5 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
6 * and nxt2004 by Jean-Francois Thibert (jeanfrancois@sagetv.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 * NOTES ABOUT THIS DRIVER
27 * This Linux driver supports:
28 * B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
29 * AverTVHD MCE A180 (NXT2004)
30 * ATI HDTV Wonder (NXT2004)
32 * This driver needs external firmware. Please use the command
33 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
34 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
35 * download/extract the appropriate firmware, and then copy it to
36 * /usr/lib/hotplug/firmware/ or /lib/firmware/
37 * (depending on configuration of firmware hotplug).
39 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
40 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
41 #define CRC_CCIT_MASK 0x1021
43 #include <linux/kernel.h>
44 #include <linux/init.h>
45 #include <linux/module.h>
46 #include <linux/moduleparam.h>
48 #include "dvb_frontend.h"
52 struct nxt200x_state {
54 struct i2c_adapter* i2c;
55 struct dvb_frontend_ops ops;
56 const struct nxt200x_config* config;
57 struct dvb_frontend frontend;
59 /* demodulator private data */
60 nxt_chip_type demod_chip;
65 #define dprintk(args...) \
67 if (debug) printk(KERN_DEBUG "nxt200x: " args); \
70 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
73 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
75 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
76 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
77 __FUNCTION__, addr, err);
83 static u8 i2c_readbytes (struct nxt200x_state* state, u8 addr, u8* buf, u8 len)
86 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
88 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
89 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
90 __FUNCTION__, addr, err);
96 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg, u8 *buf, u8 len)
100 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
103 memcpy(&buf2[1], buf, len);
105 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
106 printk (KERN_WARNING "nxt200x: %s: i2c write error (addr 0x%02x, err == %i)\n",
107 __FUNCTION__, state->config->demod_address, err);
113 static u8 nxt200x_readbytes (struct nxt200x_state* state, u8 reg, u8* buf, u8 len)
115 u8 reg2 [] = { reg };
117 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
118 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
122 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
123 printk (KERN_WARNING "nxt200x: %s: i2c read error (addr 0x%02x, err == %i)\n",
124 __FUNCTION__, state->config->demod_address, err);
130 static u16 nxt200x_crc(u16 crc, u8 c)
133 u16 input = (u16) c & 0xFF;
137 if((crc^input) & 0x8000)
138 crc=(crc<<1)^CRC_CCIT_MASK;
146 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
149 dprintk("%s\n", __FUNCTION__);
151 /* set mutli register register */
152 nxt200x_writebytes(state, 0x35, ®, 1);
154 /* send the actual data */
155 nxt200x_writebytes(state, 0x36, data, len);
157 switch (state->demod_chip) {
163 /* probably not right, but gives correct values */
171 len2 = ((attr << 4) | 0x10) | len;
179 /* set multi register length */
180 nxt200x_writebytes(state, 0x34, &len2, 1);
182 /* toggle the multireg write bit */
183 nxt200x_writebytes(state, 0x21, &buf, 1);
185 nxt200x_readbytes(state, 0x21, &buf, 1);
187 switch (state->demod_chip) {
189 if ((buf & 0x02) == 0)
201 printk(KERN_WARNING "nxt200x: Error writing multireg register 0x%02X\n",reg);
206 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
210 dprintk("%s\n", __FUNCTION__);
212 /* set mutli register register */
213 nxt200x_writebytes(state, 0x35, ®, 1);
215 switch (state->demod_chip) {
217 /* set multi register length */
219 nxt200x_writebytes(state, 0x34, &len2, 1);
221 /* read the actual data */
222 nxt200x_readbytes(state, reg, data, len);
226 /* probably not right, but gives correct values */
234 /* set multi register length */
235 len2 = (attr << 4) | len;
236 nxt200x_writebytes(state, 0x34, &len2, 1);
238 /* toggle the multireg bit*/
240 nxt200x_writebytes(state, 0x21, &buf, 1);
242 /* read the actual data */
243 for(i = 0; i < len; i++) {
244 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
254 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
256 u8 buf, stopval, counter = 0;
257 dprintk("%s\n", __FUNCTION__);
259 /* set correct stop value */
260 switch (state->demod_chip) {
273 nxt200x_writebytes(state, 0x22, &buf, 1);
275 while (counter < 20) {
276 nxt200x_readbytes(state, 0x31, &buf, 1);
283 printk(KERN_WARNING "nxt200x: Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
287 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
290 dprintk("%s\n", __FUNCTION__);
293 nxt200x_writebytes(state, 0x22, &buf, 1);
296 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
300 dprintk("%s\n", __FUNCTION__);
303 nxt200x_writebytes(state, 0x2b, buf, 1);
305 nxt200x_writebytes(state, 0x34, buf, 1);
307 nxt200x_writebytes(state, 0x35, buf, 1);
308 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
309 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
310 nxt200x_writebytes(state, 0x36, buf, 9);
312 nxt200x_writebytes(state, 0x21, buf, 1);
314 while (counter < 20) {
315 nxt200x_readbytes(state, 0x21, buf, 1);
322 printk(KERN_WARNING "nxt200x: Timeout waiting for nxt2004 to init.\n");
327 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
331 dprintk("%s\n", __FUNCTION__);
333 dprintk("Tuner Bytes: %02X %02X %02X %02X\n", data[0], data[1], data[2], data[3]);
335 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
336 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
337 switch (state->demod_chip) {
339 if (i2c_writebytes(state, state->config->pll_address, data, 4))
340 printk(KERN_WARNING "nxt200x: error writing to tuner\n");
341 /* wait until we have a lock */
343 i2c_readbytes(state, state->config->pll_address, &buf, 1);
349 printk("nxt2004: timeout waiting for tuner lock\n");
352 /* set the i2c transfer speed to the tuner */
354 nxt200x_writebytes(state, 0x20, &buf, 1);
356 /* setup to transfer 4 bytes via i2c */
358 nxt200x_writebytes(state, 0x34, &buf, 1);
360 /* write actual tuner bytes */
361 nxt200x_writebytes(state, 0x36, data, 4);
363 /* set tuner i2c address */
364 buf = state->config->pll_address;
365 nxt200x_writebytes(state, 0x35, &buf, 1);
367 /* write UC Opmode to begin transfer */
369 nxt200x_writebytes(state, 0x21, &buf, 1);
372 nxt200x_readbytes(state, 0x21, &buf, 1);
373 if ((buf & 0x80)== 0x00)
378 printk("nxt2002: timeout error writing tuner\n");
387 static void nxt200x_agc_reset(struct nxt200x_state* state)
390 dprintk("%s\n", __FUNCTION__);
392 switch (state->demod_chip) {
395 nxt200x_writebytes(state, 0x08, &buf, 1);
397 nxt200x_writebytes(state, 0x08, &buf, 1);
400 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
402 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
404 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
412 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
415 struct nxt200x_state* state = fe->demodulator_priv;
416 u8 buf[3], written = 0, chunkpos = 0;
417 u16 rambase, position, crc = 0;
419 dprintk("%s\n", __FUNCTION__);
420 dprintk("Firmware is %zu bytes\n", fw->size);
422 /* Get the RAM base for this nxt2002 */
423 nxt200x_readbytes(state, 0x10, buf, 1);
430 dprintk("rambase on this nxt2002 is %04X\n", rambase);
432 /* Hold the micro in reset while loading firmware */
434 nxt200x_writebytes(state, 0x2B, buf, 1);
436 for (position = 0; position < fw->size; position++) {
440 buf[0] = ((rambase + position) >> 8);
441 buf[1] = (rambase + position) & 0xFF;
443 /* write starting address */
444 nxt200x_writebytes(state, 0x29, buf, 3);
449 if ((written % 4) == 0)
450 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
452 crc = nxt200x_crc(crc, fw->data[position]);
454 if ((written == 255) || (position+1 == fw->size)) {
455 /* write remaining bytes of firmware */
456 nxt200x_writebytes(state, chunkpos+4-(written %4),
457 &fw->data[position-(written %4) + 1],
463 nxt200x_writebytes(state, 0x2C, buf, 2);
465 /* do a read to stop things */
466 nxt200x_readbytes(state, 0x2A, buf, 1);
468 /* set transfer mode to complete */
470 nxt200x_writebytes(state, 0x2B, buf, 1);
479 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
482 struct nxt200x_state* state = fe->demodulator_priv;
484 u16 rambase, position, crc=0;
486 dprintk("%s\n", __FUNCTION__);
487 dprintk("Firmware is %zu bytes\n", fw->size);
492 /* hold the micro in reset while loading firmware */
494 nxt200x_writebytes(state, 0x2B, buf,1);
496 /* calculate firmware CRC */
497 for (position = 0; position < fw->size; position++) {
498 crc = nxt200x_crc(crc, fw->data[position]);
501 buf[0] = rambase >> 8;
502 buf[1] = rambase & 0xFF;
504 /* write starting address */
505 nxt200x_writebytes(state,0x29,buf,3);
507 for (position = 0; position < fw->size;) {
508 nxt200x_writebytes(state, 0x2C, &fw->data[position],
509 fw->size-position > 255 ? 255 : fw->size-position);
510 position += (fw->size-position > 255 ? 255 : fw->size-position);
515 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
518 nxt200x_writebytes(state, 0x2C, buf,2);
520 /* do a read to stop things */
521 nxt200x_readbytes(state, 0x2C, buf, 1);
523 /* set transfer mode to complete */
525 nxt200x_writebytes(state, 0x2B, buf,1);
530 static int nxt200x_setup_frontend_parameters (struct dvb_frontend* fe,
531 struct dvb_frontend_parameters *p)
533 struct nxt200x_state* state = fe->demodulator_priv;
536 /* stop the micro first */
537 nxt200x_microcontroller_stop(state);
539 if (state->demod_chip == NXT2004) {
540 /* make sure demod is set to digital */
542 nxt200x_writebytes(state, 0x14, buf, 1);
544 nxt200x_writebytes(state, 0x17, buf, 1);
547 /* get tuning information */
548 dvb_pll_configure(state->config->pll_desc, buf, p->frequency, 0);
550 /* set additional params */
551 switch (p->u.vsb.modulation) {
554 /* Set punctured clock for QAM */
555 /* This is just a guess since I am unable to test it */
556 if (state->config->set_ts_params)
557 state->config->set_ts_params(fe, 1);
560 if (state->config->set_pll_input)
561 state->config->set_pll_input(buf, 1);
564 /* Set non-punctured clock for VSB */
565 if (state->config->set_ts_params)
566 state->config->set_ts_params(fe, 0);
569 if (state->config->set_pll_input)
570 state->config->set_pll_input(buf, 0);
577 /* write frequency information */
578 nxt200x_writetuner(state, buf);
580 /* reset the agc now that tuning has been completed */
581 nxt200x_agc_reset(state);
583 /* set target power level */
584 switch (p->u.vsb.modulation) {
596 nxt200x_writebytes(state, 0x42, buf, 1);
599 switch (state->demod_chip) {
610 nxt200x_writebytes(state, 0x57, buf, 1);
612 /* write sdm1 input */
615 nxt200x_writebytes(state, 0x58, buf, 2);
617 /* write sdmx input */
618 switch (p->u.vsb.modulation) {
633 nxt200x_writebytes(state, 0x5C, buf, 2);
635 /* write adc power lpf fc */
637 nxt200x_writebytes(state, 0x43, buf, 1);
639 if (state->demod_chip == NXT2004) {
643 nxt200x_writebytes(state, 0x46, buf, 2);
646 /* write accumulator2 input */
649 nxt200x_writebytes(state, 0x4B, buf, 2);
653 nxt200x_writebytes(state, 0x4D, buf, 1);
655 /* write sdm12 lpf fc */
657 nxt200x_writebytes(state, 0x55, buf, 1);
659 /* write agc control reg */
661 nxt200x_writebytes(state, 0x41, buf, 1);
663 if (state->demod_chip == NXT2004) {
664 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
666 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
669 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
671 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
672 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
674 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
676 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
678 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
680 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
681 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
682 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
683 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
685 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
686 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
688 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
691 /* write agc ucgp0 */
692 switch (p->u.vsb.modulation) {
706 nxt200x_writebytes(state, 0x30, buf, 1);
708 /* write agc control reg */
710 nxt200x_writebytes(state, 0x41, buf, 1);
712 /* write accumulator2 input */
715 nxt200x_writebytes(state, 0x49, buf,2);
716 nxt200x_writebytes(state, 0x4B, buf,2);
718 /* write agc control reg */
720 nxt200x_writebytes(state, 0x41, buf, 1);
722 nxt200x_microcontroller_start(state);
724 if (state->demod_chip == NXT2004) {
725 nxt2004_microcontroller_init(state);
730 nxt200x_writebytes(state, 0x5C, buf, 2);
733 /* adjacent channel detection should be done here, but I don't
734 have any stations with this need so I cannot test it */
739 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
741 struct nxt200x_state* state = fe->demodulator_priv;
743 nxt200x_readbytes(state, 0x31, &lock, 1);
747 *status |= FE_HAS_SIGNAL;
748 *status |= FE_HAS_CARRIER;
749 *status |= FE_HAS_VITERBI;
750 *status |= FE_HAS_SYNC;
751 *status |= FE_HAS_LOCK;
756 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
758 struct nxt200x_state* state = fe->demodulator_priv;
761 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
763 *ber = ((b[0] << 8) + b[1]) * 8;
768 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
770 struct nxt200x_state* state = fe->demodulator_priv;
774 /* setup to read cluster variance */
776 nxt200x_writebytes(state, 0xA1, b, 1);
778 /* get multreg val */
779 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
781 temp = (b[0] << 8) | b[1];
782 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
787 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
790 struct nxt200x_state* state = fe->demodulator_priv;
795 /* setup to read cluster variance */
797 nxt200x_writebytes(state, 0xA1, b, 1);
799 /* get multreg val from 0xA6 */
800 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
802 temp = (b[0] << 8) | b[1];
803 temp2 = 0x7FFF - temp;
805 /* snr will be in db */
807 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
808 else if (temp2 > 0x7EC0)
809 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
810 else if (temp2 > 0x7C00)
811 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
813 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
815 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
816 *snr = snrdb * (0xFFFF/32000);
821 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
823 struct nxt200x_state* state = fe->demodulator_priv;
826 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
832 static int nxt200x_sleep(struct dvb_frontend* fe)
837 static int nxt2002_init(struct dvb_frontend* fe)
839 struct nxt200x_state* state = fe->demodulator_priv;
840 const struct firmware *fw;
844 /* request the firmware, this will block until someone uploads it */
845 printk("nxt2002: Waiting for firmware upload (%s)...\n", NXT2002_DEFAULT_FIRMWARE);
846 ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, &state->i2c->dev);
847 printk("nxt2002: Waiting for firmware upload(2)...\n");
849 printk("nxt2002: No firmware uploaded (timeout or file not found?)\n");
853 ret = nxt2002_load_firmware(fe, fw);
855 printk("nxt2002: Writing firmware to device failed\n");
856 release_firmware(fw);
859 printk("nxt2002: Firmware upload complete\n");
861 /* Put the micro into reset */
862 nxt200x_microcontroller_stop(state);
864 /* ensure transfer is complete */
866 nxt200x_writebytes(state, 0x2B, buf, 1);
868 /* Put the micro into reset for real this time */
869 nxt200x_microcontroller_stop(state);
871 /* soft reset everything (agc,frontend,eq,fec)*/
873 nxt200x_writebytes(state, 0x08, buf, 1);
875 nxt200x_writebytes(state, 0x08, buf, 1);
877 /* write agc sdm configure */
879 nxt200x_writebytes(state, 0x57, buf, 1);
881 /* write mod output format */
883 nxt200x_writebytes(state, 0x09, buf, 1);
885 /* write fec mpeg mode */
888 nxt200x_writebytes(state, 0xE9, buf, 2);
890 /* write mux selection */
892 nxt200x_writebytes(state, 0xCC, buf, 1);
897 static int nxt2004_init(struct dvb_frontend* fe)
899 struct nxt200x_state* state = fe->demodulator_priv;
900 const struct firmware *fw;
906 nxt200x_writebytes(state, 0x1E, buf, 1);
908 /* request the firmware, this will block until someone uploads it */
909 printk("nxt2004: Waiting for firmware upload (%s)...\n", NXT2004_DEFAULT_FIRMWARE);
910 ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, &state->i2c->dev);
911 printk("nxt2004: Waiting for firmware upload(2)...\n");
913 printk("nxt2004: No firmware uploaded (timeout or file not found?)\n");
917 ret = nxt2004_load_firmware(fe, fw);
919 printk("nxt2004: Writing firmware to device failed\n");
920 release_firmware(fw);
923 printk("nxt2004: Firmware upload complete\n");
925 /* ensure transfer is complete */
927 nxt200x_writebytes(state, 0x19, buf, 1);
929 nxt2004_microcontroller_init(state);
930 nxt200x_microcontroller_stop(state);
931 nxt200x_microcontroller_stop(state);
932 nxt2004_microcontroller_init(state);
933 nxt200x_microcontroller_stop(state);
935 /* soft reset everything (agc,frontend,eq,fec)*/
937 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
939 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
941 /* write agc sdm configure */
943 nxt200x_writebytes(state, 0x57, buf, 1);
948 nxt200x_writebytes(state, 0x35, buf, 2);
950 nxt200x_writebytes(state, 0x34, buf, 1);
952 nxt200x_writebytes(state, 0x21, buf, 1);
956 nxt200x_writebytes(state, 0x0A, buf, 1);
960 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
962 /* write fec mpeg mode */
965 nxt200x_writebytes(state, 0xE9, buf, 2);
967 /* write mux selection */
969 nxt200x_writebytes(state, 0xCC, buf, 1);
972 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
974 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
977 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
979 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
980 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
982 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
985 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
987 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
989 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
990 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
991 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
993 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
995 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
996 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
998 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1000 nxt200x_readbytes(state, 0x10, buf, 1);
1002 nxt200x_writebytes(state, 0x10, buf, 1);
1003 nxt200x_readbytes(state, 0x0A, buf, 1);
1005 nxt200x_writebytes(state, 0x0A, buf, 1);
1007 nxt2004_microcontroller_init(state);
1010 nxt200x_writebytes(state, 0x0A, buf, 1);
1012 nxt200x_writebytes(state, 0xE9, buf, 1);
1014 nxt200x_writebytes(state, 0xEA, buf, 1);
1016 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1018 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1019 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1021 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1024 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1026 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1027 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1029 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1031 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1033 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1035 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1036 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1037 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1039 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1041 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1043 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1045 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1047 /* initialize tuner */
1048 nxt200x_readbytes(state, 0x10, buf, 1);
1050 nxt200x_writebytes(state, 0x10, buf, 1);
1052 nxt200x_writebytes(state, 0x13, buf, 1);
1054 nxt200x_writebytes(state, 0x16, buf, 1);
1056 nxt200x_writebytes(state, 0x14, buf, 1);
1058 nxt200x_writebytes(state, 0x14, buf, 1);
1059 nxt200x_writebytes(state, 0x17, buf, 1);
1060 nxt200x_writebytes(state, 0x14, buf, 1);
1061 nxt200x_writebytes(state, 0x17, buf, 1);
1066 static int nxt200x_init(struct dvb_frontend* fe)
1068 struct nxt200x_state* state = fe->demodulator_priv;
1071 if (!state->initialised) {
1072 switch (state->demod_chip) {
1074 ret = nxt2002_init(fe);
1077 ret = nxt2004_init(fe);
1083 state->initialised = 1;
1088 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1090 fesettings->min_delay_ms = 500;
1091 fesettings->step_size = 0;
1092 fesettings->max_drift = 0;
1096 static void nxt200x_release(struct dvb_frontend* fe)
1098 struct nxt200x_state* state = fe->demodulator_priv;
1102 static struct dvb_frontend_ops nxt200x_ops;
1104 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1105 struct i2c_adapter* i2c)
1107 struct nxt200x_state* state = NULL;
1108 u8 buf [] = {0,0,0,0,0};
1110 /* allocate memory for the internal state */
1111 state = (struct nxt200x_state*) kmalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1114 memset(state,0,sizeof(*state));
1116 /* setup the state */
1117 state->config = config;
1119 memcpy(&state->ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1120 state->initialised = 0;
1123 nxt200x_readbytes(state, 0x00, buf, 5);
1124 dprintk("NXT info: %02X %02X %02X %02X %02X\n",
1125 buf[0], buf[1], buf[2], buf[3], buf[4]);
1127 /* set demod chip */
1130 state->demod_chip = NXT2002;
1131 printk("nxt200x: NXT2002 Detected\n");
1134 state->demod_chip = NXT2004;
1135 printk("nxt200x: NXT2004 Detected\n");
1141 /* make sure demod chip is supported */
1142 switch (state->demod_chip) {
1144 if (buf[0] != 0x04) goto error; /* device id */
1145 if (buf[1] != 0x02) goto error; /* fab id */
1146 if (buf[2] != 0x11) goto error; /* month */
1147 if (buf[3] != 0x20) goto error; /* year msb */
1148 if (buf[4] != 0x00) goto error; /* year lsb */
1151 if (buf[0] != 0x05) goto error; /* device id */
1157 /* create dvb_frontend */
1158 state->frontend.ops = &state->ops;
1159 state->frontend.demodulator_priv = state;
1160 return &state->frontend;
1164 printk("Unknown/Unsupported NXT chip: %02X %02X %02X %02X %02X\n",
1165 buf[0], buf[1], buf[2], buf[3], buf[4]);
1169 static struct dvb_frontend_ops nxt200x_ops = {
1172 .name = "Nextwave NXT200X VSB/QAM frontend",
1174 .frequency_min = 54000000,
1175 .frequency_max = 860000000,
1176 .frequency_stepsize = 166666, /* stepsize is just a guess */
1177 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1178 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1179 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1182 .release = nxt200x_release,
1184 .init = nxt200x_init,
1185 .sleep = nxt200x_sleep,
1187 .set_frontend = nxt200x_setup_frontend_parameters,
1188 .get_tune_settings = nxt200x_get_tune_settings,
1190 .read_status = nxt200x_read_status,
1191 .read_ber = nxt200x_read_ber,
1192 .read_signal_strength = nxt200x_read_signal_strength,
1193 .read_snr = nxt200x_read_snr,
1194 .read_ucblocks = nxt200x_read_ucblocks,
1197 module_param(debug, int, 0644);
1198 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1200 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1201 MODULE_AUTHOR("Kirk Lapray, Jean-Francois Thibert, and Taylor Jacob");
1202 MODULE_LICENSE("GPL");
1204 EXPORT_SYMBOL(nxt200x_attach);