1 /* pci_msi.c: Sparc64 MSI support common layer.
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
5 #include <linux/kernel.h>
6 #include <linux/interrupt.h>
11 static irqreturn_t sparc64_msiq_interrupt(int irq, void *cookie)
13 struct sparc64_msiq_cookie *msiq_cookie = cookie;
14 struct pci_pbm_info *pbm = msiq_cookie->pbm;
15 unsigned long msiqid = msiq_cookie->msiqid;
16 const struct sparc64_msiq_ops *ops;
17 unsigned long orig_head, head;
22 err = ops->get_head(pbm, msiqid, &head);
23 if (unlikely(err < 0))
30 err = ops->dequeue_msi(pbm, msiqid, &head, &msi);
31 if (likely(err > 0)) {
32 struct irq_desc *desc;
33 unsigned int virt_irq;
35 virt_irq = pbm->msi_irq_table[msi - pbm->msi_first];
36 desc = irq_desc + virt_irq;
38 desc->handle_irq(virt_irq, desc);
41 if (unlikely(err < 0))
47 if (likely(head != orig_head)) {
48 err = ops->set_head(pbm, msiqid, head);
49 if (unlikely(err < 0))
55 printk(KERN_EMERG "MSI: Get head on msiqid[%lu] gives error %d\n",
60 printk(KERN_EMERG "MSI: Dequeue head[%lu] from msiqid[%lu] "
66 printk(KERN_EMERG "MSI: Set head[%lu] on msiqid[%lu] "
75 static u32 pick_msiq(struct pci_pbm_info *pbm)
77 static DEFINE_SPINLOCK(rotor_lock);
81 spin_lock_irqsave(&rotor_lock, flags);
83 rotor = pbm->msiq_rotor;
84 ret = pbm->msiq_first + rotor;
86 if (++rotor >= pbm->msiq_num)
88 pbm->msiq_rotor = rotor;
90 spin_unlock_irqrestore(&rotor_lock, flags);
96 static int alloc_msi(struct pci_pbm_info *pbm)
100 for (i = 0; i < pbm->msi_num; i++) {
101 if (!test_and_set_bit(i, pbm->msi_bitmap))
102 return i + pbm->msi_first;
108 static void free_msi(struct pci_pbm_info *pbm, int msi_num)
110 msi_num -= pbm->msi_first;
111 clear_bit(msi_num, pbm->msi_bitmap);
114 static struct irq_chip msi_irq = {
115 .typename = "PCI-MSI",
116 .mask = mask_msi_irq,
117 .unmask = unmask_msi_irq,
118 .enable = unmask_msi_irq,
119 .disable = mask_msi_irq,
120 /* XXX affinity XXX */
123 static int sparc64_setup_msi_irq(unsigned int *virt_irq_p,
124 struct pci_dev *pdev,
125 struct msi_desc *entry)
127 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
128 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
133 *virt_irq_p = virt_irq_alloc(0, 0);
138 set_irq_chip_and_handler_name(*virt_irq_p, &msi_irq,
139 handle_simple_irq, "MSI");
141 err = alloc_msi(pbm);
142 if (unlikely(err < 0))
143 goto out_virt_irq_free;
147 msiqid = pick_msiq(pbm);
149 err = ops->msi_setup(pbm, msiqid, msi,
150 (entry->msi_attrib.is_64 ? 1 : 0));
154 pbm->msi_irq_table[msi - pbm->msi_first] = *virt_irq_p;
156 if (entry->msi_attrib.is_64) {
157 msg.address_hi = pbm->msi64_start >> 32;
158 msg.address_lo = pbm->msi64_start & 0xffffffff;
161 msg.address_lo = pbm->msi32_start;
165 set_irq_msi(*virt_irq_p, entry);
166 write_msi_msg(*virt_irq_p, &msg);
174 set_irq_chip(*virt_irq_p, NULL);
175 virt_irq_free(*virt_irq_p);
182 static void sparc64_teardown_msi_irq(unsigned int virt_irq,
183 struct pci_dev *pdev)
185 struct pci_pbm_info *pbm = pdev->dev.archdata.host_controller;
186 const struct sparc64_msiq_ops *ops = pbm->msi_ops;
187 unsigned int msi_num;
190 for (i = 0; i < pbm->msi_num; i++) {
191 if (pbm->msi_irq_table[i] == virt_irq)
194 if (i >= pbm->msi_num) {
195 printk(KERN_ERR "%s: teardown: No MSI for irq %u\n",
196 pbm->name, virt_irq);
200 msi_num = pbm->msi_first + i;
201 pbm->msi_irq_table[i] = ~0U;
203 err = ops->msi_teardown(pbm, msi_num);
205 printk(KERN_ERR "%s: teardown: ops->teardown() on MSI %u, "
206 "irq %u, gives error %d\n",
207 pbm->name, msi_num, virt_irq, err);
211 free_msi(pbm, msi_num);
213 set_irq_chip(virt_irq, NULL);
214 virt_irq_free(virt_irq);
217 static int msi_bitmap_alloc(struct pci_pbm_info *pbm)
219 unsigned long size, bits_per_ulong;
221 bits_per_ulong = sizeof(unsigned long) * 8;
222 size = (pbm->msi_num + (bits_per_ulong - 1)) & ~(bits_per_ulong - 1);
224 BUG_ON(size % sizeof(unsigned long));
226 pbm->msi_bitmap = kzalloc(size, GFP_KERNEL);
227 if (!pbm->msi_bitmap)
233 static void msi_bitmap_free(struct pci_pbm_info *pbm)
235 kfree(pbm->msi_bitmap);
236 pbm->msi_bitmap = NULL;
239 static int msi_table_alloc(struct pci_pbm_info *pbm)
243 size = pbm->msiq_num * sizeof(struct sparc64_msiq_cookie);
244 pbm->msiq_irq_cookies = kzalloc(size, GFP_KERNEL);
245 if (!pbm->msiq_irq_cookies)
248 for (i = 0; i < pbm->msiq_num; i++) {
249 struct sparc64_msiq_cookie *p;
251 p = &pbm->msiq_irq_cookies[i];
253 p->msiqid = pbm->msiq_first + i;
256 size = pbm->msi_num * sizeof(unsigned int);
257 pbm->msi_irq_table = kzalloc(size, GFP_KERNEL);
258 if (!pbm->msi_irq_table) {
259 kfree(pbm->msiq_irq_cookies);
260 pbm->msiq_irq_cookies = NULL;
267 static void msi_table_free(struct pci_pbm_info *pbm)
269 kfree(pbm->msiq_irq_cookies);
270 pbm->msiq_irq_cookies = NULL;
272 kfree(pbm->msi_irq_table);
273 pbm->msi_irq_table = NULL;
276 static int bringup_one_msi_queue(struct pci_pbm_info *pbm,
277 const struct sparc64_msiq_ops *ops,
278 unsigned long msiqid,
279 unsigned long devino)
281 int irq = ops->msiq_build_irq(pbm, msiqid, devino);
287 nid = pbm->numa_node;
289 cpumask_t numa_mask = *cpumask_of_node(nid);
291 irq_set_affinity(irq, &numa_mask);
293 err = request_irq(irq, sparc64_msiq_interrupt, 0,
295 &pbm->msiq_irq_cookies[msiqid - pbm->msiq_first]);
302 static int sparc64_bringup_msi_queues(struct pci_pbm_info *pbm,
303 const struct sparc64_msiq_ops *ops)
307 for (i = 0; i < pbm->msiq_num; i++) {
308 unsigned long msiqid = i + pbm->msiq_first;
309 unsigned long devino = i + pbm->msiq_first_devino;
312 err = bringup_one_msi_queue(pbm, ops, msiqid, devino);
320 void sparc64_pbm_msi_init(struct pci_pbm_info *pbm,
321 const struct sparc64_msiq_ops *ops)
326 val = of_get_property(pbm->op->node, "#msi-eqs", &len);
327 if (!val || len != 4)
329 pbm->msiq_num = *val;
331 const struct msiq_prop {
336 const struct msi_range_prop {
340 const struct addr_range_prop {
349 val = of_get_property(pbm->op->node, "msi-eq-size", &len);
350 if (!val || len != 4)
353 pbm->msiq_ent_count = *val;
355 mqp = of_get_property(pbm->op->node,
356 "msi-eq-to-devino", &len);
358 mqp = of_get_property(pbm->op->node,
359 "msi-eq-devino", &len);
360 if (!mqp || len != sizeof(struct msiq_prop))
363 pbm->msiq_first = mqp->first_msiq;
364 pbm->msiq_first_devino = mqp->first_devino;
366 val = of_get_property(pbm->op->node, "#msi", &len);
367 if (!val || len != 4)
371 mrng = of_get_property(pbm->op->node, "msi-ranges", &len);
372 if (!mrng || len != sizeof(struct msi_range_prop))
374 pbm->msi_first = mrng->first_msi;
376 val = of_get_property(pbm->op->node, "msi-data-mask", &len);
377 if (!val || len != 4)
379 pbm->msi_data_mask = *val;
381 val = of_get_property(pbm->op->node, "msix-data-width", &len);
382 if (!val || len != 4)
384 pbm->msix_data_width = *val;
386 arng = of_get_property(pbm->op->node, "msi-address-ranges",
388 if (!arng || len != sizeof(struct addr_range_prop))
390 pbm->msi32_start = ((u64)arng->msi32_high << 32) |
391 (u64) arng->msi32_low;
392 pbm->msi64_start = ((u64)arng->msi64_high << 32) |
393 (u64) arng->msi64_low;
394 pbm->msi32_len = arng->msi32_len;
395 pbm->msi64_len = arng->msi64_len;
397 if (msi_bitmap_alloc(pbm))
400 if (msi_table_alloc(pbm)) {
401 msi_bitmap_free(pbm);
405 if (ops->msiq_alloc(pbm)) {
407 msi_bitmap_free(pbm);
411 if (sparc64_bringup_msi_queues(pbm, ops)) {
414 msi_bitmap_free(pbm);
418 printk(KERN_INFO "%s: MSI Queue first[%u] num[%u] count[%u] "
421 pbm->msiq_first, pbm->msiq_num,
423 pbm->msiq_first_devino);
424 printk(KERN_INFO "%s: MSI first[%u] num[%u] mask[0x%x] "
427 pbm->msi_first, pbm->msi_num, pbm->msi_data_mask,
428 pbm->msix_data_width);
429 printk(KERN_INFO "%s: MSI addr32[0x%llx:0x%x] "
430 "addr64[0x%llx:0x%x]\n",
432 pbm->msi32_start, pbm->msi32_len,
433 pbm->msi64_start, pbm->msi64_len);
434 printk(KERN_INFO "%s: MSI queues at RA [%016lx]\n",
436 __pa(pbm->msi_queues));
439 pbm->setup_msi_irq = sparc64_setup_msi_irq;
440 pbm->teardown_msi_irq = sparc64_teardown_msi_irq;
446 printk(KERN_INFO "%s: No MSI support.\n", pbm->name);