2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/cs.h>
23 #include <pcmcia/cistpl.h>
24 #include <pcmcia/ds.h>
27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
28 MODULE_LICENSE("GPL");
31 /* Temporary list of yet-to-be-attached buses */
32 static LIST_HEAD(attach_queue);
33 /* List if running buses */
34 static LIST_HEAD(buses);
35 /* Software ID counter */
36 static unsigned int next_busnumber;
37 /* buses_mutes locks the two buslists and the next_busnumber.
38 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
39 static DEFINE_MUTEX(buses_mutex);
41 /* There are differences in the codeflow, if the bus is
42 * initialized from early boot, as various needed services
43 * are not available early. This is a mechanism to delay
44 * these initializations to after early boot has finished.
45 * It's also used to avoid mutex locking, as that's not
46 * available and needed early. */
47 static bool ssb_is_early_boot = 1;
49 static void ssb_buses_lock(void);
50 static void ssb_buses_unlock(void);
53 #ifdef CONFIG_SSB_PCIHOST
54 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
59 list_for_each_entry(bus, &buses, list) {
60 if (bus->bustype == SSB_BUSTYPE_PCI &&
61 bus->host_pci == pdev)
70 #endif /* CONFIG_SSB_PCIHOST */
72 #ifdef CONFIG_SSB_PCMCIAHOST
73 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
78 list_for_each_entry(bus, &buses, list) {
79 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
80 bus->host_pcmcia == pdev)
89 #endif /* CONFIG_SSB_PCMCIAHOST */
91 int ssb_for_each_bus_call(unsigned long data,
92 int (*func)(struct ssb_bus *bus, unsigned long data))
98 list_for_each_entry(bus, &buses, list) {
99 res = func(bus, data);
110 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
113 get_device(dev->dev);
117 static void ssb_device_put(struct ssb_device *dev)
120 put_device(dev->dev);
123 static int ssb_device_resume(struct device *dev)
125 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
126 struct ssb_driver *ssb_drv;
130 ssb_drv = drv_to_ssb_drv(dev->driver);
131 if (ssb_drv && ssb_drv->resume)
132 err = ssb_drv->resume(ssb_dev);
140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
147 ssb_drv = drv_to_ssb_drv(dev->driver);
148 if (ssb_drv && ssb_drv->suspend)
149 err = ssb_drv->suspend(ssb_dev, state);
157 int ssb_bus_resume(struct ssb_bus *bus)
161 /* Reset HW state information in memory, so that HW is
162 * completely reinitialized. */
163 bus->mapped_device = NULL;
164 #ifdef CONFIG_SSB_DRIVER_PCICORE
165 bus->pcicore.setup_done = 0;
168 err = ssb_bus_powerup(bus, 0);
171 err = ssb_pcmcia_hardware_setup(bus);
173 ssb_bus_may_powerdown(bus);
176 ssb_chipco_resume(&bus->chipco);
177 ssb_bus_may_powerdown(bus);
181 EXPORT_SYMBOL(ssb_bus_resume);
183 int ssb_bus_suspend(struct ssb_bus *bus)
185 ssb_chipco_suspend(&bus->chipco);
186 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
190 EXPORT_SYMBOL(ssb_bus_suspend);
192 #ifdef CONFIG_SSB_SPROM
193 int ssb_devices_freeze(struct ssb_bus *bus)
195 struct ssb_device *dev;
196 struct ssb_driver *drv;
199 pm_message_t state = PMSG_FREEZE;
201 /* First check that we are capable to freeze all devices. */
202 for (i = 0; i < bus->nr_devices; i++) {
203 dev = &(bus->devices[i]);
206 !device_is_registered(dev->dev))
208 drv = drv_to_ssb_drv(dev->dev->driver);
212 /* Nope, can't suspend this one. */
216 /* Now suspend all devices */
217 for (i = 0; i < bus->nr_devices; i++) {
218 dev = &(bus->devices[i]);
221 !device_is_registered(dev->dev))
223 drv = drv_to_ssb_drv(dev->dev->driver);
226 err = drv->suspend(dev, state);
228 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
236 for (i--; i >= 0; i--) {
237 dev = &(bus->devices[i]);
240 !device_is_registered(dev->dev))
242 drv = drv_to_ssb_drv(dev->dev->driver);
251 int ssb_devices_thaw(struct ssb_bus *bus)
253 struct ssb_device *dev;
254 struct ssb_driver *drv;
258 for (i = 0; i < bus->nr_devices; i++) {
259 dev = &(bus->devices[i]);
262 !device_is_registered(dev->dev))
264 drv = drv_to_ssb_drv(dev->dev->driver);
267 if (SSB_WARN_ON(!drv->resume))
269 err = drv->resume(dev);
271 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
278 #endif /* CONFIG_SSB_SPROM */
280 static void ssb_device_shutdown(struct device *dev)
282 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
283 struct ssb_driver *ssb_drv;
287 ssb_drv = drv_to_ssb_drv(dev->driver);
288 if (ssb_drv && ssb_drv->shutdown)
289 ssb_drv->shutdown(ssb_dev);
292 static int ssb_device_remove(struct device *dev)
294 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
295 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
297 if (ssb_drv && ssb_drv->remove)
298 ssb_drv->remove(ssb_dev);
299 ssb_device_put(ssb_dev);
304 static int ssb_device_probe(struct device *dev)
306 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
307 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
310 ssb_device_get(ssb_dev);
311 if (ssb_drv && ssb_drv->probe)
312 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
314 ssb_device_put(ssb_dev);
319 static int ssb_match_devid(const struct ssb_device_id *tabid,
320 const struct ssb_device_id *devid)
322 if ((tabid->vendor != devid->vendor) &&
323 tabid->vendor != SSB_ANY_VENDOR)
325 if ((tabid->coreid != devid->coreid) &&
326 tabid->coreid != SSB_ANY_ID)
328 if ((tabid->revision != devid->revision) &&
329 tabid->revision != SSB_ANY_REV)
334 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
336 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
337 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
338 const struct ssb_device_id *id;
340 for (id = ssb_drv->id_table;
341 id->vendor || id->coreid || id->revision;
343 if (ssb_match_devid(id, &ssb_dev->id))
344 return 1; /* found */
350 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
352 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
357 return add_uevent_var(env,
358 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
359 ssb_dev->id.vendor, ssb_dev->id.coreid,
360 ssb_dev->id.revision);
363 static struct bus_type ssb_bustype = {
365 .match = ssb_bus_match,
366 .probe = ssb_device_probe,
367 .remove = ssb_device_remove,
368 .shutdown = ssb_device_shutdown,
369 .suspend = ssb_device_suspend,
370 .resume = ssb_device_resume,
371 .uevent = ssb_device_uevent,
374 static void ssb_buses_lock(void)
376 /* See the comment at the ssb_is_early_boot definition */
377 if (!ssb_is_early_boot)
378 mutex_lock(&buses_mutex);
381 static void ssb_buses_unlock(void)
383 /* See the comment at the ssb_is_early_boot definition */
384 if (!ssb_is_early_boot)
385 mutex_unlock(&buses_mutex);
388 static void ssb_devices_unregister(struct ssb_bus *bus)
390 struct ssb_device *sdev;
393 for (i = bus->nr_devices - 1; i >= 0; i--) {
394 sdev = &(bus->devices[i]);
396 device_unregister(sdev->dev);
400 void ssb_bus_unregister(struct ssb_bus *bus)
403 ssb_devices_unregister(bus);
404 list_del(&bus->list);
407 ssb_pcmcia_exit(bus);
411 EXPORT_SYMBOL(ssb_bus_unregister);
413 static void ssb_release_dev(struct device *dev)
415 struct __ssb_dev_wrapper *devwrap;
417 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
421 static int ssb_devices_register(struct ssb_bus *bus)
423 struct ssb_device *sdev;
425 struct __ssb_dev_wrapper *devwrap;
429 for (i = 0; i < bus->nr_devices; i++) {
430 sdev = &(bus->devices[i]);
432 /* We don't register SSB-system devices to the kernel,
433 * as the drivers for them are built into SSB. */
434 switch (sdev->id.coreid) {
435 case SSB_DEV_CHIPCOMMON:
440 case SSB_DEV_MIPS_3302:
445 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
447 ssb_printk(KERN_ERR PFX
448 "Could not allocate device\n");
453 devwrap->sdev = sdev;
455 dev->release = ssb_release_dev;
456 dev->bus = &ssb_bustype;
457 snprintf(dev->bus_id, sizeof(dev->bus_id),
458 "ssb%u:%d", bus->busnumber, dev_idx);
460 switch (bus->bustype) {
461 case SSB_BUSTYPE_PCI:
462 #ifdef CONFIG_SSB_PCIHOST
463 sdev->irq = bus->host_pci->irq;
464 dev->parent = &bus->host_pci->dev;
467 case SSB_BUSTYPE_PCMCIA:
468 #ifdef CONFIG_SSB_PCMCIAHOST
469 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
470 dev->parent = &bus->host_pcmcia->dev;
473 case SSB_BUSTYPE_SSB:
474 dev->dma_mask = &dev->coherent_dma_mask;
479 err = device_register(dev);
481 ssb_printk(KERN_ERR PFX
482 "Could not register %s\n",
484 /* Set dev to NULL to not unregister
485 * dev on error unwinding. */
495 /* Unwind the already registered devices. */
496 ssb_devices_unregister(bus);
500 /* Needs ssb_buses_lock() */
501 static int ssb_attach_queued_buses(void)
503 struct ssb_bus *bus, *n;
505 int drop_them_all = 0;
507 list_for_each_entry_safe(bus, n, &attach_queue, list) {
509 list_del(&bus->list);
512 /* Can't init the PCIcore in ssb_bus_register(), as that
513 * is too early in boot for embedded systems
514 * (no udelay() available). So do it here in attach stage.
516 err = ssb_bus_powerup(bus, 0);
519 ssb_pcicore_init(&bus->pcicore);
520 ssb_bus_may_powerdown(bus);
522 err = ssb_devices_register(bus);
526 list_del(&bus->list);
529 list_move_tail(&bus->list, &buses);
535 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
537 struct ssb_bus *bus = dev->bus;
539 offset += dev->core_index * SSB_CORE_SIZE;
540 return readb(bus->mmio + offset);
543 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
545 struct ssb_bus *bus = dev->bus;
547 offset += dev->core_index * SSB_CORE_SIZE;
548 return readw(bus->mmio + offset);
551 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
553 struct ssb_bus *bus = dev->bus;
555 offset += dev->core_index * SSB_CORE_SIZE;
556 return readl(bus->mmio + offset);
559 #ifdef CONFIG_SSB_BLOCKIO
560 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
561 size_t count, u16 offset, u8 reg_width)
563 struct ssb_bus *bus = dev->bus;
566 offset += dev->core_index * SSB_CORE_SIZE;
567 addr = bus->mmio + offset;
574 *buf = __raw_readb(addr);
581 __le16 *buf = buffer;
583 SSB_WARN_ON(count & 1);
585 *buf = (__force __le16)__raw_readw(addr);
592 __le32 *buf = buffer;
594 SSB_WARN_ON(count & 3);
596 *buf = (__force __le32)__raw_readl(addr);
606 #endif /* CONFIG_SSB_BLOCKIO */
608 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
610 struct ssb_bus *bus = dev->bus;
612 offset += dev->core_index * SSB_CORE_SIZE;
613 writeb(value, bus->mmio + offset);
616 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
618 struct ssb_bus *bus = dev->bus;
620 offset += dev->core_index * SSB_CORE_SIZE;
621 writew(value, bus->mmio + offset);
624 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
626 struct ssb_bus *bus = dev->bus;
628 offset += dev->core_index * SSB_CORE_SIZE;
629 writel(value, bus->mmio + offset);
632 #ifdef CONFIG_SSB_BLOCKIO
633 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
634 size_t count, u16 offset, u8 reg_width)
636 struct ssb_bus *bus = dev->bus;
639 offset += dev->core_index * SSB_CORE_SIZE;
640 addr = bus->mmio + offset;
644 const u8 *buf = buffer;
647 __raw_writeb(*buf, addr);
654 const __le16 *buf = buffer;
656 SSB_WARN_ON(count & 1);
658 __raw_writew((__force u16)(*buf), addr);
665 const __le32 *buf = buffer;
667 SSB_WARN_ON(count & 3);
669 __raw_writel((__force u32)(*buf), addr);
679 #endif /* CONFIG_SSB_BLOCKIO */
681 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
682 static const struct ssb_bus_ops ssb_ssb_ops = {
683 .read8 = ssb_ssb_read8,
684 .read16 = ssb_ssb_read16,
685 .read32 = ssb_ssb_read32,
686 .write8 = ssb_ssb_write8,
687 .write16 = ssb_ssb_write16,
688 .write32 = ssb_ssb_write32,
689 #ifdef CONFIG_SSB_BLOCKIO
690 .block_read = ssb_ssb_block_read,
691 .block_write = ssb_ssb_block_write,
695 static int ssb_fetch_invariants(struct ssb_bus *bus,
696 ssb_invariants_func_t get_invariants)
698 struct ssb_init_invariants iv;
701 memset(&iv, 0, sizeof(iv));
702 err = get_invariants(bus, &iv);
705 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
706 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
707 bus->has_cardbus_slot = iv.has_cardbus_slot;
712 static int ssb_bus_register(struct ssb_bus *bus,
713 ssb_invariants_func_t get_invariants,
714 unsigned long baseaddr)
718 spin_lock_init(&bus->bar_lock);
719 INIT_LIST_HEAD(&bus->list);
720 #ifdef CONFIG_SSB_EMBEDDED
721 spin_lock_init(&bus->gpio_lock);
724 /* Powerup the bus */
725 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
729 bus->busnumber = next_busnumber;
730 /* Scan for devices (cores) */
731 err = ssb_bus_scan(bus, baseaddr);
733 goto err_disable_xtal;
735 /* Init PCI-host device (if any) */
736 err = ssb_pci_init(bus);
739 /* Init PCMCIA-host device (if any) */
740 err = ssb_pcmcia_init(bus);
744 /* Initialize basic system devices (if available) */
745 err = ssb_bus_powerup(bus, 0);
747 goto err_pcmcia_exit;
748 ssb_chipcommon_init(&bus->chipco);
749 ssb_mipscore_init(&bus->mipscore);
750 err = ssb_fetch_invariants(bus, get_invariants);
752 ssb_bus_may_powerdown(bus);
753 goto err_pcmcia_exit;
755 ssb_bus_may_powerdown(bus);
757 /* Queue it for attach.
758 * See the comment at the ssb_is_early_boot definition. */
759 list_add_tail(&bus->list, &attach_queue);
760 if (!ssb_is_early_boot) {
761 /* This is not early boot, so we must attach the bus now */
762 err = ssb_attach_queued_buses();
773 list_del(&bus->list);
775 ssb_pcmcia_exit(bus);
782 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
786 #ifdef CONFIG_SSB_PCIHOST
787 int ssb_bus_pcibus_register(struct ssb_bus *bus,
788 struct pci_dev *host_pci)
792 bus->bustype = SSB_BUSTYPE_PCI;
793 bus->host_pci = host_pci;
794 bus->ops = &ssb_pci_ops;
796 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
798 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
799 "PCI device %s\n", host_pci->dev.bus_id);
804 EXPORT_SYMBOL(ssb_bus_pcibus_register);
805 #endif /* CONFIG_SSB_PCIHOST */
807 #ifdef CONFIG_SSB_PCMCIAHOST
808 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
809 struct pcmcia_device *pcmcia_dev,
810 unsigned long baseaddr)
814 bus->bustype = SSB_BUSTYPE_PCMCIA;
815 bus->host_pcmcia = pcmcia_dev;
816 bus->ops = &ssb_pcmcia_ops;
818 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
820 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
821 "PCMCIA device %s\n", pcmcia_dev->devname);
826 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
827 #endif /* CONFIG_SSB_PCMCIAHOST */
829 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
830 unsigned long baseaddr,
831 ssb_invariants_func_t get_invariants)
835 bus->bustype = SSB_BUSTYPE_SSB;
836 bus->ops = &ssb_ssb_ops;
838 err = ssb_bus_register(bus, get_invariants, baseaddr);
840 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
841 "address 0x%08lX\n", baseaddr);
847 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
849 drv->drv.name = drv->name;
850 drv->drv.bus = &ssb_bustype;
851 drv->drv.owner = owner;
853 return driver_register(&drv->drv);
855 EXPORT_SYMBOL(__ssb_driver_register);
857 void ssb_driver_unregister(struct ssb_driver *drv)
859 driver_unregister(&drv->drv);
861 EXPORT_SYMBOL(ssb_driver_unregister);
863 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
865 struct ssb_bus *bus = dev->bus;
866 struct ssb_device *ent;
869 for (i = 0; i < bus->nr_devices; i++) {
870 ent = &(bus->devices[i]);
871 if (ent->id.vendor != dev->id.vendor)
873 if (ent->id.coreid != dev->id.coreid)
876 ent->devtypedata = data;
879 EXPORT_SYMBOL(ssb_set_devtypedata);
881 static u32 clkfactor_f6_resolve(u32 v)
883 /* map the magic values */
885 case SSB_CHIPCO_CLK_F6_2:
887 case SSB_CHIPCO_CLK_F6_3:
889 case SSB_CHIPCO_CLK_F6_4:
891 case SSB_CHIPCO_CLK_F6_5:
893 case SSB_CHIPCO_CLK_F6_6:
895 case SSB_CHIPCO_CLK_F6_7:
901 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
902 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
904 u32 n1, n2, clock, m1, m2, m3, mc;
906 n1 = (n & SSB_CHIPCO_CLK_N1);
907 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
910 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
911 if (m & SSB_CHIPCO_CLK_T6_MMASK)
912 return SSB_CHIPCO_CLK_T6_M0;
913 return SSB_CHIPCO_CLK_T6_M1;
914 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
915 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
916 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
917 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
918 n1 = clkfactor_f6_resolve(n1);
919 n2 += SSB_CHIPCO_CLK_F5_BIAS;
921 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
922 n1 += SSB_CHIPCO_CLK_T2_BIAS;
923 n2 += SSB_CHIPCO_CLK_T2_BIAS;
924 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
925 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
927 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
934 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
935 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
936 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
939 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
944 m1 = (m & SSB_CHIPCO_CLK_M1);
945 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
946 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
947 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
950 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
951 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
952 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
953 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
954 m1 = clkfactor_f6_resolve(m1);
955 if ((plltype == SSB_PLLTYPE_1) ||
956 (plltype == SSB_PLLTYPE_3))
957 m2 += SSB_CHIPCO_CLK_F5_BIAS;
959 m2 = clkfactor_f6_resolve(m2);
960 m3 = clkfactor_f6_resolve(m3);
963 case SSB_CHIPCO_CLK_MC_BYPASS:
965 case SSB_CHIPCO_CLK_MC_M1:
967 case SSB_CHIPCO_CLK_MC_M1M2:
968 return (clock / (m1 * m2));
969 case SSB_CHIPCO_CLK_MC_M1M2M3:
970 return (clock / (m1 * m2 * m3));
971 case SSB_CHIPCO_CLK_MC_M1M3:
972 return (clock / (m1 * m3));
976 m1 += SSB_CHIPCO_CLK_T2_BIAS;
977 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
978 m3 += SSB_CHIPCO_CLK_T2_BIAS;
979 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
980 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
981 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
983 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
985 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
987 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
996 /* Get the current speed the backplane is running at */
997 u32 ssb_clockspeed(struct ssb_bus *bus)
1001 u32 clkctl_n, clkctl_m;
1003 if (ssb_extif_available(&bus->extif))
1004 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1005 &clkctl_n, &clkctl_m);
1006 else if (bus->chipco.dev)
1007 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1008 &clkctl_n, &clkctl_m);
1012 if (bus->chip_id == 0x5365) {
1015 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1016 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1022 EXPORT_SYMBOL(ssb_clockspeed);
1024 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1026 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1028 /* The REJECT bit changed position in TMSLOW between
1029 * Backplane revisions. */
1031 case SSB_IDLOW_SSBREV_22:
1032 return SSB_TMSLOW_REJECT_22;
1033 case SSB_IDLOW_SSBREV_23:
1034 return SSB_TMSLOW_REJECT_23;
1035 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
1036 case SSB_IDLOW_SSBREV_25: /* same here */
1037 case SSB_IDLOW_SSBREV_26: /* same here */
1038 case SSB_IDLOW_SSBREV_27: /* same here */
1039 return SSB_TMSLOW_REJECT_23; /* this is a guess */
1041 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1044 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
1047 int ssb_device_is_enabled(struct ssb_device *dev)
1052 reject = ssb_tmslow_reject_bitmask(dev);
1053 val = ssb_read32(dev, SSB_TMSLOW);
1054 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1056 return (val == SSB_TMSLOW_CLOCK);
1058 EXPORT_SYMBOL(ssb_device_is_enabled);
1060 static void ssb_flush_tmslow(struct ssb_device *dev)
1062 /* Make _really_ sure the device has finished the TMSLOW
1063 * register write transaction, as we risk running into
1064 * a machine check exception otherwise.
1065 * Do this by reading the register back to commit the
1066 * PCI write and delay an additional usec for the device
1067 * to react to the change. */
1068 ssb_read32(dev, SSB_TMSLOW);
1072 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1076 ssb_device_disable(dev, core_specific_flags);
1077 ssb_write32(dev, SSB_TMSLOW,
1078 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1079 SSB_TMSLOW_FGC | core_specific_flags);
1080 ssb_flush_tmslow(dev);
1082 /* Clear SERR if set. This is a hw bug workaround. */
1083 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1084 ssb_write32(dev, SSB_TMSHIGH, 0);
1086 val = ssb_read32(dev, SSB_IMSTATE);
1087 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1088 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1089 ssb_write32(dev, SSB_IMSTATE, val);
1092 ssb_write32(dev, SSB_TMSLOW,
1093 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1094 core_specific_flags);
1095 ssb_flush_tmslow(dev);
1097 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1098 core_specific_flags);
1099 ssb_flush_tmslow(dev);
1101 EXPORT_SYMBOL(ssb_device_enable);
1103 /* Wait for a bit in a register to get set or unset.
1104 * timeout is in units of ten-microseconds */
1105 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1106 int timeout, int set)
1111 for (i = 0; i < timeout; i++) {
1112 val = ssb_read32(dev, reg);
1117 if (!(val & bitmask))
1122 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1123 "register %04X to %s.\n",
1124 bitmask, reg, (set ? "set" : "clear"));
1129 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1133 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1136 reject = ssb_tmslow_reject_bitmask(dev);
1137 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1138 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1139 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1140 ssb_write32(dev, SSB_TMSLOW,
1141 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1142 reject | SSB_TMSLOW_RESET |
1143 core_specific_flags);
1144 ssb_flush_tmslow(dev);
1146 ssb_write32(dev, SSB_TMSLOW,
1147 reject | SSB_TMSLOW_RESET |
1148 core_specific_flags);
1149 ssb_flush_tmslow(dev);
1151 EXPORT_SYMBOL(ssb_device_disable);
1153 u32 ssb_dma_translation(struct ssb_device *dev)
1155 switch (dev->bus->bustype) {
1156 case SSB_BUSTYPE_SSB:
1158 case SSB_BUSTYPE_PCI:
1161 __ssb_dma_not_implemented(dev);
1165 EXPORT_SYMBOL(ssb_dma_translation);
1167 int ssb_dma_set_mask(struct ssb_device *dev, u64 mask)
1169 #ifdef CONFIG_SSB_PCIHOST
1173 switch (dev->bus->bustype) {
1174 case SSB_BUSTYPE_PCI:
1175 #ifdef CONFIG_SSB_PCIHOST
1176 err = pci_set_dma_mask(dev->bus->host_pci, mask);
1179 err = pci_set_consistent_dma_mask(dev->bus->host_pci, mask);
1182 case SSB_BUSTYPE_SSB:
1183 return dma_set_mask(dev->dev, mask);
1185 __ssb_dma_not_implemented(dev);
1189 EXPORT_SYMBOL(ssb_dma_set_mask);
1191 void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
1192 dma_addr_t *dma_handle, gfp_t gfp_flags)
1194 switch (dev->bus->bustype) {
1195 case SSB_BUSTYPE_PCI:
1196 #ifdef CONFIG_SSB_PCIHOST
1197 if (gfp_flags & GFP_DMA) {
1198 /* Workaround: The PCI API does not support passing
1200 return dma_alloc_coherent(&dev->bus->host_pci->dev,
1201 size, dma_handle, gfp_flags);
1203 return pci_alloc_consistent(dev->bus->host_pci, size, dma_handle);
1205 case SSB_BUSTYPE_SSB:
1206 return dma_alloc_coherent(dev->dev, size, dma_handle, gfp_flags);
1208 __ssb_dma_not_implemented(dev);
1212 EXPORT_SYMBOL(ssb_dma_alloc_consistent);
1214 void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
1215 void *vaddr, dma_addr_t dma_handle,
1218 switch (dev->bus->bustype) {
1219 case SSB_BUSTYPE_PCI:
1220 #ifdef CONFIG_SSB_PCIHOST
1221 if (gfp_flags & GFP_DMA) {
1222 /* Workaround: The PCI API does not support passing
1224 dma_free_coherent(&dev->bus->host_pci->dev,
1225 size, vaddr, dma_handle);
1228 pci_free_consistent(dev->bus->host_pci, size,
1232 case SSB_BUSTYPE_SSB:
1233 dma_free_coherent(dev->dev, size, vaddr, dma_handle);
1236 __ssb_dma_not_implemented(dev);
1239 EXPORT_SYMBOL(ssb_dma_free_consistent);
1241 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1243 struct ssb_chipcommon *cc;
1246 /* On buses where more than one core may be working
1247 * at a time, we must not powerdown stuff if there are
1248 * still cores that may want to run. */
1249 if (bus->bustype == SSB_BUSTYPE_SSB)
1256 if (cc->dev->id.revision < 5)
1259 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1260 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1264 #ifdef CONFIG_SSB_DEBUG
1265 bus->powered_up = 0;
1269 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1272 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1274 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1276 struct ssb_chipcommon *cc;
1278 enum ssb_clkmode mode;
1280 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1284 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1285 ssb_chipco_set_clockmode(cc, mode);
1287 #ifdef CONFIG_SSB_DEBUG
1288 bus->powered_up = 1;
1292 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1295 EXPORT_SYMBOL(ssb_bus_powerup);
1297 u32 ssb_admatch_base(u32 adm)
1301 switch (adm & SSB_ADM_TYPE) {
1303 base = (adm & SSB_ADM_BASE0);
1306 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1307 base = (adm & SSB_ADM_BASE1);
1310 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1311 base = (adm & SSB_ADM_BASE2);
1319 EXPORT_SYMBOL(ssb_admatch_base);
1321 u32 ssb_admatch_size(u32 adm)
1325 switch (adm & SSB_ADM_TYPE) {
1327 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1330 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1331 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1334 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1335 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1340 size = (1 << (size + 1));
1344 EXPORT_SYMBOL(ssb_admatch_size);
1346 static int __init ssb_modinit(void)
1350 /* See the comment at the ssb_is_early_boot definition */
1351 ssb_is_early_boot = 0;
1352 err = bus_register(&ssb_bustype);
1356 /* Maybe we already registered some buses at early boot.
1357 * Check for this and attach them
1360 err = ssb_attach_queued_buses();
1363 bus_unregister(&ssb_bustype);
1365 err = b43_pci_ssb_bridge_init();
1367 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1368 "initialization failed\n");
1369 /* don't fail SSB init because of this */
1372 err = ssb_gige_init();
1374 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1375 "driver initialization failed\n");
1376 /* don't fail SSB init because of this */
1382 /* ssb must be initialized after PCI but before the ssb drivers.
1383 * That means we must use some initcall between subsys_initcall
1384 * and device_initcall. */
1385 fs_initcall(ssb_modinit);
1387 static void __exit ssb_modexit(void)
1390 b43_pci_ssb_bridge_exit();
1391 bus_unregister(&ssb_bustype);
1393 module_exit(ssb_modexit)