1 #ifndef __ASM_CPU_SH3_DMA_H
2 #define __ASM_CPU_SH3_DMA_H
4 #define SH_DMAC_BASE 0xa4000020
6 /* Definitions for the SuperH DMAC */
7 #define TM_BURST 0x00000020
8 #define TS_8 0x00000000
9 #define TS_16 0x00000008
10 #define TS_32 0x00000010
11 #define TS_128 0x00000018
13 #define CHCR_TS_MASK 0x18
14 #define CHCR_TS_SHIFT 3
16 #define DMAOR_INIT DMAOR_DME
19 * The SuperH DMAC supports a number of transmit sizes, we list them here,
20 * with their respective values as they appear in the CHCR registers.
29 static unsigned int ts_shift[] __attribute__ ((used)) = {
36 #endif /* __ASM_CPU_SH3_DMA_H */