2 * SBC8349E Device Tree Source
4 * Copyright 2007 Wind River Inc.
6 * Paul Gortmaker (see MAINTAINERS for contact information)
8 * -based largely on the Freescale MPC834x_MDS dts.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
20 compatible = "SBC834xE";
39 d-cache-line-size = <32>;
40 i-cache-line-size = <32>;
41 d-cache-size = <32768>;
42 i-cache-size = <32768>;
43 timebase-frequency = <0>; // from bootloader
44 bus-frequency = <0>; // from bootloader
45 clock-frequency = <0>; // from bootloader
50 device_type = "memory";
51 reg = <0x00000000 0x10000000>; // 256MB at 0
58 ranges = <0x0 0xe0000000 0x00100000>;
59 reg = <0xe0000000 0x00000200>;
63 compatible = "mpc83xx_wdt";
71 compatible = "fsl-i2c";
73 interrupts = <14 0x8>;
74 interrupt-parent = <&ipic>;
82 compatible = "fsl-i2c";
84 interrupts = <15 0x8>;
85 interrupt-parent = <&ipic>;
91 compatible = "fsl,spi";
92 reg = <0x7000 0x1000>;
93 interrupts = <16 0x8>;
94 interrupt-parent = <&ipic>;
101 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
103 ranges = <0 0x8100 0x1a8>;
104 interrupt-parent = <&ipic>;
108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
110 interrupt-parent = <&ipic>;
114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
116 interrupt-parent = <&ipic>;
120 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
122 interrupt-parent = <&ipic>;
126 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
128 interrupt-parent = <&ipic>;
133 /* phy type (ULPI or SERIAL) are only types supported for MPH */
136 compatible = "fsl-usb2-mph";
137 reg = <0x22000 0x1000>;
138 #address-cells = <1>;
140 interrupt-parent = <&ipic>;
141 interrupts = <39 0x8>;
145 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
148 compatible = "fsl-usb2-dr";
149 reg = <0x23000 0x1000>;
150 #address-cells = <1>;
152 interrupt-parent = <&ipic>;
153 interrupts = <38 0x8>;
159 #address-cells = <1>;
161 compatible = "fsl,gianfar-mdio";
162 reg = <0x24520 0x20>;
164 phy0: ethernet-phy@19 {
165 interrupt-parent = <&ipic>;
166 interrupts = <20 0x8>;
168 device_type = "ethernet-phy";
170 phy1: ethernet-phy@1a {
171 interrupt-parent = <&ipic>;
172 interrupts = <21 0x8>;
174 device_type = "ethernet-phy";
178 enet0: ethernet@24000 {
180 device_type = "network";
182 compatible = "gianfar";
183 reg = <0x24000 0x1000>;
184 local-mac-address = [ 00 00 00 00 00 00 ];
185 interrupts = <32 0x8 33 0x8 34 0x8>;
186 interrupt-parent = <&ipic>;
187 phy-handle = <&phy0>;
188 linux,network-index = <0>;
191 enet1: ethernet@25000 {
193 device_type = "network";
195 compatible = "gianfar";
196 reg = <0x25000 0x1000>;
197 local-mac-address = [ 00 00 00 00 00 00 ];
198 interrupts = <35 0x8 36 0x8 37 0x8>;
199 interrupt-parent = <&ipic>;
200 phy-handle = <&phy1>;
201 linux,network-index = <1>;
204 serial0: serial@4500 {
206 device_type = "serial";
207 compatible = "ns16550";
208 reg = <0x4500 0x100>;
209 clock-frequency = <0>;
210 interrupts = <9 0x8>;
211 interrupt-parent = <&ipic>;
214 serial1: serial@4600 {
216 device_type = "serial";
217 compatible = "ns16550";
218 reg = <0x4600 0x100>;
219 clock-frequency = <0>;
220 interrupts = <10 0x8>;
221 interrupt-parent = <&ipic>;
225 compatible = "fsl,sec2.0";
226 reg = <0x30000 0x10000>;
227 interrupts = <11 0x8>;
228 interrupt-parent = <&ipic>;
229 fsl,num-channels = <4>;
230 fsl,channel-fifo-len = <24>;
231 fsl,exec-units-mask = <0x7e>;
232 fsl,descriptor-types-mask = <0x01010ebf>;
236 * interrupts cell = <intr #, sense>
237 * sense values match linux IORESOURCE_IRQ_* defines:
238 * sense == 8: Level, low assertion
239 * sense == 2: Edge, high-to-low change
242 interrupt-controller;
243 #address-cells = <0>;
244 #interrupt-cells = <2>;
246 device_type = "ipic";
252 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
256 0x8800 0x0 0x0 0x1 &ipic 20 0x8
257 0x8800 0x0 0x0 0x2 &ipic 21 0x8
258 0x8800 0x0 0x0 0x3 &ipic 22 0x8
259 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
261 interrupt-parent = <&ipic>;
262 interrupts = <0x42 0x8>;
264 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
265 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
266 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
267 clock-frequency = <66666666>;
268 #interrupt-cells = <1>;
270 #address-cells = <3>;
271 reg = <0xe0008500 0x100>;
272 compatible = "fsl,mpc8349-pci";