Char: cyclades, remove volatiles
[linux-2.6] / include / asm-i386 / msr.h
1 #ifndef __ASM_MSR_H
2 #define __ASM_MSR_H
3
4 #include <asm/msr-index.h>
5
6 #ifdef __KERNEL__
7 #ifndef __ASSEMBLY__
8
9 #include <asm/errno.h>
10
11 static inline unsigned long long native_read_msr(unsigned int msr)
12 {
13         unsigned long long val;
14
15         asm volatile("rdmsr" : "=A" (val) : "c" (msr));
16         return val;
17 }
18
19 static inline unsigned long long native_read_msr_safe(unsigned int msr,
20                                                       int *err)
21 {
22         unsigned long long val;
23
24         asm volatile("2: rdmsr ; xorl %0,%0\n"
25                      "1:\n\t"
26                      ".section .fixup,\"ax\"\n\t"
27                      "3:  movl %3,%0 ; jmp 1b\n\t"
28                      ".previous\n\t"
29                      ".section __ex_table,\"a\"\n"
30                      "   .align 4\n\t"
31                      "   .long  2b,3b\n\t"
32                      ".previous"
33                      : "=r" (*err), "=A" (val)
34                      : "c" (msr), "i" (-EFAULT));
35
36         return val;
37 }
38
39 static inline void native_write_msr(unsigned int msr, unsigned long long val)
40 {
41         asm volatile("wrmsr" : : "c" (msr), "A"(val));
42 }
43
44 static inline int native_write_msr_safe(unsigned int msr,
45                                         unsigned long long val)
46 {
47         int err;
48         asm volatile("2: wrmsr ; xorl %0,%0\n"
49                      "1:\n\t"
50                      ".section .fixup,\"ax\"\n\t"
51                      "3:  movl %4,%0 ; jmp 1b\n\t"
52                      ".previous\n\t"
53                      ".section __ex_table,\"a\"\n"
54                      "   .align 4\n\t"
55                      "   .long  2b,3b\n\t"
56                      ".previous"
57                      : "=a" (err)
58                      : "c" (msr), "0" ((u32)val), "d" ((u32)(val>>32)),
59                        "i" (-EFAULT));
60         return err;
61 }
62
63 static inline unsigned long long native_read_tsc(void)
64 {
65         unsigned long long val;
66         asm volatile("rdtsc" : "=A" (val));
67         return val;
68 }
69
70 static inline unsigned long long native_read_pmc(void)
71 {
72         unsigned long long val;
73         asm volatile("rdpmc" : "=A" (val));
74         return val;
75 }
76
77 #ifdef CONFIG_PARAVIRT
78 #include <asm/paravirt.h>
79 #else
80
81 /*
82  * Access to machine-specific registers (available on 586 and better only)
83  * Note: the rd* operations modify the parameters directly (without using
84  * pointer indirection), this allows gcc to optimize better
85  */
86
87 #define rdmsr(msr,val1,val2)                                            \
88         do {                                                            \
89                 unsigned long long __val = native_read_msr(msr);        \
90                 val1 = __val;                                           \
91                 val2 = __val >> 32;                                     \
92         } while(0)
93
94 #define wrmsr(msr,val1,val2)                                            \
95         native_write_msr(msr, ((unsigned long long)val2 << 32) | val1)
96
97 #define rdmsrl(msr,val)                                 \
98         do {                                            \
99                 (val) = native_read_msr(msr);           \
100         } while(0)
101
102 static inline void wrmsrl (unsigned long msr, unsigned long long val)
103 {
104         unsigned long lo, hi;
105         lo = (unsigned long) val;
106         hi = val >> 32;
107         wrmsr (msr, lo, hi);
108 }
109
110 /* wrmsr with exception handling */
111 #define wrmsr_safe(msr,val1,val2)                                               \
112         (native_write_msr_safe(msr, ((unsigned long long)val2 << 32) | val1))
113
114 /* rdmsr with exception handling */
115 #define rdmsr_safe(msr,p1,p2)                                           \
116         ({                                                              \
117                 int __err;                                              \
118                 unsigned long long __val = native_read_msr_safe(msr, &__err);\
119                 (*p1) = __val;                                          \
120                 (*p2) = __val >> 32;                                    \
121                 __err;                                                  \
122         })
123
124 #define rdtsc(low,high)                                         \
125         do {                                                    \
126                 u64 _l = native_read_tsc();                     \
127                 (low) = (u32)_l;                                \
128                 (high) = _l >> 32;                              \
129         } while(0)
130
131 #define rdtscl(low)                                             \
132         do {                                                    \
133                 (low) = native_read_tsc();                      \
134         } while(0)
135
136 #define rdtscll(val) ((val) = native_read_tsc())
137
138 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
139
140 #define rdpmc(counter,low,high)                                 \
141         do {                                                    \
142                 u64 _l = native_read_pmc();                     \
143                 low = (u32)_l;                                  \
144                 high = _l >> 32;                                \
145         } while(0)
146 #endif  /* !CONFIG_PARAVIRT */
147
148 #ifdef CONFIG_SMP
149 void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
150 void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
151 #else  /*  CONFIG_SMP  */
152 static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
153 {
154         rdmsr(msr_no, *l, *h);
155 }
156 static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
157 {
158         wrmsr(msr_no, l, h);
159 }
160 #endif  /*  CONFIG_SMP  */
161 #endif
162 #endif
163 #endif /* __ASM_MSR_H */