git.oblomov.eu Git - linux-2.6/blob - drivers/media/video/saa7115.c

   1 /* saa7115 - Philips SAA7114/SAA7115 video decoder driver
   2  *
   3  * Based on saa7114 driver by Maxim Yevtyushkin, which is based on
   4  * the saa7111 driver by Dave Perks.
   5  *
   6  * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
   7  * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
   8  *
   9  * Slight changes for video timing and attachment output by
  10  * Wolfgang Scherr <scherr@net4you.net>
  11  *
  12  * Moved over to the linux >= 2.4.x i2c protocol (1/1/2003)
  13  * by Ronald Bultje <rbultje@ronald.bitfreak.net>
  14  *
  15  * Added saa7115 support by Kevin Thayer <nufan_wfk at yahoo.com>
  16  * (2/17/2003)
  17  *
  18  * VBI support (2004) and cleanups (2005) by Hans Verkuil <hverkuil@xs4all.nl>
  19  *
  20  * This program is free software; you can redistribute it and/or
  21  * modify it under the terms of the GNU General Public License
  22  * as published by the Free Software Foundation; either version 2
  23  * of the License, or (at your option) any later version.
  24  *
  25  * This program is distributed in the hope that it will be useful,
  26  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  27  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  28  * GNU General Public License for more details.
  29  *
  30  * You should have received a copy of the GNU General Public License
  31  * along with this program; if not, write to the Free Software
  32  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  33  */
  34
  35
  36 #include <linux/kernel.h>
  37 #include <linux/module.h>
  38 #include <linux/slab.h>
  39 #include <linux/i2c.h>
  40 #include <linux/videodev2.h>
  41 #include <media/v4l2-common.h>
  42
  43 MODULE_DESCRIPTION("Philips SAA7114/SAA7115 video decoder driver");
  44 MODULE_AUTHOR("Maxim Yevtyushkin, Kevin Thayer, Chris Kennedy, Hans Verkuil");
  45 MODULE_LICENSE("GPL");
  46
  47 static int debug = 0;
  48 module_param(debug, int, 0644);
  49
  50 MODULE_PARM_DESC(debug, "Debug level (0-1)");
  51
  52 #define saa7115_dbg(fmt,arg...) \
  53         do { \
  54                 if (debug) \
  55                         printk(KERN_INFO "%s debug %d-%04x: " fmt, \
  56                                client->driver->driver.name, \
  57                                i2c_adapter_id(client->adapter), client->addr , ## arg); \
  58         } while (0)
  59
  60 #define saa7115_err(fmt, arg...) do { \
  61         printk(KERN_ERR "%s %d-%04x: " fmt, client->driver->driver.name, \
  62                i2c_adapter_id(client->adapter), client->addr , ## arg); } while (0)
  63 #define saa7115_info(fmt, arg...) do { \
  64         printk(KERN_INFO "%s %d-%04x: " fmt, client->driver->driver.name, \
  65                i2c_adapter_id(client->adapter), client->addr , ## arg); } while (0)
  66
  67 static unsigned short normal_i2c[] = { 0x42 >> 1, 0x40 >> 1, I2C_CLIENT_END };
  68
  69
  70 I2C_CLIENT_INSMOD;
  71
  72 struct saa7115_state {
  73         v4l2_std_id std;
  74         int input;
  75         int enable;
  76         int bright;
  77         int contrast;
  78         int hue;
  79         int sat;
  80         enum v4l2_chip_ident ident;
  81         enum v4l2_audio_clock_freq audclk_freq;
  82 };
  83
  84 /* ----------------------------------------------------------------------- */
  85
  86 static inline int saa7115_write(struct i2c_client *client, u8 reg, u8 value)
  87 {
  88         return i2c_smbus_write_byte_data(client, reg, value);
  89 }
  90
  91 static int saa7115_writeregs(struct i2c_client *client, const unsigned char *regs)
  92 {
  93         unsigned char reg, data;
  94
  95         while (*regs != 0x00) {
  96                 reg = *(regs++);
  97                 data = *(regs++);
  98                 if (saa7115_write(client, reg, data) < 0)
  99                         return -1;
 100         }
 101         return 0;
 102 }
 103
 104 static inline int saa7115_read(struct i2c_client *client, u8 reg)
 105 {
 106         return i2c_smbus_read_byte_data(client, reg);
 107 }
 108
 109 /* ----------------------------------------------------------------------- */
 110
 111 /* If a value differs from the Hauppauge driver values, then the comment starts with
 112    'was 0xXX' to denote the Hauppauge value. Otherwise the value is identical to what the
 113    Hauppauge driver sets. */
 114
 115 static const unsigned char saa7115_init_auto_input[] = {
 116         0x01, 0x48,             /* white peak control disabled */
 117         0x03, 0x20,             /* was 0x30. 0x20: long vertical blanking */
 118         0x04, 0x90,             /* analog gain set to 0 */
 119         0x05, 0x90,             /* analog gain set to 0 */
 120         0x06, 0xeb,             /* horiz sync begin = -21 */
 121         0x07, 0xe0,             /* horiz sync stop = -17 */
 122         0x0a, 0x80,             /* was 0x88. decoder brightness, 0x80 is itu standard */
 123         0x0b, 0x44,             /* was 0x48. decoder contrast, 0x44 is itu standard */
 124         0x0c, 0x40,             /* was 0x47. decoder saturation, 0x40 is itu standard */
 125         0x0d, 0x00,             /* chrominance hue control */
 126         0x0f, 0x00,             /* chrominance gain control: use automicatic mode */
 127         0x10, 0x06,             /* chrominance/luminance control: active adaptive combfilter */
 128         0x11, 0x00,             /* delay control */
 129         0x12, 0x9d,             /* RTS0 output control: VGATE */
 130         0x13, 0x80,             /* X-port output control: ITU656 standard mode, RTCO output enable RTCE */
 131         0x14, 0x00,             /* analog/ADC/auto compatibility control */
 132         0x18, 0x40,             /* raw data gain 0x00 = nominal */
 133         0x19, 0x80,             /* raw data offset 0x80 = 0 LSB */
 134         0x1a, 0x77,             /* color killer level control 0x77 = recommended */
 135         0x1b, 0x42,             /* misc chroma control 0x42 = recommended */
 136         0x1c, 0xa9,             /* combfilter control 0xA9 = recommended */
 137         0x1d, 0x01,             /* combfilter control 0x01 = recommended */
 138         0x88, 0xd0,             /* reset device */
 139         0x88, 0xf0,             /* set device programmed, all in operational mode */
 140         0x00, 0x00
 141 };
 142
 143 static const unsigned char saa7115_cfg_reset_scaler[] = {
 144         0x87, 0x00,             /* disable I-port output */
 145         0x88, 0xd0,             /* reset scaler */
 146         0x88, 0xf0,             /* activate scaler */
 147         0x87, 0x01,             /* enable I-port output */
 148         0x00, 0x00
 149 };
 150
 151 /* ============== SAA7715 VIDEO templates =============  */
 152
 153 static const unsigned char saa7115_cfg_60hz_fullres_x[] = {
 154         0xcc, 0xd0,             /* hsize low (output), hor. output window size = 0x2d0 = 720 */
 155         0xcd, 0x02,             /* hsize hi (output) */
 156
 157         /* Why not in 60hz-Land, too? */
 158         0xd0, 0x01,             /* downscale = 1 */
 159         0xd8, 0x00,             /* hor lum scaling 0x0400 = 1 */
 160         0xd9, 0x04,
 161         0xdc, 0x00,             /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
 162         0xdd, 0x02,             /* H-scaling incr chroma */
 163
 164         0x00, 0x00
 165 };
 166 static const unsigned char saa7115_cfg_60hz_fullres_y[] = {
 167         0xce, 0xf8,             /* vsize low (output), ver. output window size = 248 (but 60hz is 240?) */
 168         0xcf, 0x00,             /* vsize hi (output) */
 169
 170         /* Why not in 60hz-Land, too? */
 171         0xd5, 0x40,             /* Lum contrast, nominal value = 0x40 */
 172         0xd6, 0x40,             /* Chroma satur. nominal value = 0x80 */
 173
 174         0xe0, 0x00,             /* V-scaling incr luma low */
 175         0xe1, 0x04,             /* " hi */
 176         0xe2, 0x00,             /* V-scaling incr chroma low */
 177         0xe3, 0x04,             /* " hi */
 178
 179         0x00, 0x00
 180 };
 181
 182 static const unsigned char saa7115_cfg_60hz_video[] = {
 183         0x80, 0x00,             /* reset tasks */
 184         0x88, 0xd0,             /* reset scaler */
 185
 186         0x15, 0x03,             /* VGATE pulse start */
 187         0x16, 0x11,             /* VGATE pulse stop */
 188         0x17, 0x9c,             /* VGATE MSB and other values */
 189
 190         0x08, 0x68,             /* 0xBO: auto detection, 0x68 = NTSC */
 191         0x0e, 0x07,             /* lots of different stuff... video autodetection is on */
 192
 193         0x5a, 0x06,             /* Vertical offset, standard 60hz value for ITU656 line counting */
 194
 195         /* Task A */
 196         0x90, 0x80,             /* Task Handling Control */
 197         0x91, 0x48,             /* X-port formats/config */
 198         0x92, 0x40,             /* Input Ref. signal Def. */
 199         0x93, 0x84,             /* I-port config */
 200         0x94, 0x01,             /* hoffset low (input), 0x0002 is minimum */
 201         0x95, 0x00,             /* hoffset hi (input) */
 202         0x96, 0xd0,             /* hsize low (input), 0x02d0 = 720 */
 203         0x97, 0x02,             /* hsize hi (input) */
 204         0x98, 0x05,             /* voffset low (input) */
 205         0x99, 0x00,             /* voffset hi (input) */
 206         0x9a, 0x0c,             /* vsize low (input), 0x0c = 12 */
 207         0x9b, 0x00,             /* vsize hi (input) */
 208         0x9c, 0xa0,             /* hsize low (output), 0x05a0 = 1440 */
 209         0x9d, 0x05,             /* hsize hi (output) */
 210         0x9e, 0x0c,             /* vsize low (output), 0x0c = 12 */
 211         0x9f, 0x00,             /* vsize hi (output) */
 212
 213         /* Task B */
 214         0xc0, 0x00,             /* Task Handling Control */
 215         0xc1, 0x08,             /* X-port formats/config */
 216         0xc2, 0x00,             /* Input Ref. signal Def. */
 217         0xc3, 0x80,             /* I-port config */
 218         0xc4, 0x02,             /* hoffset low (input), 0x0002 is minimum */
 219         0xc5, 0x00,             /* hoffset hi (input) */
 220         0xc6, 0xd0,             /* hsize low (input), 0x02d0 = 720 */
 221         0xc7, 0x02,             /* hsize hi (input) */
 222         0xc8, 0x12,             /* voffset low (input), 0x12 = 18 */
 223         0xc9, 0x00,             /* voffset hi (input) */
 224         0xca, 0xf8,             /* vsize low (input), 0xf8 = 248 */
 225         0xcb, 0x00,             /* vsize hi (input) */
 226         0xcc, 0xd0,             /* hsize low (output), 0x02d0 = 720 */
 227         0xcd, 0x02,             /* hsize hi (output) */
 228
 229         0xf0, 0xad,             /* Set PLL Register. 60hz 525 lines per frame, 27 MHz */
 230         0xf1, 0x05,             /* low bit with 0xF0 */
 231         0xf5, 0xad,             /* Set pulse generator register */
 232         0xf6, 0x01,
 233
 234         0x87, 0x00,             /* Disable I-port output */
 235         0x88, 0xd0,             /* reset scaler */
 236         0x80, 0x20,             /* Activate only task "B", continuous mode (was 0xA0) */
 237         0x88, 0xf0,             /* activate scaler */
 238         0x87, 0x01,             /* Enable I-port output */
 239         0x00, 0x00
 240 };
 241
 242 static const unsigned char saa7115_cfg_50hz_fullres_x[] = {
 243         0xcc, 0xd0,             /* hsize low (output), 720 same as 60hz */
 244         0xcd, 0x02,             /* hsize hi (output) */
 245
 246         0xd0, 0x01,             /* down scale = 1 */
 247         0xd8, 0x00,             /* hor lum scaling 0x0400 = 1 */
 248         0xd9, 0x04,
 249         0xdc, 0x00,             /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
 250         0xdd, 0x02,             /* H-scaling incr chroma */
 251
 252         0x00, 0x00
 253 };
 254 static const unsigned char saa7115_cfg_50hz_fullres_y[] = {
 255         0xce, 0x20,             /* vsize low (output), 0x0120 = 288 */
 256         0xcf, 0x01,             /* vsize hi (output) */
 257
 258         0xd5, 0x40,             /* Lum contrast, nominal value = 0x40 */
 259         0xd6, 0x40,             /* Chroma satur. nominal value = 0x80 */
 260
 261         0xe0, 0x00,             /* V-scaling incr luma low */
 262         0xe1, 0x04,             /* " hi */
 263         0xe2, 0x00,             /* V-scaling incr chroma low */
 264         0xe3, 0x04,             /* " hi */
 265
 266         0x00, 0x00
 267 };
 268
 269 static const unsigned char saa7115_cfg_50hz_video[] = {
 270         0x80, 0x00,             /* reset tasks */
 271         0x88, 0xd0,             /* reset scaler */
 272
 273         0x15, 0x37,             /* VGATE start */
 274         0x16, 0x16,             /* VGATE stop */
 275         0x17, 0x99,             /* VGATE MSB and other values */
 276
 277         0x08, 0x28,             /* 0x28 = PAL */
 278         0x0e, 0x07,             /* chrominance control 1 */
 279
 280         0x5a, 0x03,             /* Vertical offset, standard 50hz value */
 281
 282         /* Task A */
 283         0x90, 0x81,             /* Task Handling Control */
 284         0x91, 0x48,             /* X-port formats/config */
 285         0x92, 0x40,             /* Input Ref. signal Def. */
 286         0x93, 0x84,             /* I-port config */
 287         /* This is weird: the datasheet says that you should use 2 as the minimum value, */
 288         /* but Hauppauge uses 0, and changing that to 2 causes indeed problems (for 50hz) */
 289         0x94, 0x00,             /* hoffset low (input), 0x0002 is minimum */
 290         0x95, 0x00,             /* hoffset hi (input) */
 291         0x96, 0xd0,             /* hsize low (input), 0x02d0 = 720 */
 292         0x97, 0x02,             /* hsize hi (input) */
 293         0x98, 0x03,             /* voffset low (input) */
 294         0x99, 0x00,             /* voffset hi (input) */
 295         0x9a, 0x12,             /* vsize low (input), 0x12 = 18 */
 296         0x9b, 0x00,             /* vsize hi (input) */
 297         0x9c, 0xa0,             /* hsize low (output), 0x05a0 = 1440 */
 298         0x9d, 0x05,             /* hsize hi (output) */
 299         0x9e, 0x12,             /* vsize low (output), 0x12 = 18 */
 300         0x9f, 0x00,             /* vsize hi (output) */
 301
 302         /* Task B */
 303         0xc0, 0x00,             /* Task Handling Control */
 304         0xc1, 0x08,             /* X-port formats/config */
 305         0xc2, 0x00,             /* Input Ref. signal Def. */
 306         0xc3, 0x80,             /* I-port config */
 307         0xc4, 0x00,             /* hoffset low (input), 0x0002 is minimum. See comment at 0x94 above. */
 308         0xc5, 0x00,             /* hoffset hi (input) */
 309         0xc6, 0xd0,             /* hsize low (input), 0x02d0 = 720 */
 310         0xc7, 0x02,             /* hsize hi (input) */
 311         0xc8, 0x16,             /* voffset low (input), 0x16 = 22 */
 312         0xc9, 0x00,             /* voffset hi (input) */
 313         0xca, 0x20,             /* vsize low (input), 0x0120 = 288 */
 314         0xcb, 0x01,             /* vsize hi (input) */
 315         0xcc, 0xd0,             /* hsize low (output), 0x02d0 = 720 */
 316         0xcd, 0x02,             /* hsize hi (output) */
 317         0xce, 0x20,             /* vsize low (output), 0x0120 = 288 */
 318         0xcf, 0x01,             /* vsize hi (output) */
 319
 320         0xf0, 0xb0,             /* Set PLL Register. 50hz 625 lines per frame, 27 MHz */
 321         0xf1, 0x05,             /* low bit with 0xF0, (was 0x05) */
 322         0xf5, 0xb0,             /* Set pulse generator register */
 323         0xf6, 0x01,
 324
 325         0x87, 0x00,             /* Disable I-port output */
 326         0x88, 0xd0,             /* reset scaler (was 0xD0) */
 327         0x80, 0x20,             /* Activate only task "B" */
 328         0x88, 0xf0,             /* activate scaler */
 329         0x87, 0x01,             /* Enable I-port output */
 330         0x00, 0x00
 331 };
 332
 333 /* ============== SAA7715 VIDEO templates (end) =======  */
 334
 335 static const unsigned char saa7115_cfg_vbi_on[] = {
 336         0x80, 0x00,             /* reset tasks */
 337         0x88, 0xd0,             /* reset scaler */
 338         0x80, 0x30,             /* Activate both tasks */
 339         0x88, 0xf0,             /* activate scaler */
 340         0x87, 0x01,             /* Enable I-port output */
 341         0x00, 0x00
 342 };
 343
 344 static const unsigned char saa7115_cfg_vbi_off[] = {
 345         0x80, 0x00,             /* reset tasks */
 346         0x88, 0xd0,             /* reset scaler */
 347         0x80, 0x20,             /* Activate only task "B" */
 348         0x88, 0xf0,             /* activate scaler */
 349         0x87, 0x01,             /* Enable I-port output */
 350         0x00, 0x00
 351 };
 352
 353 static const unsigned char saa7115_init_misc[] = {
 354         0x38, 0x03,             /* audio stuff */
 355         0x39, 0x10,
 356         0x3a, 0x08,
 357
 358         0x81, 0x01,             /* reg 0x15,0x16 define blanking window */
 359         0x82, 0x00,
 360         0x83, 0x01,             /* I port settings */
 361         0x84, 0x20,
 362         0x85, 0x21,
 363         0x86, 0xc5,
 364         0x87, 0x01,
 365
 366         /* Task A */
 367         0xa0, 0x01,             /* down scale = 1 */
 368         0xa1, 0x00,             /* prescale accumulation length = 1 */
 369         0xa2, 0x00,             /* dc gain and fir prefilter control */
 370         0xa4, 0x80,             /* Lum Brightness, nominal value = 0x80 */
 371         0xa5, 0x40,             /* Lum contrast, nominal value = 0x40 */
 372         0xa6, 0x40,             /* Chroma satur. nominal value = 0x80 */
 373         0xa8, 0x00,             /* hor lum scaling 0x0200 = 2 zoom */
 374         0xa9, 0x02,             /* note: 2 x zoom ensures that VBI lines have same length as video lines. */
 375         0xaa, 0x00,             /* H-phase offset Luma = 0 */
 376         0xac, 0x00,             /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
 377         0xad, 0x01,             /* H-scaling incr chroma */
 378         0xae, 0x00,             /* H-phase offset chroma. must be offset luma / 2 */
 379
 380         0xb0, 0x00,             /* V-scaling incr luma low */
 381         0xb1, 0x04,             /* " hi */
 382         0xb2, 0x00,             /* V-scaling incr chroma low */
 383         0xb3, 0x04,             /* " hi */
 384         0xb4, 0x01,             /* V-scaling mode control */
 385         0xb8, 0x00,             /* V-phase offset chroma 00 */
 386         0xb9, 0x00,             /* V-phase offset chroma 01 */
 387         0xba, 0x00,             /* V-phase offset chroma 10 */
 388         0xbb, 0x00,             /* V-phase offset chroma 11 */
 389         0xbc, 0x00,             /* V-phase offset luma 00 */
 390         0xbd, 0x00,             /* V-phase offset luma 01 */
 391         0xbe, 0x00,             /* V-phase offset luma 10 */
 392         0xbf, 0x00,             /* V-phase offset luma 11 */
 393
 394         /* Task B */
 395         0xd0, 0x01,             /* down scale = 1 */
 396         0xd1, 0x00,             /* prescale accumulation length = 1 */
 397         0xd2, 0x00,             /* dc gain and fir prefilter control */
 398         0xd4, 0x80,             /* Lum Brightness, nominal value = 0x80 */
 399         0xd5, 0x40,             /* Lum contrast, nominal value = 0x40 */
 400         0xd6, 0x40,             /* Chroma satur. nominal value = 0x80 */
 401         0xd8, 0x00,             /* hor lum scaling 0x0400 = 1 */
 402         0xd9, 0x04,
 403         0xda, 0x00,             /* H-phase offset Luma = 0 */
 404         0xdc, 0x00,             /* hor chrom scaling 0x0200. must be hor lum scaling / 2 */
 405         0xdd, 0x02,             /* H-scaling incr chroma */
 406         0xde, 0x00,             /* H-phase offset chroma. must be offset luma / 2 */
 407
 408         0xe0, 0x00,             /* V-scaling incr luma low */
 409         0xe1, 0x04,             /* " hi */
 410         0xe2, 0x00,             /* V-scaling incr chroma low */
 411         0xe3, 0x04,             /* " hi */
 412         0xe4, 0x01,             /* V-scaling mode control */
 413         0xe8, 0x00,             /* V-phase offset chroma 00 */
 414         0xe9, 0x00,             /* V-phase offset chroma 01 */
 415         0xea, 0x00,             /* V-phase offset chroma 10 */
 416         0xeb, 0x00,             /* V-phase offset chroma 11 */
 417         0xec, 0x00,             /* V-phase offset luma 00 */
 418         0xed, 0x00,             /* V-phase offset luma 01 */
 419         0xee, 0x00,             /* V-phase offset luma 10 */
 420         0xef, 0x00,             /* V-phase offset luma 11 */
 421
 422         0xf2, 0x50,             /* crystal clock = 24.576 MHz, target = 27MHz */
 423         0xf3, 0x46,
 424         0xf4, 0x00,
 425         0xf7, 0x4b,             /* not the recommended settings! */
 426         0xf8, 0x00,
 427         0xf9, 0x4b,
 428         0xfa, 0x00,
 429         0xfb, 0x4b,
 430         0xff, 0x88,             /* PLL2 lock detection settings: 71 lines 50% phase error */
 431
 432         /* Turn off VBI */
 433         0x40, 0x20,             /* No framing code errors allowed. */
 434         0x41, 0xff,
 435         0x42, 0xff,
 436         0x43, 0xff,
 437         0x44, 0xff,
 438         0x45, 0xff,
 439         0x46, 0xff,
 440         0x47, 0xff,
 441         0x48, 0xff,
 442         0x49, 0xff,
 443         0x4a, 0xff,
 444         0x4b, 0xff,
 445         0x4c, 0xff,
 446         0x4d, 0xff,
 447         0x4e, 0xff,
 448         0x4f, 0xff,
 449         0x50, 0xff,
 450         0x51, 0xff,
 451         0x52, 0xff,
 452         0x53, 0xff,
 453         0x54, 0xff,
 454         0x55, 0xff,
 455         0x56, 0xff,
 456         0x57, 0xff,
 457         0x58, 0x40,
 458         0x59, 0x47,
 459         0x5b, 0x83,
 460         0x5d, 0xbd,
 461         0x5e, 0x35,
 462
 463         0x02, 0x84,             /* input tuner -> input 4, amplifier active */
 464         0x09, 0x53,             /* 0x53, was 0x56 for 60hz. luminance control */
 465
 466         0x80, 0x20,             /* enable task B */
 467         0x88, 0xd0,
 468         0x88, 0xf0,
 469         0x00, 0x00
 470 };
 471
 472 /* ============== SAA7715 AUDIO settings ============= */
 473
 474 /* 48.0 kHz */
 475 static const unsigned char saa7115_cfg_48_audio[] = {
 476         0x34, 0xce,
 477         0x35, 0xfb,
 478         0x36, 0x30,
 479         0x00, 0x00
 480 };
 481
 482 /* 44.1 kHz */
 483 static const unsigned char saa7115_cfg_441_audio[] = {
 484         0x34, 0xf2,
 485         0x35, 0x00,
 486         0x36, 0x2d,
 487         0x00, 0x00
 488 };
 489
 490 /* 32.0 kHz */
 491 static const unsigned char saa7115_cfg_32_audio[] = {
 492         0x34, 0xdf,
 493         0x35, 0xa7,
 494         0x36, 0x20,
 495         0x00, 0x00
 496 };
 497
 498 /* 48.0 kHz 60hz */
 499 static const unsigned char saa7115_cfg_60hz_48_audio[] = {
 500         0x30, 0xcd,
 501         0x31, 0x20,
 502         0x32, 0x03,
 503         0x00, 0x00
 504 };
 505
 506 /* 48.0 kHz 50hz */
 507 static const unsigned char saa7115_cfg_50hz_48_audio[] = {
 508         0x30, 0x00,
 509         0x31, 0xc0,
 510         0x32, 0x03,
 511         0x00, 0x00
 512 };
 513
 514 /* 44.1 kHz 60hz */
 515 static const unsigned char saa7115_cfg_60hz_441_audio[] = {
 516         0x30, 0xbc,
 517         0x31, 0xdf,
 518         0x32, 0x02,
 519         0x00, 0x00
 520 };
 521
 522 /* 44.1 kHz 50hz */
 523 static const unsigned char saa7115_cfg_50hz_441_audio[] = {
 524         0x30, 0x00,
 525         0x31, 0x72,
 526         0x32, 0x03,
 527         0x00, 0x00
 528 };
 529
 530 /* 32.0 kHz 60hz */
 531 static const unsigned char saa7115_cfg_60hz_32_audio[] = {
 532         0x30, 0xde,
 533         0x31, 0x15,
 534         0x32, 0x02,
 535         0x00, 0x00
 536 };
 537
 538 /* 32.0 kHz 50hz */
 539 static const unsigned char saa7115_cfg_50hz_32_audio[] = {
 540         0x30, 0x00,
 541         0x31, 0x80,
 542         0x32, 0x02,
 543         0x00, 0x00
 544 };
 545
 546 static int saa7115_odd_parity(u8 c)
 547 {
 548         c ^= (c >> 4);
 549         c ^= (c >> 2);
 550         c ^= (c >> 1);
 551
 552         return c & 1;
 553 }
 554
 555 static int saa7115_decode_vps(u8 * dst, u8 * p)
 556 {
 557         static const u8 biphase_tbl[] = {
 558                 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 559                 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 560                 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
 561                 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
 562                 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
 563                 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
 564                 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 565                 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 566                 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
 567                 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
 568                 0xc3, 0x4b, 0x43, 0xc3, 0x87, 0x0f, 0x07, 0x87,
 569                 0x83, 0x0b, 0x03, 0x83, 0xc3, 0x4b, 0x43, 0xc3,
 570                 0xc1, 0x49, 0x41, 0xc1, 0x85, 0x0d, 0x05, 0x85,
 571                 0x81, 0x09, 0x01, 0x81, 0xc1, 0x49, 0x41, 0xc1,
 572                 0xe1, 0x69, 0x61, 0xe1, 0xa5, 0x2d, 0x25, 0xa5,
 573                 0xa1, 0x29, 0x21, 0xa1, 0xe1, 0x69, 0x61, 0xe1,
 574                 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
 575                 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
 576                 0xc2, 0x4a, 0x42, 0xc2, 0x86, 0x0e, 0x06, 0x86,
 577                 0x82, 0x0a, 0x02, 0x82, 0xc2, 0x4a, 0x42, 0xc2,
 578                 0xc0, 0x48, 0x40, 0xc0, 0x84, 0x0c, 0x04, 0x84,
 579                 0x80, 0x08, 0x00, 0x80, 0xc0, 0x48, 0x40, 0xc0,
 580                 0xe0, 0x68, 0x60, 0xe0, 0xa4, 0x2c, 0x24, 0xa4,
 581                 0xa0, 0x28, 0x20, 0xa0, 0xe0, 0x68, 0x60, 0xe0,
 582                 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 583                 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 584                 0xd2, 0x5a, 0x52, 0xd2, 0x96, 0x1e, 0x16, 0x96,
 585                 0x92, 0x1a, 0x12, 0x92, 0xd2, 0x5a, 0x52, 0xd2,
 586                 0xd0, 0x58, 0x50, 0xd0, 0x94, 0x1c, 0x14, 0x94,
 587                 0x90, 0x18, 0x10, 0x90, 0xd0, 0x58, 0x50, 0xd0,
 588                 0xf0, 0x78, 0x70, 0xf0, 0xb4, 0x3c, 0x34, 0xb4,
 589                 0xb0, 0x38, 0x30, 0xb0, 0xf0, 0x78, 0x70, 0xf0,
 590         };
 591         int i;
 592         u8 c, err = 0;
 593
 594         for (i = 0; i < 2 * 13; i += 2) {
 595                 err |= biphase_tbl[p[i]] | biphase_tbl[p[i + 1]];
 596                 c = (biphase_tbl[p[i + 1]] & 0xf) | ((biphase_tbl[p[i]] & 0xf) << 4);
 597                 dst[i / 2] = c;
 598         }
 599         return err & 0xf0;
 600 }
 601
 602 static int saa7115_decode_wss(u8 * p)
 603 {
 604         static const int wss_bits[8] = {
 605                 0, 0, 0, 1, 0, 1, 1, 1
 606         };
 607         unsigned char parity;
 608         int wss = 0;
 609         int i;
 610
 611         for (i = 0; i < 16; i++) {
 612                 int b1 = wss_bits[p[i] & 7];
 613                 int b2 = wss_bits[(p[i] >> 3) & 7];
 614
 615                 if (b1 == b2)
 616                         return -1;
 617                 wss |= b2 << i;
 618         }
 619         parity = wss & 15;
 620         parity ^= parity >> 2;
 621         parity ^= parity >> 1;
 622
 623         if (!(parity & 1))
 624                 return -1;
 625
 626         return wss;
 627 }
 628
 629
 630 static int saa7115_set_audio_clock_freq(struct i2c_client *client, enum v4l2_audio_clock_freq freq)
 631 {
 632         struct saa7115_state *state = i2c_get_clientdata(client);
 633
 634         saa7115_dbg("set audio clock freq: %d\n", freq);
 635         switch (freq) {
 636                 case V4L2_AUDCLK_32_KHZ:
 637                         saa7115_writeregs(client, saa7115_cfg_32_audio);
 638                         if (state->std & V4L2_STD_525_60) {
 639                                 saa7115_writeregs(client, saa7115_cfg_60hz_32_audio);
 640                         } else {
 641                                 saa7115_writeregs(client, saa7115_cfg_50hz_32_audio);
 642                         }
 643                         break;
 644                 case V4L2_AUDCLK_441_KHZ:
 645                         saa7115_writeregs(client, saa7115_cfg_441_audio);
 646                         if (state->std & V4L2_STD_525_60) {
 647                                 saa7115_writeregs(client, saa7115_cfg_60hz_441_audio);
 648                         } else {
 649                                 saa7115_writeregs(client, saa7115_cfg_50hz_441_audio);
 650                         }
 651                         break;
 652                 case V4L2_AUDCLK_48_KHZ:
 653                         saa7115_writeregs(client, saa7115_cfg_48_audio);
 654                         if (state->std & V4L2_STD_525_60) {
 655                                 saa7115_writeregs(client, saa7115_cfg_60hz_48_audio);
 656                         } else {
 657                                 saa7115_writeregs(client, saa7115_cfg_50hz_48_audio);
 658                         }
 659                         break;
 660                 default:
 661                         saa7115_dbg("invalid audio setting %d\n", freq);
 662                         return -EINVAL;
 663         }
 664         state->audclk_freq = freq;
 665         return 0;
 666 }
 667
 668 static int saa7115_set_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
 669 {
 670         struct saa7115_state *state = i2c_get_clientdata(client);
 671
 672         switch (ctrl->id) {
 673         case V4L2_CID_BRIGHTNESS:
 674                 if (ctrl->value < 0 || ctrl->value > 255) {
 675                         saa7115_err("invalid brightness setting %d\n", ctrl->value);
 676                         return -ERANGE;
 677                 }
 678
 679                 state->bright = ctrl->value;
 680                 saa7115_write(client, 0x0a, state->bright);
 681                 break;
 682
 683         case V4L2_CID_CONTRAST:
 684                 if (ctrl->value < 0 || ctrl->value > 127) {
 685                         saa7115_err("invalid contrast setting %d\n", ctrl->value);
 686                         return -ERANGE;
 687                 }
 688
 689                 state->contrast = ctrl->value;
 690                 saa7115_write(client, 0x0b, state->contrast);
 691                 break;
 692
 693         case V4L2_CID_SATURATION:
 694                 if (ctrl->value < 0 || ctrl->value > 127) {
 695                         saa7115_err("invalid saturation setting %d\n", ctrl->value);
 696                         return -ERANGE;
 697                 }
 698
 699                 state->sat = ctrl->value;
 700                 saa7115_write(client, 0x0c, state->sat);
 701                 break;
 702
 703         case V4L2_CID_HUE:
 704                 if (ctrl->value < -127 || ctrl->value > 127) {
 705                         saa7115_err("invalid hue setting %d\n", ctrl->value);
 706                         return -ERANGE;
 707                 }
 708
 709                 state->hue = ctrl->value;
 710                 saa7115_write(client, 0x0d, state->hue);
 711                 break;
 712         }
 713
 714         return 0;
 715 }
 716
 717 static int saa7115_get_v4lctrl(struct i2c_client *client, struct v4l2_control *ctrl)
 718 {
 719         struct saa7115_state *state = i2c_get_clientdata(client);
 720
 721         switch (ctrl->id) {
 722         case V4L2_CID_BRIGHTNESS:
 723                 ctrl->value = state->bright;
 724                 break;
 725         case V4L2_CID_CONTRAST:
 726                 ctrl->value = state->contrast;
 727                 break;
 728         case V4L2_CID_SATURATION:
 729                 ctrl->value = state->sat;
 730                 break;
 731         case V4L2_CID_HUE:
 732                 ctrl->value = state->hue;
 733                 break;
 734         default:
 735                 return -EINVAL;
 736         }
 737
 738         return 0;
 739 }
 740
 741 static void saa7115_set_v4lstd(struct i2c_client *client, v4l2_std_id std)
 742 {
 743         struct saa7115_state *state = i2c_get_clientdata(client);
 744         int taskb = saa7115_read(client, 0x80) & 0x10;
 745
 746         // This works for NTSC-M, SECAM-L and the 50Hz PAL variants.
 747         if (std & V4L2_STD_525_60) {
 748                 saa7115_dbg("decoder set standard 60 Hz\n");
 749                 saa7115_writeregs(client, saa7115_cfg_60hz_video);
 750         } else {
 751                 saa7115_dbg("decoder set standard 50 Hz\n");
 752                 saa7115_writeregs(client, saa7115_cfg_50hz_video);
 753         }
 754
 755         state->std = std;
 756
 757         /* restart task B if needed */
 758         if (taskb && state->ident == V4L2_IDENT_SAA7114) {
 759                 saa7115_writeregs(client, saa7115_cfg_vbi_on);
 760         }
 761
 762         /* switch audio mode too! */
 763         saa7115_set_audio_clock_freq(client, state->audclk_freq);
 764 }
 765
 766 static v4l2_std_id saa7115_get_v4lstd(struct i2c_client *client)
 767 {
 768         struct saa7115_state *state = i2c_get_clientdata(client);
 769
 770         return state->std;
 771 }
 772
 773 static void saa7115_log_status(struct i2c_client *client)
 774 {
 775         struct saa7115_state *state = i2c_get_clientdata(client);
 776         char *audfreq = "undefined";
 777         int reg1e, reg1f;
 778         int signalOk;
 779         int vcr;
 780
 781         switch (state->audclk_freq) {
 782                 case V4L2_AUDCLK_32_KHZ:  audfreq = "32 kHz"; break;
 783                 case V4L2_AUDCLK_441_KHZ: audfreq = "44.1 kHz"; break;
 784                 case V4L2_AUDCLK_48_KHZ:  audfreq = "48 kHz"; break;
 785         }
 786
 787         saa7115_info("Audio frequency: %s\n", audfreq);
 788         if (client->name[6] == '4') {
 789                 /* status for the saa7114 */
 790                 reg1f = saa7115_read(client, 0x1f);
 791                 signalOk = (reg1f & 0xc1) == 0x81;
 792                 saa7115_info("Video signal:    %s\n", signalOk ? "ok" : "bad");
 793                 saa7115_info("Frequency:       %s\n", (reg1f & 0x20) ? "60Hz" : "50Hz");
 794                 return;
 795         }
 796
 797         /* status for the saa7115 */
 798         reg1e = saa7115_read(client, 0x1e);
 799         reg1f = saa7115_read(client, 0x1f);
 800
 801         signalOk = (reg1f & 0xc1) == 0x81 && (reg1e & 0xc0) == 0x80;
 802         vcr = !(reg1f & 0x10);
 803
 804         saa7115_info("Video signal:    %s\n", signalOk ? (vcr ? "VCR" : "broadcast/DVD") : "bad");
 805         saa7115_info("Frequency:       %s\n", (reg1f & 0x20) ? "60Hz" : "50Hz");
 806
 807         switch (reg1e & 0x03) {
 808                 case 1:
 809                         saa7115_info("Detected format: NTSC\n");
 810                         break;
 811                 case 2:
 812                         saa7115_info("Detected format: PAL\n");
 813                         break;
 814                 case 3:
 815                         saa7115_info("Detected format: SECAM\n");
 816                         break;
 817                 default:
 818                         saa7115_info("Detected format: BW/No color\n");
 819                         break;
 820         }
 821 }
 822
 823 /* setup the sliced VBI lcr registers according to the sliced VBI format */
 824 static void saa7115_set_lcr(struct i2c_client *client, struct v4l2_sliced_vbi_format *fmt)
 825 {
 826         struct saa7115_state *state = i2c_get_clientdata(client);
 827         int is_50hz = (state->std & V4L2_STD_625_50);
 828         u8 lcr[24];
 829         int i, x;
 830
 831         /* saa7114 doesn't yet support VBI */
 832         if (state->ident == V4L2_IDENT_SAA7114)
 833                 return;
 834
 835         for (i = 0; i <= 23; i++)
 836                 lcr[i] = 0xff;
 837
 838         if (fmt->service_set == 0) {
 839                 /* raw VBI */
 840                 if (is_50hz)
 841                         for (i = 6; i <= 23; i++)
 842                                 lcr[i] = 0xdd;
 843                 else
 844                         for (i = 10; i <= 21; i++)
 845                                 lcr[i] = 0xdd;
 846         } else {
 847                 /* sliced VBI */
 848                 /* first clear lines that cannot be captured */
 849                 if (is_50hz) {
 850                         for (i = 0; i <= 5; i++)
 851                                 fmt->service_lines[0][i] =
 852                                         fmt->service_lines[1][i] = 0;
 853                 }
 854                 else {
 855                         for (i = 0; i <= 9; i++)
 856                                 fmt->service_lines[0][i] =
 857                                         fmt->service_lines[1][i] = 0;
 858                         for (i = 22; i <= 23; i++)
 859                                 fmt->service_lines[0][i] =
 860                                         fmt->service_lines[1][i] = 0;
 861                 }
 862
 863                 /* Now set the lcr values according to the specified service */
 864                 for (i = 6; i <= 23; i++) {
 865                         lcr[i] = 0;
 866                         for (x = 0; x <= 1; x++) {
 867                                 switch (fmt->service_lines[1-x][i]) {
 868                                         case 0:
 869                                                 lcr[i] |= 0xf << (4 * x);
 870                                                 break;
 871                                         case V4L2_SLICED_TELETEXT_B:
 872                                                 lcr[i] |= 1 << (4 * x);
 873                                                 break;
 874                                         case V4L2_SLICED_CAPTION_525:
 875                                                 lcr[i] |= 4 << (4 * x);
 876                                                 break;
 877                                         case V4L2_SLICED_WSS_625:
 878                                                 lcr[i] |= 5 << (4 * x);
 879                                                 break;
 880                                         case V4L2_SLICED_VPS:
 881                                                 lcr[i] |= 7 << (4 * x);
 882                                                 break;
 883                                 }
 884                         }
 885                 }
 886         }
 887
 888         /* write the lcr registers */
 889         for (i = 2; i <= 23; i++) {
 890                 saa7115_write(client, i - 2 + 0x41, lcr[i]);
 891         }
 892
 893         /* enable/disable raw VBI capturing */
 894         saa7115_writeregs(client, fmt->service_set == 0 ? saa7115_cfg_vbi_on : saa7115_cfg_vbi_off);
 895 }
 896
 897 static int saa7115_get_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
 898 {
 899         static u16 lcr2vbi[] = {
 900                 0, V4L2_SLICED_TELETEXT_B, 0,   /* 1 */
 901                 0, V4L2_SLICED_CAPTION_525,     /* 4 */
 902                 V4L2_SLICED_WSS_625, 0,         /* 5 */
 903                 V4L2_SLICED_VPS, 0, 0, 0, 0,    /* 7 */
 904                 0, 0, 0, 0
 905         };
 906         struct v4l2_sliced_vbi_format *sliced = &fmt->fmt.sliced;
 907         int i;
 908
 909         if (fmt->type != V4L2_BUF_TYPE_SLICED_VBI_CAPTURE)
 910                 return -EINVAL;
 911         memset(sliced, 0, sizeof(*sliced));
 912         /* done if using raw VBI */
 913         if (saa7115_read(client, 0x80) & 0x10)
 914                 return 0;
 915         for (i = 2; i <= 23; i++) {
 916                 u8 v = saa7115_read(client, i - 2 + 0x41);
 917
 918                 sliced->service_lines[0][i] = lcr2vbi[v >> 4];
 919                 sliced->service_lines[1][i] = lcr2vbi[v & 0xf];
 920                 sliced->service_set |=
 921                         sliced->service_lines[0][i] | sliced->service_lines[1][i];
 922         }
 923         return 0;
 924 }
 925
 926 static int saa7115_set_v4lfmt(struct i2c_client *client, struct v4l2_format *fmt)
 927 {
 928         struct saa7115_state *state = i2c_get_clientdata(client);
 929         struct v4l2_pix_format *pix;
 930         int HPSC, HFSC;
 931         int VSCY, Vsrc;
 932         int is_50hz = state->std & V4L2_STD_625_50;
 933
 934         if (fmt->type == V4L2_BUF_TYPE_SLICED_VBI_CAPTURE) {
 935                 saa7115_set_lcr(client, &fmt->fmt.sliced);
 936                 return 0;
 937         }
 938         if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
 939                 return -EINVAL;
 940
 941         pix = &(fmt->fmt.pix);
 942
 943         saa7115_dbg("decoder set size\n");
 944
 945         /* FIXME need better bounds checking here */
 946         if ((pix->width < 1) || (pix->width > 1440))
 947                 return -EINVAL;
 948         if ((pix->height < 1) || (pix->height > 960))
 949                 return -EINVAL;
 950
 951         /* probably have a valid size, let's set it */
 952         /* Set output width/height */
 953         /* width */
 954         saa7115_write(client, 0xcc, (u8) (pix->width & 0xff));
 955         saa7115_write(client, 0xcd, (u8) ((pix->width >> 8) & 0xff));
 956         /* height */
 957         saa7115_write(client, 0xce, (u8) (pix->height & 0xff));
 958         saa7115_write(client, 0xcf, (u8) ((pix->height >> 8) & 0xff));
 959
 960         /* Scaling settings */
 961         /* Hprescaler is floor(inres/outres) */
 962         /* FIXME hardcoding input res */
 963         if (pix->width != 720) {
 964                 HPSC = (int)(720 / pix->width);
 965                 /* 0 is not allowed (div. by zero) */
 966                 HPSC = HPSC ? HPSC : 1;
 967                 HFSC = (int)((1024 * 720) / (HPSC * pix->width));
 968
 969                 saa7115_dbg("Hpsc: 0x%05x, Hfsc: 0x%05x\n", HPSC, HFSC);
 970                 /* FIXME hardcodes to "Task B"
 971                  * write H prescaler integer */
 972                 saa7115_write(client, 0xd0, (u8) (HPSC & 0x3f));
 973
 974                 /* write H fine-scaling (luminance) */
 975                 saa7115_write(client, 0xd8, (u8) (HFSC & 0xff));
 976                 saa7115_write(client, 0xd9, (u8) ((HFSC >> 8) & 0xff));
 977                 /* write H fine-scaling (chrominance)
 978                  * must be lum/2, so i'll just bitshift :) */
 979                 saa7115_write(client, 0xDC, (u8) ((HFSC >> 1) & 0xff));
 980                 saa7115_write(client, 0xDD, (u8) ((HFSC >> 9) & 0xff));
 981         } else {
 982                 if (is_50hz) {
 983                         saa7115_dbg("Setting full 50hz width\n");
 984                         saa7115_writeregs(client, saa7115_cfg_50hz_fullres_x);
 985                 } else {
 986                         saa7115_dbg("Setting full 60hz width\n");
 987                         saa7115_writeregs(client, saa7115_cfg_60hz_fullres_x);
 988                 }
 989         }
 990
 991         Vsrc = is_50hz ? 576 : 480;
 992
 993         if (pix->height != Vsrc) {
 994                 VSCY = (int)((1024 * Vsrc) / pix->height);
 995                 saa7115_dbg("Vsrc: %d, Vscy: 0x%05x\n", Vsrc, VSCY);
 996
 997                 /* Correct Contrast and Luminance */
 998                 saa7115_write(client, 0xd5, (u8) (64 * 1024 / VSCY));
 999                 saa7115_write(client, 0xd6, (u8) (64 * 1024 / VSCY));
1000
1001                 /* write V fine-scaling (luminance) */
1002                 saa7115_write(client, 0xe0, (u8) (VSCY & 0xff));
1003                 saa7115_write(client, 0xe1, (u8) ((VSCY >> 8) & 0xff));
1004                 /* write V fine-scaling (chrominance) */
1005                 saa7115_write(client, 0xe2, (u8) (VSCY & 0xff));
1006                 saa7115_write(client, 0xe3, (u8) ((VSCY >> 8) & 0xff));
1007         } else {
1008                 if (is_50hz) {
1009                         saa7115_dbg("Setting full 50Hz height\n");
1010                         saa7115_writeregs(client, saa7115_cfg_50hz_fullres_y);
1011                 } else {
1012                         saa7115_dbg("Setting full 60hz height\n");
1013                         saa7115_writeregs(client, saa7115_cfg_60hz_fullres_y);
1014                 }
1015         }
1016
1017         saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1018         return 0;
1019 }
1020
1021 /* Decode the sliced VBI data stream as created by the saa7115.
1022    The format is described in the saa7115 datasheet in Tables 25 and 26
1023    and in Figure 33.
1024    The current implementation uses SAV/EAV codes and not the ancillary data
1025    headers. The vbi->p pointer points to the SDID byte right after the SAV
1026    code. */
1027 static void saa7115_decode_vbi_line(struct i2c_client *client,
1028                                     struct v4l2_decode_vbi_line *vbi)
1029 {
1030         static const char vbi_no_data_pattern[] = {
1031                 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0xa0
1032         };
1033         struct saa7115_state *state = i2c_get_clientdata(client);
1034         u8 *p = vbi->p;
1035         u32 wss;
1036         int id1, id2;   /* the ID1 and ID2 bytes from the internal header */
1037
1038         vbi->type = 0;  /* mark result as a failure */
1039         id1 = p[2];
1040         id2 = p[3];
1041         /* Note: the field bit is inverted for 60 Hz video */
1042         if (state->std & V4L2_STD_525_60)
1043                 id1 ^= 0x40;
1044
1045         /* Skip internal header, p now points to the start of the payload */
1046         p += 4;
1047         vbi->p = p;
1048
1049         /* calculate field and line number of the VBI packet (1-23) */
1050         vbi->is_second_field = ((id1 & 0x40) != 0);
1051         vbi->line = (id1 & 0x3f) << 3;
1052         vbi->line |= (id2 & 0x70) >> 4;
1053
1054         /* Obtain data type */
1055         id2 &= 0xf;
1056
1057         /* If the VBI slicer does not detect any signal it will fill up
1058            the payload buffer with 0xa0 bytes. */
1059         if (!memcmp(p, vbi_no_data_pattern, sizeof(vbi_no_data_pattern)))
1060                 return;
1061
1062         /* decode payloads */
1063         switch (id2) {
1064         case 1:
1065                 vbi->type = V4L2_SLICED_TELETEXT_B;
1066                 break;
1067         case 4:
1068                 if (!saa7115_odd_parity(p[0]) || !saa7115_odd_parity(p[1]))
1069                         return;
1070                 vbi->type = V4L2_SLICED_CAPTION_525;
1071                 break;
1072         case 5:
1073                 wss = saa7115_decode_wss(p);
1074                 if (wss == -1)
1075                         return;
1076                 p[0] = wss & 0xff;
1077                 p[1] = wss >> 8;
1078                 vbi->type = V4L2_SLICED_WSS_625;
1079                 break;
1080         case 7:
1081                 if (saa7115_decode_vps(p, p) != 0)
1082                         return;
1083                 vbi->type = V4L2_SLICED_VPS;
1084                 break;
1085         default:
1086                 return;
1087         }
1088 }
1089
1090 /* ============ SAA7115 AUDIO settings (end) ============= */
1091
1092 static int saa7115_command(struct i2c_client *client, unsigned int cmd, void *arg)
1093 {
1094         struct saa7115_state *state = i2c_get_clientdata(client);
1095         int *iarg = arg;
1096
1097         /* ioctls to allow direct access to the saa7115 registers for testing */
1098         switch (cmd) {
1099         case VIDIOC_S_FMT:
1100                 return saa7115_set_v4lfmt(client, (struct v4l2_format *)arg);
1101
1102         case VIDIOC_G_FMT:
1103                 return saa7115_get_v4lfmt(client, (struct v4l2_format *)arg);
1104
1105         case VIDIOC_INT_AUDIO_CLOCK_FREQ:
1106                 return saa7115_set_audio_clock_freq(client, *(enum v4l2_audio_clock_freq *)arg);
1107
1108         case VIDIOC_G_TUNER:
1109         {
1110                 struct v4l2_tuner *vt = arg;
1111                 int status;
1112
1113                 status = saa7115_read(client, 0x1f);
1114
1115                 saa7115_dbg("status: 0x%02x\n", status);
1116                 vt->signal = ((status & (1 << 6)) == 0) ? 0xffff : 0x0;
1117                 break;
1118         }
1119
1120         case VIDIOC_LOG_STATUS:
1121                 saa7115_log_status(client);
1122                 break;
1123
1124         case VIDIOC_G_CTRL:
1125                 return saa7115_get_v4lctrl(client, (struct v4l2_control *)arg);
1126
1127         case VIDIOC_S_CTRL:
1128                 return saa7115_set_v4lctrl(client, (struct v4l2_control *)arg);
1129
1130         case VIDIOC_G_STD:
1131                 *(v4l2_std_id *)arg = saa7115_get_v4lstd(client);
1132                 break;
1133
1134         case VIDIOC_S_STD:
1135                 saa7115_set_v4lstd(client, *(v4l2_std_id *)arg);
1136                 break;
1137
1138         case VIDIOC_G_INPUT:
1139                 *(int *)arg = state->input;
1140                 break;
1141
1142         case VIDIOC_S_INPUT:
1143                 saa7115_dbg("decoder set input %d\n", *iarg);
1144                 /* inputs from 0-9 are available */
1145                 if (*iarg < 0 || *iarg > 9) {
1146                         return -EINVAL;
1147                 }
1148
1149                 if (state->input == *iarg)
1150                         break;
1151                 saa7115_dbg("now setting %s input\n",
1152                         *iarg >= 6 ? "S-Video" : "Composite");
1153                 state->input = *iarg;
1154
1155                 /* select mode */
1156                 saa7115_write(client, 0x02,
1157                               (saa7115_read(client, 0x02) & 0xf0) |
1158                                state->input);
1159
1160                 /* bypass chrominance trap for modes 6..9 */
1161                 saa7115_write(client, 0x09,
1162                               (saa7115_read(client, 0x09) & 0x7f) |
1163                                (state->input < 6 ? 0x0 : 0x80));
1164                 break;
1165
1166         case VIDIOC_STREAMON:
1167         case VIDIOC_STREAMOFF:
1168                 saa7115_dbg("%s output\n",
1169                         (cmd == VIDIOC_STREAMON) ? "enable" : "disable");
1170
1171                 if (state->enable != (cmd == VIDIOC_STREAMON)) {
1172                         state->enable = (cmd == VIDIOC_STREAMON);
1173                         saa7115_write(client, 0x87, state->enable);
1174                 }
1175                 break;
1176
1177         case VIDIOC_INT_DECODE_VBI_LINE:
1178                 saa7115_decode_vbi_line(client, arg);
1179                 break;
1180
1181         case VIDIOC_INT_RESET:
1182                 saa7115_dbg("decoder RESET\n");
1183                 saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1184                 break;
1185
1186         case VIDIOC_INT_G_VBI_DATA:
1187         {
1188                 struct v4l2_sliced_vbi_data *data = arg;
1189
1190                 switch (data->id) {
1191                 case V4L2_SLICED_WSS_625:
1192                         if (saa7115_read(client, 0x6b) & 0xc0)
1193                                 return -EIO;
1194                         data->data[0] = saa7115_read(client, 0x6c);
1195                         data->data[1] = saa7115_read(client, 0x6d);
1196                         return 0;
1197                 case V4L2_SLICED_CAPTION_525:
1198                         if (data->field == 0) {
1199                                 /* CC */
1200                                 if (saa7115_read(client, 0x66) & 0xc0)
1201                                         return -EIO;
1202                                 data->data[0] = saa7115_read(client, 0x67);
1203                                 data->data[1] = saa7115_read(client, 0x68);
1204                                 return 0;
1205                         }
1206                         /* XDS */
1207                         if (saa7115_read(client, 0x66) & 0x30)
1208                                 return -EIO;
1209                         data->data[0] = saa7115_read(client, 0x69);
1210                         data->data[1] = saa7115_read(client, 0x6a);
1211                         return 0;
1212                 default:
1213                         return -EINVAL;
1214                 }
1215                 break;
1216         }
1217
1218 #ifdef CONFIG_VIDEO_ADV_DEBUG
1219         case VIDIOC_INT_G_REGISTER:
1220         {
1221                 struct v4l2_register *reg = arg;
1222
1223                 if (reg->i2c_id != I2C_DRIVERID_SAA711X)
1224                         return -EINVAL;
1225                 reg->val = saa7115_read(client, reg->reg & 0xff);
1226                 break;
1227         }
1228
1229         case VIDIOC_INT_S_REGISTER:
1230         {
1231                 struct v4l2_register *reg = arg;
1232
1233                 if (reg->i2c_id != I2C_DRIVERID_SAA711X)
1234                         return -EINVAL;
1235                 if (!capable(CAP_SYS_ADMIN))
1236                         return -EPERM;
1237                 saa7115_write(client, reg->reg & 0xff, reg->val & 0xff);
1238                 break;
1239         }
1240 #endif
1241
1242         case VIDIOC_INT_G_CHIP_IDENT:
1243                 *iarg = state->ident;
1244                 break;
1245
1246         default:
1247                 return -EINVAL;
1248         }
1249
1250         return 0;
1251 }
1252
1253 /* ----------------------------------------------------------------------- */
1254
1255 static struct i2c_driver i2c_driver_saa7115;
1256
1257 static int saa7115_attach(struct i2c_adapter *adapter, int address, int kind)
1258 {
1259         struct i2c_client *client;
1260         struct saa7115_state *state;
1261         u8 chip_id;
1262
1263         /* Check if the adapter supports the needed features */
1264         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1265                 return 0;
1266
1267         client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
1268         if (client == 0)
1269                 return -ENOMEM;
1270         memset(client, 0, sizeof(struct i2c_client));
1271         client->addr = address;
1272         client->adapter = adapter;
1273         client->driver = &i2c_driver_saa7115;
1274         snprintf(client->name, sizeof(client->name) - 1, "saa7115");
1275
1276         saa7115_dbg("detecting saa7115 client on address 0x%x\n", address << 1);
1277
1278         saa7115_write(client, 0, 5);
1279         chip_id = saa7115_read(client, 0) & 0x0f;
1280         if (chip_id != 4 && chip_id != 5) {
1281                 saa7115_dbg("saa7115 not found\n");
1282                 kfree(client);
1283                 return 0;
1284         }
1285         if (chip_id == 4) {
1286                 snprintf(client->name, sizeof(client->name) - 1, "saa7114");
1287         }
1288         saa7115_info("saa711%d found @ 0x%x (%s)\n", chip_id, address << 1, adapter->name);
1289
1290         state = kmalloc(sizeof(struct saa7115_state), GFP_KERNEL);
1291         i2c_set_clientdata(client, state);
1292         if (state == NULL) {
1293                 kfree(client);
1294                 return -ENOMEM;
1295         }
1296         memset(state, 0, sizeof(struct saa7115_state));
1297         state->std = V4L2_STD_NTSC;
1298         state->input = -1;
1299         state->enable = 1;
1300         state->bright = 128;
1301         state->contrast = 64;
1302         state->hue = 0;
1303         state->sat = 64;
1304         state->ident = (chip_id == 4) ? V4L2_IDENT_SAA7114 : V4L2_IDENT_SAA7115;
1305         state->audclk_freq = V4L2_AUDCLK_48_KHZ;
1306
1307         saa7115_dbg("writing init values\n");
1308
1309         /* init to 60hz/48khz */
1310         saa7115_writeregs(client, saa7115_init_auto_input);
1311         saa7115_writeregs(client, saa7115_init_misc);
1312         saa7115_writeregs(client, saa7115_cfg_60hz_fullres_x);
1313         saa7115_writeregs(client, saa7115_cfg_60hz_fullres_y);
1314         saa7115_writeregs(client, saa7115_cfg_60hz_video);
1315         saa7115_writeregs(client, saa7115_cfg_48_audio);
1316         saa7115_writeregs(client, saa7115_cfg_60hz_48_audio);
1317         saa7115_writeregs(client, saa7115_cfg_reset_scaler);
1318
1319         i2c_attach_client(client);
1320
1321         saa7115_dbg("status: (1E) 0x%02x, (1F) 0x%02x\n",
1322                 saa7115_read(client, 0x1e), saa7115_read(client, 0x1f));
1323
1324         return 0;
1325 }
1326
1327 static int saa7115_probe(struct i2c_adapter *adapter)
1328 {
1329 #ifdef I2C_CLASS_TV_ANALOG
1330         if (adapter->class & I2C_CLASS_TV_ANALOG)
1331 #else
1332         if (adapter->id == I2C_HW_B_BT848)
1333 #endif
1334                 return i2c_probe(adapter, &addr_data, &saa7115_attach);
1335         return 0;
1336 }
1337
1338 static int saa7115_detach(struct i2c_client *client)
1339 {
1340         struct saa7115_state *state = i2c_get_clientdata(client);
1341         int err;
1342
1343         err = i2c_detach_client(client);
1344         if (err) {
1345                 return err;
1346         }
1347
1348         kfree(state);
1349         kfree(client);
1350         return 0;
1351 }
1352
1353 /* ----------------------------------------------------------------------- */
1354
1355 /* i2c implementation */
1356 static struct i2c_driver i2c_driver_saa7115 = {
1357         .driver = {
1358                 .name = "saa7115",
1359         },
1360         .id = I2C_DRIVERID_SAA711X,
1361         .attach_adapter = saa7115_probe,
1362         .detach_client = saa7115_detach,
1363         .command = saa7115_command,
1364 };
1365
1366
1367 static int __init saa7115_init_module(void)
1368 {
1369         return i2c_add_driver(&i2c_driver_saa7115);
1370 }
1371
1372 static void __exit saa7115_cleanup_module(void)
1373 {
1374         i2c_del_driver(&i2c_driver_saa7115);
1375 }
1376
1377 module_init(saa7115_init_module);
1378 module_exit(saa7115_cleanup_module);