1 /* $Id: bkm_a4t.c,v 1.22.2.4 2004/01/14 16:04:48 keil Exp $
3 * low level stuff for T-Berkom A4T
5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference.
14 #include <linux/init.h>
20 #include <linux/pci.h>
23 extern const char *CardType[];
25 static const char *bkm_a4t_revision = "$Revision: 1.22.2.4 $";
29 readreg(unsigned int ale, unsigned long adr, u_char off)
32 unsigned int *po = (unsigned int *) adr; /* Postoffice */
34 *po = (GCS_2 | PO_WRITE | off);
36 *po = (ale | PO_READ);
39 return ((unsigned char) ret);
44 readfifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size)
47 for (i = 0; i < size; i++)
48 *data++ = readreg(ale, adr, off);
53 writereg(unsigned int ale, unsigned long adr, u_char off, u_char data)
55 unsigned int *po = (unsigned int *) adr; /* Postoffice */
56 *po = (GCS_2 | PO_WRITE | off);
58 *po = (ale | PO_WRITE | data);
64 writefifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size)
68 for (i = 0; i < size; i++)
69 writereg(ale, adr, off, *data++);
73 /* Interface functions */
76 ReadISAC(struct IsdnCardState *cs, u_char offset)
78 return (readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset));
82 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
84 writereg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset, value);
88 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
90 readfifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
94 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
96 writefifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
100 ReadJADE(struct IsdnCardState *cs, int jade, u_char offset)
102 return (readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80))));
106 WriteJADE(struct IsdnCardState *cs, int jade, u_char offset, u_char value)
108 writereg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)), value);
112 * fast interrupt JADE stuff goes here
115 #define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale,\
116 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)))
117 #define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale,\
118 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data)
120 #define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale,\
121 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
122 #define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo( cs->hw.ax.jade_ale,\
123 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
125 #include "jade_irq.c"
128 bkm_interrupt(int intno, void *dev_id, struct pt_regs *regs)
130 struct IsdnCardState *cs = dev_id;
133 I20_REGISTER_FILE *pI20_Regs;
135 spin_lock_irqsave(&cs->lock, flags);
136 pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base);
138 /* ISDN interrupt pending? */
139 if (pI20_Regs->i20IntStatus & intISDN) {
140 /* Reset the ISDN interrupt */
141 pI20_Regs->i20IntStatus = intISDN;
142 /* Disable ISDN interrupt */
143 pI20_Regs->i20IntCtrl &= ~intISDN;
144 /* Channel A first */
145 val = readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, jade_HDLC_ISR + 0x80);
147 jade_int_main(cs, val, 0);
150 val = readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, jade_HDLC_ISR + 0xC0);
152 jade_int_main(cs, val, 1);
155 val = readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, ISAC_ISTA);
157 isac_interrupt(cs, val);
159 /* Reenable ISDN interrupt */
160 pI20_Regs->i20IntCtrl |= intISDN;
161 spin_unlock_irqrestore(&cs->lock, flags);
164 spin_unlock_irqrestore(&cs->lock, flags);
170 release_io_bkm(struct IsdnCardState *cs)
172 if (cs->hw.ax.base) {
173 iounmap((void *) cs->hw.ax.base);
179 enable_bkm_int(struct IsdnCardState *cs, unsigned bEnable)
181 if (cs->typ == ISDN_CTYPE_BKM_A4T) {
182 I20_REGISTER_FILE *pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base);
184 pI20_Regs->i20IntCtrl |= (intISDN | intPCI);
186 /* CAUTION: This disables the video capture driver too */
187 pI20_Regs->i20IntCtrl &= ~(intISDN | intPCI);
192 reset_bkm(struct IsdnCardState *cs)
194 if (cs->typ == ISDN_CTYPE_BKM_A4T) {
195 I20_REGISTER_FILE *pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base);
196 /* Issue the I20 soft reset */
197 pI20_Regs->i20SysControl = 0xFF; /* all in */
199 /* Remove the soft reset */
200 pI20_Regs->i20SysControl = sysRESET | 0xFF;
202 /* Set our configuration */
203 pI20_Regs->i20SysControl = sysRESET | sysCFG;
204 /* Issue ISDN reset */
205 pI20_Regs->i20GuestControl = guestWAIT_CFG |
213 /* Remove RESET state from ISDN */
214 pI20_Regs->i20GuestControl &= ~(g_A4T_ISAC_RES |
222 BKM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
229 spin_lock_irqsave(&cs->lock, flags);
230 enable_bkm_int(cs, 0);
232 spin_unlock_irqrestore(&cs->lock, flags);
236 spin_lock_irqsave(&cs->lock, flags);
237 enable_bkm_int(cs, 0);
239 spin_unlock_irqrestore(&cs->lock, flags);
243 spin_lock_irqsave(&cs->lock, flags);
244 clear_pending_isac_ints(cs);
245 clear_pending_jade_ints(cs);
249 enable_bkm_int(cs, 1);
250 spin_unlock_irqrestore(&cs->lock, flags);
258 static struct pci_dev *dev_a4t __devinitdata = NULL;
261 setup_bkm_a4t(struct IsdnCard *card)
263 struct IsdnCardState *cs = card->cs;
265 u_int pci_memaddr = 0, found = 0;
266 I20_REGISTER_FILE *pI20_Regs;
270 strcpy(tmp, bkm_a4t_revision);
271 printk(KERN_INFO "HiSax: T-Berkom driver Rev. %s\n", HiSax_getrev(tmp));
272 if (cs->typ == ISDN_CTYPE_BKM_A4T) {
273 cs->subtyp = BKM_A4T;
278 while ((dev_a4t = pci_find_device(PCI_VENDOR_ID_ZORAN,
279 PCI_DEVICE_ID_ZORAN_36120, dev_a4t))) {
283 sub_vendor = dev_a4t->subsystem_vendor;
284 sub_sys = dev_a4t->subsystem_device;
285 if ((sub_sys == PCI_DEVICE_ID_BERKOM_A4T) && (sub_vendor == PCI_VENDOR_ID_BERKOM)) {
286 if (pci_enable_device(dev_a4t))
289 pci_memaddr = pci_resource_start(dev_a4t, 0);
290 cs->irq = dev_a4t->irq;
295 printk(KERN_WARNING "HiSax: %s: Card not found\n", CardType[card->typ]);
298 if (!cs->irq) { /* IRQ range check ?? */
299 printk(KERN_WARNING "HiSax: %s: No IRQ\n", CardType[card->typ]);
303 printk(KERN_WARNING "HiSax: %s: No Memory base address\n", CardType[card->typ]);
306 cs->hw.ax.base = (long) ioremap(pci_memaddr, 4096);
307 /* Check suspecious address */
308 pI20_Regs = (I20_REGISTER_FILE *) (cs->hw.ax.base);
309 if ((pI20_Regs->i20IntStatus & 0x8EFFFFFF) != 0) {
310 printk(KERN_WARNING "HiSax: %s address %lx-%lx suspecious\n",
311 CardType[card->typ], cs->hw.ax.base, cs->hw.ax.base + 4096);
312 iounmap((void *) cs->hw.ax.base);
316 cs->hw.ax.isac_adr = cs->hw.ax.base + PO_OFFSET;
317 cs->hw.ax.jade_adr = cs->hw.ax.base + PO_OFFSET;
318 cs->hw.ax.isac_ale = GCS_1;
319 cs->hw.ax.jade_ale = GCS_3;
321 printk(KERN_WARNING "HiSax: %s: NO_PCI_BIOS\n", CardType[card->typ]);
322 printk(KERN_WARNING "HiSax: %s: unable to configure\n", CardType[card->typ]);
324 #endif /* CONFIG_PCI */
325 printk(KERN_INFO "HiSax: %s: Card configured at 0x%lX IRQ %d\n",
326 CardType[card->typ], cs->hw.ax.base, cs->irq);
329 cs->readisac = &ReadISAC;
330 cs->writeisac = &WriteISAC;
331 cs->readisacfifo = &ReadISACfifo;
332 cs->writeisacfifo = &WriteISACfifo;
333 cs->BC_Read_Reg = &ReadJADE;
334 cs->BC_Write_Reg = &WriteJADE;
335 cs->BC_Send_Data = &jade_fill_fifo;
336 cs->cardmsg = &BKM_card_msg;
337 cs->irq_func = &bkm_interrupt;
338 cs->irq_flags |= IRQF_SHARED;
339 ISACVersion(cs, "Telekom A4T:");
341 JadeVersion(cs, "Telekom A4T:");