2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
27 #include <linux/mmc/host.h>
28 #include <linux/atmel-mci.h>
31 #include <asm/unaligned.h>
33 #include <mach/board.h>
35 #include "atmel-mci-regs.h"
37 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38 #define ATMCI_DMA_THRESHOLD 16
41 EVENT_CMD_COMPLETE = 0,
47 enum atmel_mci_state {
56 struct atmel_mci_dma {
57 #ifdef CONFIG_MMC_ATMELMCI_DMA
58 struct dma_chan *chan;
59 struct dma_async_tx_descriptor *data_desc;
64 * struct atmel_mci - MMC controller state shared between all slots
65 * @lock: Spinlock protecting the queue and associated data.
66 * @regs: Pointer to MMIO registers.
67 * @sg: Scatterlist entry currently being processed by PIO code, if any.
68 * @pio_offset: Offset into the current scatterlist entry.
69 * @cur_slot: The slot which is currently using the controller.
70 * @mrq: The request currently being processed on @cur_slot,
71 * or NULL if the controller is idle.
72 * @cmd: The command currently being sent to the card, or NULL.
73 * @data: The data currently being transferred, or NULL if no data
74 * transfer is in progress.
75 * @dma: DMA client state.
76 * @data_chan: DMA channel being used for the current data transfer.
77 * @cmd_status: Snapshot of SR taken upon completion of the current
78 * command. Only valid when EVENT_CMD_COMPLETE is pending.
79 * @data_status: Snapshot of SR taken upon completion of the current
80 * data transfer. Only valid when EVENT_DATA_COMPLETE or
81 * EVENT_DATA_ERROR is pending.
82 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
84 * @tasklet: Tasklet running the request state machine.
85 * @pending_events: Bitmask of events flagged by the interrupt handler
86 * to be processed by the tasklet.
87 * @completed_events: Bitmask of events which the state machine has
89 * @state: Tasklet state.
90 * @queue: List of slots waiting for access to the controller.
91 * @need_clock_update: Update the clock rate before the next request.
92 * @need_reset: Reset controller before next request.
93 * @mode_reg: Value of the MR register.
94 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
95 * rate and timeout calculations.
96 * @mapbase: Physical address of the MMIO registers.
97 * @mck: The peripheral bus clock hooked up to the MMC controller.
98 * @pdev: Platform device associated with the MMC controller.
99 * @slot: Slots sharing this MMC controller.
104 * @lock is a softirq-safe spinlock protecting @queue as well as
105 * @cur_slot, @mrq and @state. These must always be updated
106 * at the same time while holding @lock.
108 * @lock also protects mode_reg and need_clock_update since these are
109 * used to synchronize mode register updates with the queue
112 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
113 * and must always be written at the same time as the slot is added to
116 * @pending_events and @completed_events are accessed using atomic bit
117 * operations, so they don't need any locking.
119 * None of the fields touched by the interrupt handler need any
120 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
121 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
122 * interrupts must be disabled and @data_status updated with a
123 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
124 * CMDRDY interupt must be disabled and @cmd_status updated with a
125 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
126 * bytes_xfered field of @data must be written. This is ensured by
133 struct scatterlist *sg;
134 unsigned int pio_offset;
136 struct atmel_mci_slot *cur_slot;
137 struct mmc_request *mrq;
138 struct mmc_command *cmd;
139 struct mmc_data *data;
141 struct atmel_mci_dma dma;
142 struct dma_chan *data_chan;
148 struct tasklet_struct tasklet;
149 unsigned long pending_events;
150 unsigned long completed_events;
151 enum atmel_mci_state state;
152 struct list_head queue;
154 bool need_clock_update;
157 unsigned long bus_hz;
158 unsigned long mapbase;
160 struct platform_device *pdev;
162 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
166 * struct atmel_mci_slot - MMC slot state
167 * @mmc: The mmc_host representing this slot.
168 * @host: The MMC controller this slot is using.
169 * @sdc_reg: Value of SDCR to be written before using this slot.
170 * @mrq: mmc_request currently being processed or waiting to be
171 * processed, or NULL when the slot is idle.
172 * @queue_node: List node for placing this node in the @queue list of
174 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
175 * @flags: Random state bits associated with the slot.
176 * @detect_pin: GPIO pin used for card detection, or negative if not
178 * @wp_pin: GPIO pin used for card write protect sending, or negative
180 * @detect_is_active_high: The state of the detect pin when it is active.
181 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
183 struct atmel_mci_slot {
184 struct mmc_host *mmc;
185 struct atmel_mci *host;
189 struct mmc_request *mrq;
190 struct list_head queue_node;
194 #define ATMCI_CARD_PRESENT 0
195 #define ATMCI_CARD_NEED_INIT 1
196 #define ATMCI_SHUTDOWN 2
200 bool detect_is_active_high;
202 struct timer_list detect_timer;
205 #define atmci_test_and_clear_pending(host, event) \
206 test_and_clear_bit(event, &host->pending_events)
207 #define atmci_set_completed(host, event) \
208 set_bit(event, &host->completed_events)
209 #define atmci_set_pending(host, event) \
210 set_bit(event, &host->pending_events)
213 * The debugfs stuff below is mostly optimized away when
214 * CONFIG_DEBUG_FS is not set.
216 static int atmci_req_show(struct seq_file *s, void *v)
218 struct atmel_mci_slot *slot = s->private;
219 struct mmc_request *mrq;
220 struct mmc_command *cmd;
221 struct mmc_command *stop;
222 struct mmc_data *data;
224 /* Make sure we get a consistent snapshot */
225 spin_lock_bh(&slot->host->lock);
235 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
236 cmd->opcode, cmd->arg, cmd->flags,
237 cmd->resp[0], cmd->resp[1], cmd->resp[2],
238 cmd->resp[2], cmd->error);
240 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
241 data->bytes_xfered, data->blocks,
242 data->blksz, data->flags, data->error);
245 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
246 stop->opcode, stop->arg, stop->flags,
247 stop->resp[0], stop->resp[1], stop->resp[2],
248 stop->resp[2], stop->error);
251 spin_unlock_bh(&slot->host->lock);
256 static int atmci_req_open(struct inode *inode, struct file *file)
258 return single_open(file, atmci_req_show, inode->i_private);
261 static const struct file_operations atmci_req_fops = {
262 .owner = THIS_MODULE,
263 .open = atmci_req_open,
266 .release = single_release,
269 static void atmci_show_status_reg(struct seq_file *s,
270 const char *regname, u32 value)
272 static const char *sr_bit[] = {
293 seq_printf(s, "%s:\t0x%08x", regname, value);
294 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
295 if (value & (1 << i)) {
297 seq_printf(s, " %s", sr_bit[i]);
299 seq_puts(s, " UNKNOWN");
305 static int atmci_regs_show(struct seq_file *s, void *v)
307 struct atmel_mci *host = s->private;
310 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
315 * Grab a more or less consistent snapshot. Note that we're
316 * not disabling interrupts, so IMR and SR may not be
319 spin_lock_bh(&host->lock);
320 clk_enable(host->mck);
321 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
322 clk_disable(host->mck);
323 spin_unlock_bh(&host->lock);
325 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
327 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
328 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
329 buf[MCI_MR / 4] & 0xff);
330 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
331 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
332 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
333 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
335 buf[MCI_BLKR / 4] & 0xffff,
336 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
338 /* Don't read RSPR and RDR; it will consume the data there */
340 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
341 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
348 static int atmci_regs_open(struct inode *inode, struct file *file)
350 return single_open(file, atmci_regs_show, inode->i_private);
353 static const struct file_operations atmci_regs_fops = {
354 .owner = THIS_MODULE,
355 .open = atmci_regs_open,
358 .release = single_release,
361 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
363 struct mmc_host *mmc = slot->mmc;
364 struct atmel_mci *host = slot->host;
368 root = mmc->debugfs_root;
372 node = debugfs_create_file("regs", S_IRUSR, root, host,
379 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
383 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
387 node = debugfs_create_x32("pending_events", S_IRUSR, root,
388 (u32 *)&host->pending_events);
392 node = debugfs_create_x32("completed_events", S_IRUSR, root,
393 (u32 *)&host->completed_events);
400 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
403 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
406 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
409 static void atmci_set_timeout(struct atmel_mci *host,
410 struct atmel_mci_slot *slot, struct mmc_data *data)
412 static unsigned dtomul_to_shift[] = {
413 0, 4, 7, 8, 10, 12, 16, 20
419 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
421 for (dtomul = 0; dtomul < 8; dtomul++) {
422 unsigned shift = dtomul_to_shift[dtomul];
423 dtocyc = (timeout + (1 << shift) - 1) >> shift;
433 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
434 dtocyc << dtomul_to_shift[dtomul]);
435 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
439 * Return mask with command flags to be enabled for this command.
441 static u32 atmci_prepare_command(struct mmc_host *mmc,
442 struct mmc_command *cmd)
444 struct mmc_data *data;
447 cmd->error = -EINPROGRESS;
449 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
451 if (cmd->flags & MMC_RSP_PRESENT) {
452 if (cmd->flags & MMC_RSP_136)
453 cmdr |= MCI_CMDR_RSPTYP_136BIT;
455 cmdr |= MCI_CMDR_RSPTYP_48BIT;
459 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
460 * it's too difficult to determine whether this is an ACMD or
461 * not. Better make it 64.
463 cmdr |= MCI_CMDR_MAXLAT_64CYC;
465 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
466 cmdr |= MCI_CMDR_OPDCMD;
470 cmdr |= MCI_CMDR_START_XFER;
471 if (data->flags & MMC_DATA_STREAM)
472 cmdr |= MCI_CMDR_STREAM;
473 else if (data->blocks > 1)
474 cmdr |= MCI_CMDR_MULTI_BLOCK;
476 cmdr |= MCI_CMDR_BLOCK;
478 if (data->flags & MMC_DATA_READ)
479 cmdr |= MCI_CMDR_TRDIR_READ;
485 static void atmci_start_command(struct atmel_mci *host,
486 struct mmc_command *cmd, u32 cmd_flags)
491 dev_vdbg(&host->pdev->dev,
492 "start command: ARGR=0x%08x CMDR=0x%08x\n",
493 cmd->arg, cmd_flags);
495 mci_writel(host, ARGR, cmd->arg);
496 mci_writel(host, CMDR, cmd_flags);
499 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
501 atmci_start_command(host, data->stop, host->stop_cmdr);
502 mci_writel(host, IER, MCI_CMDRDY);
505 #ifdef CONFIG_MMC_ATMELMCI_DMA
506 static void atmci_dma_cleanup(struct atmel_mci *host)
508 struct mmc_data *data = host->data;
510 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
511 ((data->flags & MMC_DATA_WRITE)
512 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
515 static void atmci_stop_dma(struct atmel_mci *host)
517 struct dma_chan *chan = host->data_chan;
520 chan->device->device_terminate_all(chan);
521 atmci_dma_cleanup(host);
523 /* Data transfer was stopped by the interrupt handler */
524 atmci_set_pending(host, EVENT_XFER_COMPLETE);
525 mci_writel(host, IER, MCI_NOTBUSY);
529 /* This function is called by the DMA driver from tasklet context. */
530 static void atmci_dma_complete(void *arg)
532 struct atmel_mci *host = arg;
533 struct mmc_data *data = host->data;
535 dev_vdbg(&host->pdev->dev, "DMA complete\n");
537 atmci_dma_cleanup(host);
540 * If the card was removed, data will be NULL. No point trying
541 * to send the stop command or waiting for NBUSY in this case.
544 atmci_set_pending(host, EVENT_XFER_COMPLETE);
545 tasklet_schedule(&host->tasklet);
548 * Regardless of what the documentation says, we have
549 * to wait for NOTBUSY even after block read
552 * When the DMA transfer is complete, the controller
553 * may still be reading the CRC from the card, i.e.
554 * the data transfer is still in progress and we
555 * haven't seen all the potential error bits yet.
557 * The interrupt handler will schedule a different
558 * tasklet to finish things up when the data transfer
559 * is completely done.
561 * We may not complete the mmc request here anyway
562 * because the mmc layer may call back and cause us to
563 * violate the "don't submit new operations from the
564 * completion callback" rule of the dma engine
567 mci_writel(host, IER, MCI_NOTBUSY);
572 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
574 struct dma_chan *chan;
575 struct dma_async_tx_descriptor *desc;
576 struct scatterlist *sg;
578 enum dma_data_direction direction;
581 * We don't do DMA on "complex" transfers, i.e. with
582 * non-word-aligned buffers or lengths. Also, we don't bother
583 * with all the DMA setup overhead for short transfers.
585 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
590 for_each_sg(data->sg, sg, data->sg_len, i) {
591 if (sg->offset & 3 || sg->length & 3)
595 /* If we don't have a channel, we can't do DMA */
596 chan = host->dma.chan;
598 host->data_chan = chan;
603 if (data->flags & MMC_DATA_READ)
604 direction = DMA_FROM_DEVICE;
606 direction = DMA_TO_DEVICE;
608 desc = chan->device->device_prep_slave_sg(chan,
609 data->sg, data->sg_len, direction,
610 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
614 host->dma.data_desc = desc;
615 desc->callback = atmci_dma_complete;
616 desc->callback_param = host;
617 desc->tx_submit(desc);
620 chan->device->device_issue_pending(chan);
625 #else /* CONFIG_MMC_ATMELMCI_DMA */
627 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
632 static void atmci_stop_dma(struct atmel_mci *host)
634 /* Data transfer was stopped by the interrupt handler */
635 atmci_set_pending(host, EVENT_XFER_COMPLETE);
636 mci_writel(host, IER, MCI_NOTBUSY);
639 #endif /* CONFIG_MMC_ATMELMCI_DMA */
642 * Returns a mask of interrupt flags to be enabled after the whole
643 * request has been prepared.
645 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
649 data->error = -EINPROGRESS;
655 iflags = ATMCI_DATA_ERROR_FLAGS;
656 if (atmci_submit_data_dma(host, data)) {
657 host->data_chan = NULL;
660 * Errata: MMC data write operation with less than 12
661 * bytes is impossible.
663 * Errata: MCI Transmit Data Register (TDR) FIFO
664 * corruption when length is not multiple of 4.
666 if (data->blocks * data->blksz < 12
667 || (data->blocks * data->blksz) & 3)
668 host->need_reset = true;
671 host->pio_offset = 0;
672 if (data->flags & MMC_DATA_READ)
681 static void atmci_start_request(struct atmel_mci *host,
682 struct atmel_mci_slot *slot)
684 struct mmc_request *mrq;
685 struct mmc_command *cmd;
686 struct mmc_data *data;
691 host->cur_slot = slot;
694 host->pending_events = 0;
695 host->completed_events = 0;
696 host->data_status = 0;
698 if (host->need_reset) {
699 mci_writel(host, CR, MCI_CR_SWRST);
700 mci_writel(host, CR, MCI_CR_MCIEN);
701 mci_writel(host, MR, host->mode_reg);
702 host->need_reset = false;
704 mci_writel(host, SDCR, slot->sdc_reg);
706 iflags = mci_readl(host, IMR);
708 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
711 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
712 /* Send init sequence (74 clock cycles) */
713 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
714 while (!(mci_readl(host, SR) & MCI_CMDRDY))
719 atmci_set_timeout(host, slot, data);
721 /* Must set block count/size before sending command */
722 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
723 | MCI_BLKLEN(data->blksz));
724 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
725 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
730 cmdflags = atmci_prepare_command(slot->mmc, cmd);
731 atmci_start_command(host, cmd, cmdflags);
734 iflags |= atmci_submit_data(host, data);
737 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
738 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
739 if (!(data->flags & MMC_DATA_WRITE))
740 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
741 if (data->flags & MMC_DATA_STREAM)
742 host->stop_cmdr |= MCI_CMDR_STREAM;
744 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
748 * We could have enabled interrupts earlier, but I suspect
749 * that would open up a nice can of interesting race
750 * conditions (e.g. command and data complete, but stop not
753 mci_writel(host, IER, iflags);
756 static void atmci_queue_request(struct atmel_mci *host,
757 struct atmel_mci_slot *slot, struct mmc_request *mrq)
759 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
762 spin_lock_bh(&host->lock);
764 if (host->state == STATE_IDLE) {
765 host->state = STATE_SENDING_CMD;
766 atmci_start_request(host, slot);
768 list_add_tail(&slot->queue_node, &host->queue);
770 spin_unlock_bh(&host->lock);
773 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
775 struct atmel_mci_slot *slot = mmc_priv(mmc);
776 struct atmel_mci *host = slot->host;
777 struct mmc_data *data;
782 * We may "know" the card is gone even though there's still an
783 * electrical connection. If so, we really need to communicate
784 * this to the MMC core since there won't be any more
785 * interrupts as the card is completely removed. Otherwise,
786 * the MMC core might believe the card is still there even
787 * though the card was just removed very slowly.
789 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
790 mrq->cmd->error = -ENOMEDIUM;
791 mmc_request_done(mmc, mrq);
795 /* We don't support multiple blocks of weird lengths. */
797 if (data && data->blocks > 1 && data->blksz & 3) {
798 mrq->cmd->error = -EINVAL;
799 mmc_request_done(mmc, mrq);
802 atmci_queue_request(host, slot, mrq);
805 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
807 struct atmel_mci_slot *slot = mmc_priv(mmc);
808 struct atmel_mci *host = slot->host;
811 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
812 switch (ios->bus_width) {
813 case MMC_BUS_WIDTH_1:
814 slot->sdc_reg |= MCI_SDCBUS_1BIT;
816 case MMC_BUS_WIDTH_4:
817 slot->sdc_reg |= MCI_SDCBUS_4BIT;
822 unsigned int clock_min = ~0U;
825 spin_lock_bh(&host->lock);
826 if (!host->mode_reg) {
827 clk_enable(host->mck);
828 mci_writel(host, CR, MCI_CR_SWRST);
829 mci_writel(host, CR, MCI_CR_MCIEN);
833 * Use mirror of ios->clock to prevent race with mmc
834 * core ios update when finding the minimum.
836 slot->clock = ios->clock;
837 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
838 if (host->slot[i] && host->slot[i]->clock
839 && host->slot[i]->clock < clock_min)
840 clock_min = host->slot[i]->clock;
843 /* Calculate clock divider */
844 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
846 dev_warn(&mmc->class_dev,
847 "clock %u too slow; using %lu\n",
848 clock_min, host->bus_hz / (2 * 256));
853 * WRPROOF and RDPROOF prevent overruns/underruns by
854 * stopping the clock when the FIFO is full/empty.
855 * This state is not expected to last for long.
857 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
860 if (list_empty(&host->queue))
861 mci_writel(host, MR, host->mode_reg);
863 host->need_clock_update = true;
865 spin_unlock_bh(&host->lock);
867 bool any_slot_active = false;
869 spin_lock_bh(&host->lock);
871 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
872 if (host->slot[i] && host->slot[i]->clock) {
873 any_slot_active = true;
877 if (!any_slot_active) {
878 mci_writel(host, CR, MCI_CR_MCIDIS);
879 if (host->mode_reg) {
881 clk_disable(host->mck);
885 spin_unlock_bh(&host->lock);
888 switch (ios->power_mode) {
890 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
894 * TODO: None of the currently available AVR32-based
895 * boards allow MMC power to be turned off. Implement
896 * power control when this can be tested properly.
898 * We also need to hook this into the clock management
899 * somehow so that newly inserted cards aren't
900 * subjected to a fast clock before we have a chance
901 * to figure out what the maximum rate is. Currently,
902 * there's no way to avoid this, and there never will
903 * be for boards that don't support power control.
909 static int atmci_get_ro(struct mmc_host *mmc)
911 int read_only = -ENOSYS;
912 struct atmel_mci_slot *slot = mmc_priv(mmc);
914 if (gpio_is_valid(slot->wp_pin)) {
915 read_only = gpio_get_value(slot->wp_pin);
916 dev_dbg(&mmc->class_dev, "card is %s\n",
917 read_only ? "read-only" : "read-write");
923 static int atmci_get_cd(struct mmc_host *mmc)
925 int present = -ENOSYS;
926 struct atmel_mci_slot *slot = mmc_priv(mmc);
928 if (gpio_is_valid(slot->detect_pin)) {
929 present = !(gpio_get_value(slot->detect_pin) ^
930 slot->detect_is_active_high);
931 dev_dbg(&mmc->class_dev, "card is %spresent\n",
932 present ? "" : "not ");
938 static const struct mmc_host_ops atmci_ops = {
939 .request = atmci_request,
940 .set_ios = atmci_set_ios,
941 .get_ro = atmci_get_ro,
942 .get_cd = atmci_get_cd,
945 /* Called with host->lock held */
946 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
947 __releases(&host->lock)
948 __acquires(&host->lock)
950 struct atmel_mci_slot *slot = NULL;
951 struct mmc_host *prev_mmc = host->cur_slot->mmc;
953 WARN_ON(host->cmd || host->data);
956 * Update the MMC clock rate if necessary. This may be
957 * necessary if set_ios() is called when a different slot is
958 * busy transfering data.
960 if (host->need_clock_update)
961 mci_writel(host, MR, host->mode_reg);
963 host->cur_slot->mrq = NULL;
965 if (!list_empty(&host->queue)) {
966 slot = list_entry(host->queue.next,
967 struct atmel_mci_slot, queue_node);
968 list_del(&slot->queue_node);
969 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
970 mmc_hostname(slot->mmc));
971 host->state = STATE_SENDING_CMD;
972 atmci_start_request(host, slot);
974 dev_vdbg(&host->pdev->dev, "list empty\n");
975 host->state = STATE_IDLE;
978 spin_unlock(&host->lock);
979 mmc_request_done(prev_mmc, mrq);
980 spin_lock(&host->lock);
983 static void atmci_command_complete(struct atmel_mci *host,
984 struct mmc_command *cmd)
986 u32 status = host->cmd_status;
988 /* Read the response from the card (up to 16 bytes) */
989 cmd->resp[0] = mci_readl(host, RSPR);
990 cmd->resp[1] = mci_readl(host, RSPR);
991 cmd->resp[2] = mci_readl(host, RSPR);
992 cmd->resp[3] = mci_readl(host, RSPR);
994 if (status & MCI_RTOE)
995 cmd->error = -ETIMEDOUT;
996 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
997 cmd->error = -EILSEQ;
998 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1004 dev_dbg(&host->pdev->dev,
1005 "command error: status=0x%08x\n", status);
1009 atmci_stop_dma(host);
1010 mci_writel(host, IDR, MCI_NOTBUSY
1011 | MCI_TXRDY | MCI_RXRDY
1012 | ATMCI_DATA_ERROR_FLAGS);
1017 static void atmci_detect_change(unsigned long data)
1019 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1024 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1025 * freeing the interrupt. We must not re-enable the interrupt
1026 * if it has been freed, and if we're shutting down, it
1027 * doesn't really matter whether the card is present or not.
1030 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1033 enable_irq(gpio_to_irq(slot->detect_pin));
1034 present = !(gpio_get_value(slot->detect_pin) ^
1035 slot->detect_is_active_high);
1036 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1038 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1039 present, present_old);
1041 if (present != present_old) {
1042 struct atmel_mci *host = slot->host;
1043 struct mmc_request *mrq;
1045 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1046 present ? "inserted" : "removed");
1048 spin_lock(&host->lock);
1051 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1053 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1055 /* Clean up queue if present */
1058 if (mrq == host->mrq) {
1060 * Reset controller to terminate any ongoing
1061 * commands or data transfers.
1063 mci_writel(host, CR, MCI_CR_SWRST);
1064 mci_writel(host, CR, MCI_CR_MCIEN);
1065 mci_writel(host, MR, host->mode_reg);
1070 switch (host->state) {
1073 case STATE_SENDING_CMD:
1074 mrq->cmd->error = -ENOMEDIUM;
1078 case STATE_SENDING_DATA:
1079 mrq->data->error = -ENOMEDIUM;
1080 atmci_stop_dma(host);
1082 case STATE_DATA_BUSY:
1083 case STATE_DATA_ERROR:
1084 if (mrq->data->error == -EINPROGRESS)
1085 mrq->data->error = -ENOMEDIUM;
1089 case STATE_SENDING_STOP:
1090 mrq->stop->error = -ENOMEDIUM;
1094 atmci_request_end(host, mrq);
1096 list_del(&slot->queue_node);
1097 mrq->cmd->error = -ENOMEDIUM;
1099 mrq->data->error = -ENOMEDIUM;
1101 mrq->stop->error = -ENOMEDIUM;
1103 spin_unlock(&host->lock);
1104 mmc_request_done(slot->mmc, mrq);
1105 spin_lock(&host->lock);
1108 spin_unlock(&host->lock);
1110 mmc_detect_change(slot->mmc, 0);
1114 static void atmci_tasklet_func(unsigned long priv)
1116 struct atmel_mci *host = (struct atmel_mci *)priv;
1117 struct mmc_request *mrq = host->mrq;
1118 struct mmc_data *data = host->data;
1119 struct mmc_command *cmd = host->cmd;
1120 enum atmel_mci_state state = host->state;
1121 enum atmel_mci_state prev_state;
1124 spin_lock(&host->lock);
1126 state = host->state;
1128 dev_vdbg(&host->pdev->dev,
1129 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1130 state, host->pending_events, host->completed_events,
1131 mci_readl(host, IMR));
1140 case STATE_SENDING_CMD:
1141 if (!atmci_test_and_clear_pending(host,
1142 EVENT_CMD_COMPLETE))
1146 atmci_set_completed(host, EVENT_CMD_COMPLETE);
1147 atmci_command_complete(host, mrq->cmd);
1148 if (!mrq->data || cmd->error) {
1149 atmci_request_end(host, host->mrq);
1153 prev_state = state = STATE_SENDING_DATA;
1156 case STATE_SENDING_DATA:
1157 if (atmci_test_and_clear_pending(host,
1158 EVENT_DATA_ERROR)) {
1159 atmci_stop_dma(host);
1161 send_stop_cmd(host, data);
1162 state = STATE_DATA_ERROR;
1166 if (!atmci_test_and_clear_pending(host,
1167 EVENT_XFER_COMPLETE))
1170 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1171 prev_state = state = STATE_DATA_BUSY;
1174 case STATE_DATA_BUSY:
1175 if (!atmci_test_and_clear_pending(host,
1176 EVENT_DATA_COMPLETE))
1180 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1181 status = host->data_status;
1182 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1183 if (status & MCI_DTOE) {
1184 dev_dbg(&host->pdev->dev,
1185 "data timeout error\n");
1186 data->error = -ETIMEDOUT;
1187 } else if (status & MCI_DCRCE) {
1188 dev_dbg(&host->pdev->dev,
1189 "data CRC error\n");
1190 data->error = -EILSEQ;
1192 dev_dbg(&host->pdev->dev,
1193 "data FIFO error (status=%08x)\n",
1198 data->bytes_xfered = data->blocks * data->blksz;
1203 atmci_request_end(host, host->mrq);
1207 prev_state = state = STATE_SENDING_STOP;
1209 send_stop_cmd(host, data);
1212 case STATE_SENDING_STOP:
1213 if (!atmci_test_and_clear_pending(host,
1214 EVENT_CMD_COMPLETE))
1218 atmci_command_complete(host, mrq->stop);
1219 atmci_request_end(host, host->mrq);
1222 case STATE_DATA_ERROR:
1223 if (!atmci_test_and_clear_pending(host,
1224 EVENT_XFER_COMPLETE))
1227 state = STATE_DATA_BUSY;
1230 } while (state != prev_state);
1232 host->state = state;
1235 spin_unlock(&host->lock);
1238 static void atmci_read_data_pio(struct atmel_mci *host)
1240 struct scatterlist *sg = host->sg;
1241 void *buf = sg_virt(sg);
1242 unsigned int offset = host->pio_offset;
1243 struct mmc_data *data = host->data;
1246 unsigned int nbytes = 0;
1249 value = mci_readl(host, RDR);
1250 if (likely(offset + 4 <= sg->length)) {
1251 put_unaligned(value, (u32 *)(buf + offset));
1256 if (offset == sg->length) {
1257 flush_dcache_page(sg_page(sg));
1258 host->sg = sg = sg_next(sg);
1266 unsigned int remaining = sg->length - offset;
1267 memcpy(buf + offset, &value, remaining);
1268 nbytes += remaining;
1270 flush_dcache_page(sg_page(sg));
1271 host->sg = sg = sg_next(sg);
1275 offset = 4 - remaining;
1277 memcpy(buf, (u8 *)&value + remaining, offset);
1281 status = mci_readl(host, SR);
1282 if (status & ATMCI_DATA_ERROR_FLAGS) {
1283 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1284 | ATMCI_DATA_ERROR_FLAGS));
1285 host->data_status = status;
1286 data->bytes_xfered += nbytes;
1288 atmci_set_pending(host, EVENT_DATA_ERROR);
1289 tasklet_schedule(&host->tasklet);
1292 } while (status & MCI_RXRDY);
1294 host->pio_offset = offset;
1295 data->bytes_xfered += nbytes;
1300 mci_writel(host, IDR, MCI_RXRDY);
1301 mci_writel(host, IER, MCI_NOTBUSY);
1302 data->bytes_xfered += nbytes;
1304 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1307 static void atmci_write_data_pio(struct atmel_mci *host)
1309 struct scatterlist *sg = host->sg;
1310 void *buf = sg_virt(sg);
1311 unsigned int offset = host->pio_offset;
1312 struct mmc_data *data = host->data;
1315 unsigned int nbytes = 0;
1318 if (likely(offset + 4 <= sg->length)) {
1319 value = get_unaligned((u32 *)(buf + offset));
1320 mci_writel(host, TDR, value);
1324 if (offset == sg->length) {
1325 host->sg = sg = sg_next(sg);
1333 unsigned int remaining = sg->length - offset;
1336 memcpy(&value, buf + offset, remaining);
1337 nbytes += remaining;
1339 host->sg = sg = sg_next(sg);
1341 mci_writel(host, TDR, value);
1345 offset = 4 - remaining;
1347 memcpy((u8 *)&value + remaining, buf, offset);
1348 mci_writel(host, TDR, value);
1352 status = mci_readl(host, SR);
1353 if (status & ATMCI_DATA_ERROR_FLAGS) {
1354 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1355 | ATMCI_DATA_ERROR_FLAGS));
1356 host->data_status = status;
1357 data->bytes_xfered += nbytes;
1359 atmci_set_pending(host, EVENT_DATA_ERROR);
1360 tasklet_schedule(&host->tasklet);
1363 } while (status & MCI_TXRDY);
1365 host->pio_offset = offset;
1366 data->bytes_xfered += nbytes;
1371 mci_writel(host, IDR, MCI_TXRDY);
1372 mci_writel(host, IER, MCI_NOTBUSY);
1373 data->bytes_xfered += nbytes;
1375 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1378 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1380 mci_writel(host, IDR, MCI_CMDRDY);
1382 host->cmd_status = status;
1384 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1385 tasklet_schedule(&host->tasklet);
1388 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1390 struct atmel_mci *host = dev_id;
1391 u32 status, mask, pending;
1392 unsigned int pass_count = 0;
1395 status = mci_readl(host, SR);
1396 mask = mci_readl(host, IMR);
1397 pending = status & mask;
1401 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1402 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1403 | MCI_RXRDY | MCI_TXRDY);
1404 pending &= mci_readl(host, IMR);
1406 host->data_status = status;
1408 atmci_set_pending(host, EVENT_DATA_ERROR);
1409 tasklet_schedule(&host->tasklet);
1411 if (pending & MCI_NOTBUSY) {
1412 mci_writel(host, IDR,
1413 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1414 if (!host->data_status)
1415 host->data_status = status;
1417 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1418 tasklet_schedule(&host->tasklet);
1420 if (pending & MCI_RXRDY)
1421 atmci_read_data_pio(host);
1422 if (pending & MCI_TXRDY)
1423 atmci_write_data_pio(host);
1425 if (pending & MCI_CMDRDY)
1426 atmci_cmd_interrupt(host, status);
1427 } while (pass_count++ < 5);
1429 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1432 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1434 struct atmel_mci_slot *slot = dev_id;
1437 * Disable interrupts until the pin has stabilized and check
1438 * the state then. Use mod_timer() since we may be in the
1439 * middle of the timer routine when this interrupt triggers.
1441 disable_irq_nosync(irq);
1442 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1447 static int __init atmci_init_slot(struct atmel_mci *host,
1448 struct mci_slot_pdata *slot_data, unsigned int id,
1451 struct mmc_host *mmc;
1452 struct atmel_mci_slot *slot;
1454 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1458 slot = mmc_priv(mmc);
1461 slot->detect_pin = slot_data->detect_pin;
1462 slot->wp_pin = slot_data->wp_pin;
1463 slot->detect_is_active_high = slot_data->detect_is_active_high;
1464 slot->sdc_reg = sdc_reg;
1466 mmc->ops = &atmci_ops;
1467 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1468 mmc->f_max = host->bus_hz / 2;
1469 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1470 if (slot_data->bus_width >= 4)
1471 mmc->caps |= MMC_CAP_4_BIT_DATA;
1473 mmc->max_hw_segs = 64;
1474 mmc->max_phys_segs = 64;
1475 mmc->max_req_size = 32768 * 512;
1476 mmc->max_blk_size = 32768;
1477 mmc->max_blk_count = 512;
1479 /* Assume card is present initially */
1480 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1481 if (gpio_is_valid(slot->detect_pin)) {
1482 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1483 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1484 slot->detect_pin = -EBUSY;
1485 } else if (gpio_get_value(slot->detect_pin) ^
1486 slot->detect_is_active_high) {
1487 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1491 if (!gpio_is_valid(slot->detect_pin))
1492 mmc->caps |= MMC_CAP_NEEDS_POLL;
1494 if (gpio_is_valid(slot->wp_pin)) {
1495 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1496 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1497 slot->wp_pin = -EBUSY;
1501 host->slot[id] = slot;
1504 if (gpio_is_valid(slot->detect_pin)) {
1507 setup_timer(&slot->detect_timer, atmci_detect_change,
1508 (unsigned long)slot);
1510 ret = request_irq(gpio_to_irq(slot->detect_pin),
1511 atmci_detect_interrupt,
1512 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1513 "mmc-detect", slot);
1515 dev_dbg(&mmc->class_dev,
1516 "could not request IRQ %d for detect pin\n",
1517 gpio_to_irq(slot->detect_pin));
1518 gpio_free(slot->detect_pin);
1519 slot->detect_pin = -EBUSY;
1523 atmci_init_debugfs(slot);
1528 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1531 /* Debugfs stuff is cleaned up by mmc core */
1533 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1536 mmc_remove_host(slot->mmc);
1538 if (gpio_is_valid(slot->detect_pin)) {
1539 int pin = slot->detect_pin;
1541 free_irq(gpio_to_irq(pin), slot);
1542 del_timer_sync(&slot->detect_timer);
1545 if (gpio_is_valid(slot->wp_pin))
1546 gpio_free(slot->wp_pin);
1548 slot->host->slot[id] = NULL;
1549 mmc_free_host(slot->mmc);
1552 #ifdef CONFIG_MMC_ATMELMCI_DMA
1553 static bool filter(struct dma_chan *chan, void *slave)
1555 struct dw_dma_slave *dws = slave;
1557 if (dws->dma_dev == chan->device->dev) {
1558 chan->private = dws;
1565 static int __init atmci_probe(struct platform_device *pdev)
1567 struct mci_platform_data *pdata;
1568 struct atmel_mci *host;
1569 struct resource *regs;
1570 unsigned int nr_slots;
1574 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1577 pdata = pdev->dev.platform_data;
1580 irq = platform_get_irq(pdev, 0);
1584 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1589 spin_lock_init(&host->lock);
1590 INIT_LIST_HEAD(&host->queue);
1592 host->mck = clk_get(&pdev->dev, "mci_clk");
1593 if (IS_ERR(host->mck)) {
1594 ret = PTR_ERR(host->mck);
1599 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1603 clk_enable(host->mck);
1604 mci_writel(host, CR, MCI_CR_SWRST);
1605 host->bus_hz = clk_get_rate(host->mck);
1606 clk_disable(host->mck);
1608 host->mapbase = regs->start;
1610 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1612 ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
1614 goto err_request_irq;
1616 #ifdef CONFIG_MMC_ATMELMCI_DMA
1617 if (pdata->dma_slave.dma_dev) {
1618 struct dw_dma_slave *dws = &pdata->dma_slave;
1619 dma_cap_mask_t mask;
1621 dws->tx_reg = regs->start + MCI_TDR;
1622 dws->rx_reg = regs->start + MCI_RDR;
1624 /* Try to grab a DMA channel */
1626 dma_cap_set(DMA_SLAVE, mask);
1627 host->dma.chan = dma_request_channel(mask, filter, dws);
1629 if (!host->dma.chan)
1630 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1631 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1633 platform_set_drvdata(pdev, host);
1635 /* We need at least one slot to succeed */
1638 if (pdata->slot[0].bus_width) {
1639 ret = atmci_init_slot(host, &pdata->slot[0],
1640 MCI_SDCSEL_SLOT_A, 0);
1644 if (pdata->slot[1].bus_width) {
1645 ret = atmci_init_slot(host, &pdata->slot[1],
1646 MCI_SDCSEL_SLOT_B, 1);
1654 dev_info(&pdev->dev,
1655 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1656 host->mapbase, irq, nr_slots);
1661 #ifdef CONFIG_MMC_ATMELMCI_DMA
1663 dma_release_channel(host->dma.chan);
1665 free_irq(irq, host);
1667 iounmap(host->regs);
1675 static int __exit atmci_remove(struct platform_device *pdev)
1677 struct atmel_mci *host = platform_get_drvdata(pdev);
1680 platform_set_drvdata(pdev, NULL);
1682 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1684 atmci_cleanup_slot(host->slot[i], i);
1687 clk_enable(host->mck);
1688 mci_writel(host, IDR, ~0UL);
1689 mci_writel(host, CR, MCI_CR_MCIDIS);
1690 mci_readl(host, SR);
1691 clk_disable(host->mck);
1693 #ifdef CONFIG_MMC_ATMELMCI_DMA
1695 dma_release_channel(host->dma.chan);
1698 free_irq(platform_get_irq(pdev, 0), host);
1699 iounmap(host->regs);
1707 static struct platform_driver atmci_driver = {
1708 .remove = __exit_p(atmci_remove),
1710 .name = "atmel_mci",
1714 static int __init atmci_init(void)
1716 return platform_driver_probe(&atmci_driver, atmci_probe);
1719 static void __exit atmci_exit(void)
1721 platform_driver_unregister(&atmci_driver);
1724 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1725 module_exit(atmci_exit);
1727 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1728 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1729 MODULE_LICENSE("GPL v2");