git.oblomov.eu Git - linux-2.6/blob - drivers/mmc/host/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  *
  11  * Thanks to the following companies for their support:
  12  *
  13  *     - JMicron (hardware and technical support)
  14  */
  15
  16 #include <linux/delay.h>
  17 #include <linux/highmem.h>
  18 #include <linux/io.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/scatterlist.h>
  21
  22 #include <linux/leds.h>
  23
  24 #include <linux/mmc/host.h>
  25
  26 #include "sdhci.h"
  27
  28 #define DRIVER_NAME "sdhci"
  29
  30 #define DBG(f, x...) \
  31         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  32
  33 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  34         defined(CONFIG_MMC_SDHCI_MODULE))
  35 #define SDHCI_USE_LEDS_CLASS
  36 #endif
  37
  38 static unsigned int debug_quirks = 0;
  39
  40 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  41 static void sdhci_finish_data(struct sdhci_host *);
  42
  43 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  44 static void sdhci_finish_command(struct sdhci_host *);
  45
  46 static void sdhci_dumpregs(struct sdhci_host *host)
  47 {
  48         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  49
  50         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  51                 sdhci_readl(host, SDHCI_DMA_ADDRESS),
  52                 sdhci_readw(host, SDHCI_HOST_VERSION));
  53         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  54                 sdhci_readw(host, SDHCI_BLOCK_SIZE),
  55                 sdhci_readw(host, SDHCI_BLOCK_COUNT));
  56         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
  57                 sdhci_readl(host, SDHCI_ARGUMENT),
  58                 sdhci_readw(host, SDHCI_TRANSFER_MODE));
  59         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
  60                 sdhci_readl(host, SDHCI_PRESENT_STATE),
  61                 sdhci_readb(host, SDHCI_HOST_CONTROL));
  62         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
  63                 sdhci_readb(host, SDHCI_POWER_CONTROL),
  64                 sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
  65         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
  66                 sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
  67                 sdhci_readw(host, SDHCI_CLOCK_CONTROL));
  68         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
  69                 sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
  70                 sdhci_readl(host, SDHCI_INT_STATUS));
  71         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
  72                 sdhci_readl(host, SDHCI_INT_ENABLE),
  73                 sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
  74         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
  75                 sdhci_readw(host, SDHCI_ACMD12_ERR),
  76                 sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
  77         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
  78                 sdhci_readl(host, SDHCI_CAPABILITIES),
  79                 sdhci_readl(host, SDHCI_MAX_CURRENT));
  80
  81         if (host->flags & SDHCI_USE_ADMA)
  82                 printk(KERN_DEBUG DRIVER_NAME ": ADMA Err: 0x%08x | ADMA Ptr: 0x%08x\n",
  83                        readl(host->ioaddr + SDHCI_ADMA_ERROR),
  84                        readl(host->ioaddr + SDHCI_ADMA_ADDRESS));
  85
  86         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
  87 }
  88
  89 /*****************************************************************************\
  90  *                                                                           *
  91  * Low level functions                                                       *
  92  *                                                                           *
  93 \*****************************************************************************/
  94
  95 static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
  96 {
  97         u32 ier;
  98
  99         ier = sdhci_readl(host, SDHCI_INT_ENABLE);
 100         ier &= ~clear;
 101         ier |= set;
 102         sdhci_writel(host, ier, SDHCI_INT_ENABLE);
 103         sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
 104 }
 105
 106 static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs)
 107 {
 108         sdhci_clear_set_irqs(host, 0, irqs);
 109 }
 110
 111 static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs)
 112 {
 113         sdhci_clear_set_irqs(host, irqs, 0);
 114 }
 115
 116 static void sdhci_set_card_detection(struct sdhci_host *host, bool enable)
 117 {
 118         u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT;
 119
 120         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
 121                 return;
 122
 123         if (enable)
 124                 sdhci_unmask_irqs(host, irqs);
 125         else
 126                 sdhci_mask_irqs(host, irqs);
 127 }
 128
 129 static void sdhci_enable_card_detection(struct sdhci_host *host)
 130 {
 131         sdhci_set_card_detection(host, true);
 132 }
 133
 134 static void sdhci_disable_card_detection(struct sdhci_host *host)
 135 {
 136         sdhci_set_card_detection(host, false);
 137 }
 138
 139 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 140 {
 141         unsigned long timeout;
 142         u32 uninitialized_var(ier);
 143
 144         if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 145                 if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
 146                         SDHCI_CARD_PRESENT))
 147                         return;
 148         }
 149
 150         if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
 151                 ier = sdhci_readl(host, SDHCI_INT_ENABLE);
 152
 153         sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
 154
 155         if (mask & SDHCI_RESET_ALL)
 156                 host->clock = 0;
 157
 158         /* Wait max 100 ms */
 159         timeout = 100;
 160
 161         /* hw clears the bit when it's done */
 162         while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
 163                 if (timeout == 0) {
 164                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
 165                                 mmc_hostname(host->mmc), (int)mask);
 166                         sdhci_dumpregs(host);
 167                         return;
 168                 }
 169                 timeout--;
 170                 mdelay(1);
 171         }
 172
 173         if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
 174                 sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier);
 175 }
 176
 177 static void sdhci_init(struct sdhci_host *host)
 178 {
 179         sdhci_reset(host, SDHCI_RESET_ALL);
 180
 181         sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK,
 182                 SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 183                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 184                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 185                 SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
 186 }
 187
 188 static void sdhci_reinit(struct sdhci_host *host)
 189 {
 190         sdhci_init(host);
 191         sdhci_enable_card_detection(host);
 192 }
 193
 194 static void sdhci_activate_led(struct sdhci_host *host)
 195 {
 196         u8 ctrl;
 197
 198         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 199         ctrl |= SDHCI_CTRL_LED;
 200         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 201 }
 202
 203 static void sdhci_deactivate_led(struct sdhci_host *host)
 204 {
 205         u8 ctrl;
 206
 207         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 208         ctrl &= ~SDHCI_CTRL_LED;
 209         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 210 }
 211
 212 #ifdef SDHCI_USE_LEDS_CLASS
 213 static void sdhci_led_control(struct led_classdev *led,
 214         enum led_brightness brightness)
 215 {
 216         struct sdhci_host *host = container_of(led, struct sdhci_host, led);
 217         unsigned long flags;
 218
 219         spin_lock_irqsave(&host->lock, flags);
 220
 221         if (brightness == LED_OFF)
 222                 sdhci_deactivate_led(host);
 223         else
 224                 sdhci_activate_led(host);
 225
 226         spin_unlock_irqrestore(&host->lock, flags);
 227 }
 228 #endif
 229
 230 /*****************************************************************************\
 231  *                                                                           *
 232  * Core functions                                                            *
 233  *                                                                           *
 234 \*****************************************************************************/
 235
 236 static void sdhci_read_block_pio(struct sdhci_host *host)
 237 {
 238         unsigned long flags;
 239         size_t blksize, len, chunk;
 240         u32 uninitialized_var(scratch);
 241         u8 *buf;
 242
 243         DBG("PIO reading\n");
 244
 245         blksize = host->data->blksz;
 246         chunk = 0;
 247
 248         local_irq_save(flags);
 249
 250         while (blksize) {
 251                 if (!sg_miter_next(&host->sg_miter))
 252                         BUG();
 253
 254                 len = min(host->sg_miter.length, blksize);
 255
 256                 blksize -= len;
 257                 host->sg_miter.consumed = len;
 258
 259                 buf = host->sg_miter.addr;
 260
 261                 while (len) {
 262                         if (chunk == 0) {
 263                                 scratch = sdhci_readl(host, SDHCI_BUFFER);
 264                                 chunk = 4;
 265                         }
 266
 267                         *buf = scratch & 0xFF;
 268
 269                         buf++;
 270                         scratch >>= 8;
 271                         chunk--;
 272                         len--;
 273                 }
 274         }
 275
 276         sg_miter_stop(&host->sg_miter);
 277
 278         local_irq_restore(flags);
 279 }
 280
 281 static void sdhci_write_block_pio(struct sdhci_host *host)
 282 {
 283         unsigned long flags;
 284         size_t blksize, len, chunk;
 285         u32 scratch;
 286         u8 *buf;
 287
 288         DBG("PIO writing\n");
 289
 290         blksize = host->data->blksz;
 291         chunk = 0;
 292         scratch = 0;
 293
 294         local_irq_save(flags);
 295
 296         while (blksize) {
 297                 if (!sg_miter_next(&host->sg_miter))
 298                         BUG();
 299
 300                 len = min(host->sg_miter.length, blksize);
 301
 302                 blksize -= len;
 303                 host->sg_miter.consumed = len;
 304
 305                 buf = host->sg_miter.addr;
 306
 307                 while (len) {
 308                         scratch |= (u32)*buf << (chunk * 8);
 309
 310                         buf++;
 311                         chunk++;
 312                         len--;
 313
 314                         if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
 315                                 sdhci_writel(host, scratch, SDHCI_BUFFER);
 316                                 chunk = 0;
 317                                 scratch = 0;
 318                         }
 319                 }
 320         }
 321
 322         sg_miter_stop(&host->sg_miter);
 323
 324         local_irq_restore(flags);
 325 }
 326
 327 static void sdhci_transfer_pio(struct sdhci_host *host)
 328 {
 329         u32 mask;
 330
 331         BUG_ON(!host->data);
 332
 333         if (host->blocks == 0)
 334                 return;
 335
 336         if (host->data->flags & MMC_DATA_READ)
 337                 mask = SDHCI_DATA_AVAILABLE;
 338         else
 339                 mask = SDHCI_SPACE_AVAILABLE;
 340
 341         /*
 342          * Some controllers (JMicron JMB38x) mess up the buffer bits
 343          * for transfers < 4 bytes. As long as it is just one block,
 344          * we can ignore the bits.
 345          */
 346         if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
 347                 (host->data->blocks == 1))
 348                 mask = ~0;
 349
 350         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 351                 if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY)
 352                         udelay(100);
 353
 354                 if (host->data->flags & MMC_DATA_READ)
 355                         sdhci_read_block_pio(host);
 356                 else
 357                         sdhci_write_block_pio(host);
 358
 359                 host->blocks--;
 360                 if (host->blocks == 0)
 361                         break;
 362         }
 363
 364         DBG("PIO transfer complete.\n");
 365 }
 366
 367 static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
 368 {
 369         local_irq_save(*flags);
 370         return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
 371 }
 372
 373 static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
 374 {
 375         kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 376         local_irq_restore(*flags);
 377 }
 378
 379 static int sdhci_adma_table_pre(struct sdhci_host *host,
 380         struct mmc_data *data)
 381 {
 382         int direction;
 383
 384         u8 *desc;
 385         u8 *align;
 386         dma_addr_t addr;
 387         dma_addr_t align_addr;
 388         int len, offset;
 389
 390         struct scatterlist *sg;
 391         int i;
 392         char *buffer;
 393         unsigned long flags;
 394
 395         /*
 396          * The spec does not specify endianness of descriptor table.
 397          * We currently guess that it is LE.
 398          */
 399
 400         if (data->flags & MMC_DATA_READ)
 401                 direction = DMA_FROM_DEVICE;
 402         else
 403                 direction = DMA_TO_DEVICE;
 404
 405         /*
 406          * The ADMA descriptor table is mapped further down as we
 407          * need to fill it with data first.
 408          */
 409
 410         host->align_addr = dma_map_single(mmc_dev(host->mmc),
 411                 host->align_buffer, 128 * 4, direction);
 412         if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
 413                 goto fail;
 414         BUG_ON(host->align_addr & 0x3);
 415
 416         host->sg_count = dma_map_sg(mmc_dev(host->mmc),
 417                 data->sg, data->sg_len, direction);
 418         if (host->sg_count == 0)
 419                 goto unmap_align;
 420
 421         desc = host->adma_desc;
 422         align = host->align_buffer;
 423
 424         align_addr = host->align_addr;
 425
 426         for_each_sg(data->sg, sg, host->sg_count, i) {
 427                 addr = sg_dma_address(sg);
 428                 len = sg_dma_len(sg);
 429
 430                 /*
 431                  * The SDHCI specification states that ADMA
 432                  * addresses must be 32-bit aligned. If they
 433                  * aren't, then we use a bounce buffer for
 434                  * the (up to three) bytes that screw up the
 435                  * alignment.
 436                  */
 437                 offset = (4 - (addr & 0x3)) & 0x3;
 438                 if (offset) {
 439                         if (data->flags & MMC_DATA_WRITE) {
 440                                 buffer = sdhci_kmap_atomic(sg, &flags);
 441                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 442                                 memcpy(align, buffer, offset);
 443                                 sdhci_kunmap_atomic(buffer, &flags);
 444                         }
 445
 446                         desc[7] = (align_addr >> 24) & 0xff;
 447                         desc[6] = (align_addr >> 16) & 0xff;
 448                         desc[5] = (align_addr >> 8) & 0xff;
 449                         desc[4] = (align_addr >> 0) & 0xff;
 450
 451                         BUG_ON(offset > 65536);
 452
 453                         desc[3] = (offset >> 8) & 0xff;
 454                         desc[2] = (offset >> 0) & 0xff;
 455
 456                         desc[1] = 0x00;
 457                         desc[0] = 0x21; /* tran, valid */
 458
 459                         align += 4;
 460                         align_addr += 4;
 461
 462                         desc += 8;
 463
 464                         addr += offset;
 465                         len -= offset;
 466                 }
 467
 468                 desc[7] = (addr >> 24) & 0xff;
 469                 desc[6] = (addr >> 16) & 0xff;
 470                 desc[5] = (addr >> 8) & 0xff;
 471                 desc[4] = (addr >> 0) & 0xff;
 472
 473                 BUG_ON(len > 65536);
 474
 475                 desc[3] = (len >> 8) & 0xff;
 476                 desc[2] = (len >> 0) & 0xff;
 477
 478                 desc[1] = 0x00;
 479                 desc[0] = 0x21; /* tran, valid */
 480
 481                 desc += 8;
 482
 483                 /*
 484                  * If this triggers then we have a calculation bug
 485                  * somewhere. :/
 486                  */
 487                 WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
 488         }
 489
 490         /*
 491          * Add a terminating entry.
 492          */
 493         desc[7] = 0;
 494         desc[6] = 0;
 495         desc[5] = 0;
 496         desc[4] = 0;
 497
 498         desc[3] = 0;
 499         desc[2] = 0;
 500
 501         desc[1] = 0x00;
 502         desc[0] = 0x03; /* nop, end, valid */
 503
 504         /*
 505          * Resync align buffer as we might have changed it.
 506          */
 507         if (data->flags & MMC_DATA_WRITE) {
 508                 dma_sync_single_for_device(mmc_dev(host->mmc),
 509                         host->align_addr, 128 * 4, direction);
 510         }
 511
 512         host->adma_addr = dma_map_single(mmc_dev(host->mmc),
 513                 host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 514         if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
 515                 goto unmap_entries;
 516         BUG_ON(host->adma_addr & 0x3);
 517
 518         return 0;
 519
 520 unmap_entries:
 521         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 522                 data->sg_len, direction);
 523 unmap_align:
 524         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 525                 128 * 4, direction);
 526 fail:
 527         return -EINVAL;
 528 }
 529
 530 static void sdhci_adma_table_post(struct sdhci_host *host,
 531         struct mmc_data *data)
 532 {
 533         int direction;
 534
 535         struct scatterlist *sg;
 536         int i, size;
 537         u8 *align;
 538         char *buffer;
 539         unsigned long flags;
 540
 541         if (data->flags & MMC_DATA_READ)
 542                 direction = DMA_FROM_DEVICE;
 543         else
 544                 direction = DMA_TO_DEVICE;
 545
 546         dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
 547                 (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 548
 549         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 550                 128 * 4, direction);
 551
 552         if (data->flags & MMC_DATA_READ) {
 553                 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
 554                         data->sg_len, direction);
 555
 556                 align = host->align_buffer;
 557
 558                 for_each_sg(data->sg, sg, host->sg_count, i) {
 559                         if (sg_dma_address(sg) & 0x3) {
 560                                 size = 4 - (sg_dma_address(sg) & 0x3);
 561
 562                                 buffer = sdhci_kmap_atomic(sg, &flags);
 563                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 564                                 memcpy(buffer, align, size);
 565                                 sdhci_kunmap_atomic(buffer, &flags);
 566
 567                                 align += 4;
 568                         }
 569                 }
 570         }
 571
 572         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 573                 data->sg_len, direction);
 574 }
 575
 576 static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
 577 {
 578         u8 count;
 579         unsigned target_timeout, current_timeout;
 580
 581         /*
 582          * If the host controller provides us with an incorrect timeout
 583          * value, just skip the check and use 0xE.  The hardware may take
 584          * longer to time out, but that's much better than having a too-short
 585          * timeout value.
 586          */
 587         if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL))
 588                 return 0xE;
 589
 590         /* timeout in us */
 591         target_timeout = data->timeout_ns / 1000 +
 592                 data->timeout_clks / host->clock;
 593
 594         /*
 595          * Figure out needed cycles.
 596          * We do this in steps in order to fit inside a 32 bit int.
 597          * The first step is the minimum timeout, which will have a
 598          * minimum resolution of 6 bits:
 599          * (1) 2^13*1000 > 2^22,
 600          * (2) host->timeout_clk < 2^16
 601          *     =>
 602          *     (1) / (2) > 2^6
 603          */
 604         count = 0;
 605         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 606         while (current_timeout < target_timeout) {
 607                 count++;
 608                 current_timeout <<= 1;
 609                 if (count >= 0xF)
 610                         break;
 611         }
 612
 613         if (count >= 0xF) {
 614                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 615                         mmc_hostname(host->mmc));
 616                 count = 0xE;
 617         }
 618
 619         return count;
 620 }
 621
 622 static void sdhci_set_transfer_irqs(struct sdhci_host *host)
 623 {
 624         u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
 625         u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
 626
 627         if (host->flags & SDHCI_REQ_USE_DMA)
 628                 sdhci_clear_set_irqs(host, pio_irqs, dma_irqs);
 629         else
 630                 sdhci_clear_set_irqs(host, dma_irqs, pio_irqs);
 631 }
 632
 633 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 634 {
 635         u8 count;
 636         u8 ctrl;
 637         int ret;
 638
 639         WARN_ON(host->data);
 640
 641         if (data == NULL)
 642                 return;
 643
 644         /* Sanity checks */
 645         BUG_ON(data->blksz * data->blocks > 524288);
 646         BUG_ON(data->blksz > host->mmc->max_blk_size);
 647         BUG_ON(data->blocks > 65535);
 648
 649         host->data = data;
 650         host->data_early = 0;
 651
 652         count = sdhci_calc_timeout(host, data);
 653         sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
 654
 655         if (host->flags & SDHCI_USE_DMA)
 656                 host->flags |= SDHCI_REQ_USE_DMA;
 657
 658         /*
 659          * FIXME: This doesn't account for merging when mapping the
 660          * scatterlist.
 661          */
 662         if (host->flags & SDHCI_REQ_USE_DMA) {
 663                 int broken, i;
 664                 struct scatterlist *sg;
 665
 666                 broken = 0;
 667                 if (host->flags & SDHCI_USE_ADMA) {
 668                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 669                                 broken = 1;
 670                 } else {
 671                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
 672                                 broken = 1;
 673                 }
 674
 675                 if (unlikely(broken)) {
 676                         for_each_sg(data->sg, sg, data->sg_len, i) {
 677                                 if (sg->length & 0x3) {
 678                                         DBG("Reverting to PIO because of "
 679                                                 "transfer size (%d)\n",
 680                                                 sg->length);
 681                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 682                                         break;
 683                                 }
 684                         }
 685                 }
 686         }
 687
 688         /*
 689          * The assumption here being that alignment is the same after
 690          * translation to device address space.
 691          */
 692         if (host->flags & SDHCI_REQ_USE_DMA) {
 693                 int broken, i;
 694                 struct scatterlist *sg;
 695
 696                 broken = 0;
 697                 if (host->flags & SDHCI_USE_ADMA) {
 698                         /*
 699                          * As we use 3 byte chunks to work around
 700                          * alignment problems, we need to check this
 701                          * quirk.
 702                          */
 703                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 704                                 broken = 1;
 705                 } else {
 706                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
 707                                 broken = 1;
 708                 }
 709
 710                 if (unlikely(broken)) {
 711                         for_each_sg(data->sg, sg, data->sg_len, i) {
 712                                 if (sg->offset & 0x3) {
 713                                         DBG("Reverting to PIO because of "
 714                                                 "bad alignment\n");
 715                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 716                                         break;
 717                                 }
 718                         }
 719                 }
 720         }
 721
 722         if (host->flags & SDHCI_REQ_USE_DMA) {
 723                 if (host->flags & SDHCI_USE_ADMA) {
 724                         ret = sdhci_adma_table_pre(host, data);
 725                         if (ret) {
 726                                 /*
 727                                  * This only happens when someone fed
 728                                  * us an invalid request.
 729                                  */
 730                                 WARN_ON(1);
 731                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 732                         } else {
 733                                 sdhci_writel(host, host->adma_addr,
 734                                         SDHCI_ADMA_ADDRESS);
 735                         }
 736                 } else {
 737                         int sg_cnt;
 738
 739                         sg_cnt = dma_map_sg(mmc_dev(host->mmc),
 740                                         data->sg, data->sg_len,
 741                                         (data->flags & MMC_DATA_READ) ?
 742                                                 DMA_FROM_DEVICE :
 743                                                 DMA_TO_DEVICE);
 744                         if (sg_cnt == 0) {
 745                                 /*
 746                                  * This only happens when someone fed
 747                                  * us an invalid request.
 748                                  */
 749                                 WARN_ON(1);
 750                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 751                         } else {
 752                                 WARN_ON(sg_cnt != 1);
 753                                 sdhci_writel(host, sg_dma_address(data->sg),
 754                                         SDHCI_DMA_ADDRESS);
 755                         }
 756                 }
 757         }
 758
 759         /*
 760          * Always adjust the DMA selection as some controllers
 761          * (e.g. JMicron) can't do PIO properly when the selection
 762          * is ADMA.
 763          */
 764         if (host->version >= SDHCI_SPEC_200) {
 765                 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 766                 ctrl &= ~SDHCI_CTRL_DMA_MASK;
 767                 if ((host->flags & SDHCI_REQ_USE_DMA) &&
 768                         (host->flags & SDHCI_USE_ADMA))
 769                         ctrl |= SDHCI_CTRL_ADMA32;
 770                 else
 771                         ctrl |= SDHCI_CTRL_SDMA;
 772                 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 773         }
 774
 775         if (!(host->flags & SDHCI_REQ_USE_DMA)) {
 776                 sg_miter_start(&host->sg_miter,
 777                         data->sg, data->sg_len, SG_MITER_ATOMIC);
 778                 host->blocks = data->blocks;
 779         }
 780
 781         sdhci_set_transfer_irqs(host);
 782
 783         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 784         sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE);
 785         sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
 786 }
 787
 788 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 789         struct mmc_data *data)
 790 {
 791         u16 mode;
 792
 793         if (data == NULL)
 794                 return;
 795
 796         WARN_ON(!host->data);
 797
 798         mode = SDHCI_TRNS_BLK_CNT_EN;
 799         if (data->blocks > 1)
 800                 mode |= SDHCI_TRNS_MULTI;
 801         if (data->flags & MMC_DATA_READ)
 802                 mode |= SDHCI_TRNS_READ;
 803         if (host->flags & SDHCI_REQ_USE_DMA)
 804                 mode |= SDHCI_TRNS_DMA;
 805
 806         sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
 807 }
 808
 809 static void sdhci_finish_data(struct sdhci_host *host)
 810 {
 811         struct mmc_data *data;
 812
 813         BUG_ON(!host->data);
 814
 815         data = host->data;
 816         host->data = NULL;
 817
 818         if (host->flags & SDHCI_REQ_USE_DMA) {
 819                 if (host->flags & SDHCI_USE_ADMA)
 820                         sdhci_adma_table_post(host, data);
 821                 else {
 822                         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 823                                 data->sg_len, (data->flags & MMC_DATA_READ) ?
 824                                         DMA_FROM_DEVICE : DMA_TO_DEVICE);
 825                 }
 826         }
 827
 828         /*
 829          * The specification states that the block count register must
 830          * be updated, but it does not specify at what point in the
 831          * data flow. That makes the register entirely useless to read
 832          * back so we have to assume that nothing made it to the card
 833          * in the event of an error.
 834          */
 835         if (data->error)
 836                 data->bytes_xfered = 0;
 837         else
 838                 data->bytes_xfered = data->blksz * data->blocks;
 839
 840         if (data->stop) {
 841                 /*
 842                  * The controller needs a reset of internal state machines
 843                  * upon error conditions.
 844                  */
 845                 if (data->error) {
 846                         sdhci_reset(host, SDHCI_RESET_CMD);
 847                         sdhci_reset(host, SDHCI_RESET_DATA);
 848                 }
 849
 850                 sdhci_send_command(host, data->stop);
 851         } else
 852                 tasklet_schedule(&host->finish_tasklet);
 853 }
 854
 855 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 856 {
 857         int flags;
 858         u32 mask;
 859         unsigned long timeout;
 860
 861         WARN_ON(host->cmd);
 862
 863         /* Wait max 10 ms */
 864         timeout = 10;
 865
 866         mask = SDHCI_CMD_INHIBIT;
 867         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 868                 mask |= SDHCI_DATA_INHIBIT;
 869
 870         /* We shouldn't wait for data inihibit for stop commands, even
 871            though they might use busy signaling */
 872         if (host->mrq->data && (cmd == host->mrq->data->stop))
 873                 mask &= ~SDHCI_DATA_INHIBIT;
 874
 875         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 876                 if (timeout == 0) {
 877                         printk(KERN_ERR "%s: Controller never released "
 878                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
 879                         sdhci_dumpregs(host);
 880                         cmd->error = -EIO;
 881                         tasklet_schedule(&host->finish_tasklet);
 882                         return;
 883                 }
 884                 timeout--;
 885                 mdelay(1);
 886         }
 887
 888         mod_timer(&host->timer, jiffies + 10 * HZ);
 889
 890         host->cmd = cmd;
 891
 892         sdhci_prepare_data(host, cmd->data);
 893
 894         sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT);
 895
 896         sdhci_set_transfer_mode(host, cmd->data);
 897
 898         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 899                 printk(KERN_ERR "%s: Unsupported response type!\n",
 900                         mmc_hostname(host->mmc));
 901                 cmd->error = -EINVAL;
 902                 tasklet_schedule(&host->finish_tasklet);
 903                 return;
 904         }
 905
 906         if (!(cmd->flags & MMC_RSP_PRESENT))
 907                 flags = SDHCI_CMD_RESP_NONE;
 908         else if (cmd->flags & MMC_RSP_136)
 909                 flags = SDHCI_CMD_RESP_LONG;
 910         else if (cmd->flags & MMC_RSP_BUSY)
 911                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 912         else
 913                 flags = SDHCI_CMD_RESP_SHORT;
 914
 915         if (cmd->flags & MMC_RSP_CRC)
 916                 flags |= SDHCI_CMD_CRC;
 917         if (cmd->flags & MMC_RSP_OPCODE)
 918                 flags |= SDHCI_CMD_INDEX;
 919         if (cmd->data)
 920                 flags |= SDHCI_CMD_DATA;
 921
 922         sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
 923 }
 924
 925 static void sdhci_finish_command(struct sdhci_host *host)
 926 {
 927         int i;
 928
 929         BUG_ON(host->cmd == NULL);
 930
 931         if (host->cmd->flags & MMC_RSP_PRESENT) {
 932                 if (host->cmd->flags & MMC_RSP_136) {
 933                         /* CRC is stripped so we need to do some shifting. */
 934                         for (i = 0;i < 4;i++) {
 935                                 host->cmd->resp[i] = sdhci_readl(host,
 936                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 937                                 if (i != 3)
 938                                         host->cmd->resp[i] |=
 939                                                 sdhci_readb(host,
 940                                                 SDHCI_RESPONSE + (3-i)*4-1);
 941                         }
 942                 } else {
 943                         host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE);
 944                 }
 945         }
 946
 947         host->cmd->error = 0;
 948
 949         if (host->data && host->data_early)
 950                 sdhci_finish_data(host);
 951
 952         if (!host->cmd->data)
 953                 tasklet_schedule(&host->finish_tasklet);
 954
 955         host->cmd = NULL;
 956 }
 957
 958 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 959 {
 960         int div;
 961         u16 clk;
 962         unsigned long timeout;
 963
 964         if (clock == host->clock)
 965                 return;
 966
 967         if (host->ops->set_clock) {
 968                 host->ops->set_clock(host, clock);
 969                 if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK)
 970                         return;
 971         }
 972
 973         sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 974
 975         if (clock == 0)
 976                 goto out;
 977
 978         for (div = 1;div < 256;div *= 2) {
 979                 if ((host->max_clk / div) <= clock)
 980                         break;
 981         }
 982         div >>= 1;
 983
 984         clk = div << SDHCI_DIVIDER_SHIFT;
 985         clk |= SDHCI_CLOCK_INT_EN;
 986         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 987
 988         /* Wait max 10 ms */
 989         timeout = 10;
 990         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
 991                 & SDHCI_CLOCK_INT_STABLE)) {
 992                 if (timeout == 0) {
 993                         printk(KERN_ERR "%s: Internal clock never "
 994                                 "stabilised.\n", mmc_hostname(host->mmc));
 995                         sdhci_dumpregs(host);
 996                         return;
 997                 }
 998                 timeout--;
 999                 mdelay(1);
1000         }
1001
1002         clk |= SDHCI_CLOCK_CARD_EN;
1003         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
1004
1005 out:
1006         host->clock = clock;
1007 }
1008
1009 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
1010 {
1011         u8 pwr;
1012
1013         if (power == (unsigned short)-1)
1014                 pwr = 0;
1015         else {
1016                 switch (1 << power) {
1017                 case MMC_VDD_165_195:
1018                         pwr = SDHCI_POWER_180;
1019                         break;
1020                 case MMC_VDD_29_30:
1021                 case MMC_VDD_30_31:
1022                         pwr = SDHCI_POWER_300;
1023                         break;
1024                 case MMC_VDD_32_33:
1025                 case MMC_VDD_33_34:
1026                         pwr = SDHCI_POWER_330;
1027                         break;
1028                 default:
1029                         BUG();
1030                 }
1031         }
1032
1033         if (host->pwr == pwr)
1034                 return;
1035
1036         host->pwr = pwr;
1037
1038         if (pwr == 0) {
1039                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1040                 return;
1041         }
1042
1043         /*
1044          * Spec says that we should clear the power reg before setting
1045          * a new value. Some controllers don't seem to like this though.
1046          */
1047         if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1048                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1049
1050         /*
1051          * At least the Marvell CaFe chip gets confused if we set the voltage
1052          * and set turn on power at the same time, so set the voltage first.
1053          */
1054         if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
1055                 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1056
1057         pwr |= SDHCI_POWER_ON;
1058
1059         sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1060 }
1061
1062 /*****************************************************************************\
1063  *                                                                           *
1064  * MMC callbacks                                                             *
1065  *                                                                           *
1066 \*****************************************************************************/
1067
1068 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1069 {
1070         struct sdhci_host *host;
1071         bool present;
1072         unsigned long flags;
1073
1074         host = mmc_priv(mmc);
1075
1076         spin_lock_irqsave(&host->lock, flags);
1077
1078         WARN_ON(host->mrq != NULL);
1079
1080 #ifndef SDHCI_USE_LEDS_CLASS
1081         sdhci_activate_led(host);
1082 #endif
1083
1084         host->mrq = mrq;
1085
1086         /* If polling, assume that the card is always present. */
1087         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1088                 present = true;
1089         else
1090                 present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
1091                                 SDHCI_CARD_PRESENT;
1092
1093         if (!present || host->flags & SDHCI_DEVICE_DEAD) {
1094                 host->mrq->cmd->error = -ENOMEDIUM;
1095                 tasklet_schedule(&host->finish_tasklet);
1096         } else
1097                 sdhci_send_command(host, mrq->cmd);
1098
1099         mmiowb();
1100         spin_unlock_irqrestore(&host->lock, flags);
1101 }
1102
1103 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1104 {
1105         struct sdhci_host *host;
1106         unsigned long flags;
1107         u8 ctrl;
1108
1109         host = mmc_priv(mmc);
1110
1111         spin_lock_irqsave(&host->lock, flags);
1112
1113         if (host->flags & SDHCI_DEVICE_DEAD)
1114                 goto out;
1115
1116         /*
1117          * Reset the chip on each power off.
1118          * Should clear out any weird states.
1119          */
1120         if (ios->power_mode == MMC_POWER_OFF) {
1121                 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
1122                 sdhci_reinit(host);
1123         }
1124
1125         sdhci_set_clock(host, ios->clock);
1126
1127         if (ios->power_mode == MMC_POWER_OFF)
1128                 sdhci_set_power(host, -1);
1129         else
1130                 sdhci_set_power(host, ios->vdd);
1131
1132         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1133
1134         if (ios->bus_width == MMC_BUS_WIDTH_4)
1135                 ctrl |= SDHCI_CTRL_4BITBUS;
1136         else
1137                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1138
1139         if (ios->timing == MMC_TIMING_SD_HS)
1140                 ctrl |= SDHCI_CTRL_HISPD;
1141         else
1142                 ctrl &= ~SDHCI_CTRL_HISPD;
1143
1144         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1145
1146         /*
1147          * Some (ENE) controllers go apeshit on some ios operation,
1148          * signalling timeout and CRC errors even on CMD0. Resetting
1149          * it on each ios seems to solve the problem.
1150          */
1151         if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1152                 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1153
1154 out:
1155         mmiowb();
1156         spin_unlock_irqrestore(&host->lock, flags);
1157 }
1158
1159 static int sdhci_get_ro(struct mmc_host *mmc)
1160 {
1161         struct sdhci_host *host;
1162         unsigned long flags;
1163         int present;
1164
1165         host = mmc_priv(mmc);
1166
1167         spin_lock_irqsave(&host->lock, flags);
1168
1169         if (host->flags & SDHCI_DEVICE_DEAD)
1170                 present = 0;
1171         else
1172                 present = sdhci_readl(host, SDHCI_PRESENT_STATE);
1173
1174         spin_unlock_irqrestore(&host->lock, flags);
1175
1176         if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT)
1177                 return !!(present & SDHCI_WRITE_PROTECT);
1178         return !(present & SDHCI_WRITE_PROTECT);
1179 }
1180
1181 static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1182 {
1183         struct sdhci_host *host;
1184         unsigned long flags;
1185
1186         host = mmc_priv(mmc);
1187
1188         spin_lock_irqsave(&host->lock, flags);
1189
1190         if (host->flags & SDHCI_DEVICE_DEAD)
1191                 goto out;
1192
1193         if (enable)
1194                 sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT);
1195         else
1196                 sdhci_mask_irqs(host, SDHCI_INT_CARD_INT);
1197 out:
1198         mmiowb();
1199
1200         spin_unlock_irqrestore(&host->lock, flags);
1201 }
1202
1203 static const struct mmc_host_ops sdhci_ops = {
1204         .request        = sdhci_request,
1205         .set_ios        = sdhci_set_ios,
1206         .get_ro         = sdhci_get_ro,
1207         .enable_sdio_irq = sdhci_enable_sdio_irq,
1208 };
1209
1210 /*****************************************************************************\
1211  *                                                                           *
1212  * Tasklets                                                                  *
1213  *                                                                           *
1214 \*****************************************************************************/
1215
1216 static void sdhci_tasklet_card(unsigned long param)
1217 {
1218         struct sdhci_host *host;
1219         unsigned long flags;
1220
1221         host = (struct sdhci_host*)param;
1222
1223         spin_lock_irqsave(&host->lock, flags);
1224
1225         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1226                 if (host->mrq) {
1227                         printk(KERN_ERR "%s: Card removed during transfer!\n",
1228                                 mmc_hostname(host->mmc));
1229                         printk(KERN_ERR "%s: Resetting controller.\n",
1230                                 mmc_hostname(host->mmc));
1231
1232                         sdhci_reset(host, SDHCI_RESET_CMD);
1233                         sdhci_reset(host, SDHCI_RESET_DATA);
1234
1235                         host->mrq->cmd->error = -ENOMEDIUM;
1236                         tasklet_schedule(&host->finish_tasklet);
1237                 }
1238         }
1239
1240         spin_unlock_irqrestore(&host->lock, flags);
1241
1242         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1243 }
1244
1245 static void sdhci_tasklet_finish(unsigned long param)
1246 {
1247         struct sdhci_host *host;
1248         unsigned long flags;
1249         struct mmc_request *mrq;
1250
1251         host = (struct sdhci_host*)param;
1252
1253         spin_lock_irqsave(&host->lock, flags);
1254
1255         del_timer(&host->timer);
1256
1257         mrq = host->mrq;
1258
1259         /*
1260          * The controller needs a reset of internal state machines
1261          * upon error conditions.
1262          */
1263         if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1264                 (mrq->cmd->error ||
1265                  (mrq->data && (mrq->data->error ||
1266                   (mrq->data->stop && mrq->data->stop->error))) ||
1267                    (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1268
1269                 /* Some controllers need this kick or reset won't work here */
1270                 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1271                         unsigned int clock;
1272
1273                         /* This is to force an update */
1274                         clock = host->clock;
1275                         host->clock = 0;
1276                         sdhci_set_clock(host, clock);
1277                 }
1278
1279                 /* Spec says we should do both at the same time, but Ricoh
1280                    controllers do not like that. */
1281                 sdhci_reset(host, SDHCI_RESET_CMD);
1282                 sdhci_reset(host, SDHCI_RESET_DATA);
1283         }
1284
1285         host->mrq = NULL;
1286         host->cmd = NULL;
1287         host->data = NULL;
1288
1289 #ifndef SDHCI_USE_LEDS_CLASS
1290         sdhci_deactivate_led(host);
1291 #endif
1292
1293         mmiowb();
1294         spin_unlock_irqrestore(&host->lock, flags);
1295
1296         mmc_request_done(host->mmc, mrq);
1297 }
1298
1299 static void sdhci_timeout_timer(unsigned long data)
1300 {
1301         struct sdhci_host *host;
1302         unsigned long flags;
1303
1304         host = (struct sdhci_host*)data;
1305
1306         spin_lock_irqsave(&host->lock, flags);
1307
1308         if (host->mrq) {
1309                 printk(KERN_ERR "%s: Timeout waiting for hardware "
1310                         "interrupt.\n", mmc_hostname(host->mmc));
1311                 sdhci_dumpregs(host);
1312
1313                 if (host->data) {
1314                         host->data->error = -ETIMEDOUT;
1315                         sdhci_finish_data(host);
1316                 } else {
1317                         if (host->cmd)
1318                                 host->cmd->error = -ETIMEDOUT;
1319                         else
1320                                 host->mrq->cmd->error = -ETIMEDOUT;
1321
1322                         tasklet_schedule(&host->finish_tasklet);
1323                 }
1324         }
1325
1326         mmiowb();
1327         spin_unlock_irqrestore(&host->lock, flags);
1328 }
1329
1330 /*****************************************************************************\
1331  *                                                                           *
1332  * Interrupt handling                                                        *
1333  *                                                                           *
1334 \*****************************************************************************/
1335
1336 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
1337 {
1338         BUG_ON(intmask == 0);
1339
1340         if (!host->cmd) {
1341                 printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
1342                         "though no command operation was in progress.\n",
1343                         mmc_hostname(host->mmc), (unsigned)intmask);
1344                 sdhci_dumpregs(host);
1345                 return;
1346         }
1347
1348         if (intmask & SDHCI_INT_TIMEOUT)
1349                 host->cmd->error = -ETIMEDOUT;
1350         else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1351                         SDHCI_INT_INDEX))
1352                 host->cmd->error = -EILSEQ;
1353
1354         if (host->cmd->error) {
1355                 tasklet_schedule(&host->finish_tasklet);
1356                 return;
1357         }
1358
1359         /*
1360          * The host can send and interrupt when the busy state has
1361          * ended, allowing us to wait without wasting CPU cycles.
1362          * Unfortunately this is overloaded on the "data complete"
1363          * interrupt, so we need to take some care when handling
1364          * it.
1365          *
1366          * Note: The 1.0 specification is a bit ambiguous about this
1367          *       feature so there might be some problems with older
1368          *       controllers.
1369          */
1370         if (host->cmd->flags & MMC_RSP_BUSY) {
1371                 if (host->cmd->data)
1372                         DBG("Cannot wait for busy signal when also "
1373                                 "doing a data transfer");
1374                 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1375                         return;
1376
1377                 /* The controller does not support the end-of-busy IRQ,
1378                  * fall through and take the SDHCI_INT_RESPONSE */
1379         }
1380
1381         if (intmask & SDHCI_INT_RESPONSE)
1382                 sdhci_finish_command(host);
1383 }
1384
1385 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
1386 {
1387         BUG_ON(intmask == 0);
1388
1389         if (!host->data) {
1390                 /*
1391                  * The "data complete" interrupt is also used to
1392                  * indicate that a busy state has ended. See comment
1393                  * above in sdhci_cmd_irq().
1394                  */
1395                 if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1396                         if (intmask & SDHCI_INT_DATA_END) {
1397                                 sdhci_finish_command(host);
1398                                 return;
1399                         }
1400                 }
1401
1402                 printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
1403                         "though no data operation was in progress.\n",
1404                         mmc_hostname(host->mmc), (unsigned)intmask);
1405                 sdhci_dumpregs(host);
1406
1407                 return;
1408         }
1409
1410         if (intmask & SDHCI_INT_DATA_TIMEOUT)
1411                 host->data->error = -ETIMEDOUT;
1412         else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
1413                 host->data->error = -EILSEQ;
1414         else if (intmask & SDHCI_INT_ADMA_ERROR)
1415                 host->data->error = -EIO;
1416
1417         if (host->data->error)
1418                 sdhci_finish_data(host);
1419         else {
1420                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1421                         sdhci_transfer_pio(host);
1422
1423                 /*
1424                  * We currently don't do anything fancy with DMA
1425                  * boundaries, but as we can't disable the feature
1426                  * we need to at least restart the transfer.
1427                  */
1428                 if (intmask & SDHCI_INT_DMA_END)
1429                         sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS),
1430                                 SDHCI_DMA_ADDRESS);
1431
1432                 if (intmask & SDHCI_INT_DATA_END) {
1433                         if (host->cmd) {
1434                                 /*
1435                                  * Data managed to finish before the
1436                                  * command completed. Make sure we do
1437                                  * things in the proper order.
1438                                  */
1439                                 host->data_early = 1;
1440                         } else {
1441                                 sdhci_finish_data(host);
1442                         }
1443                 }
1444         }
1445 }
1446
1447 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1448 {
1449         irqreturn_t result;
1450         struct sdhci_host* host = dev_id;
1451         u32 intmask;
1452         int cardint = 0;
1453
1454         spin_lock(&host->lock);
1455
1456         intmask = sdhci_readl(host, SDHCI_INT_STATUS);
1457
1458         if (!intmask || intmask == 0xffffffff) {
1459                 result = IRQ_NONE;
1460                 goto out;
1461         }
1462
1463         DBG("*** %s got interrupt: 0x%08x\n",
1464                 mmc_hostname(host->mmc), intmask);
1465
1466         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1467                 sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
1468                         SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
1469                 tasklet_schedule(&host->card_tasklet);
1470         }
1471
1472         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1473
1474         if (intmask & SDHCI_INT_CMD_MASK) {
1475                 sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK,
1476                         SDHCI_INT_STATUS);
1477                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1478         }
1479
1480         if (intmask & SDHCI_INT_DATA_MASK) {
1481                 sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK,
1482                         SDHCI_INT_STATUS);
1483                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1484         }
1485
1486         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1487
1488         intmask &= ~SDHCI_INT_ERROR;
1489
1490         if (intmask & SDHCI_INT_BUS_POWER) {
1491                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1492                         mmc_hostname(host->mmc));
1493                 sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS);
1494         }
1495
1496         intmask &= ~SDHCI_INT_BUS_POWER;
1497
1498         if (intmask & SDHCI_INT_CARD_INT)
1499                 cardint = 1;
1500
1501         intmask &= ~SDHCI_INT_CARD_INT;
1502
1503         if (intmask) {
1504                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1505                         mmc_hostname(host->mmc), intmask);
1506                 sdhci_dumpregs(host);
1507
1508                 sdhci_writel(host, intmask, SDHCI_INT_STATUS);
1509         }
1510
1511         result = IRQ_HANDLED;
1512
1513         mmiowb();
1514 out:
1515         spin_unlock(&host->lock);
1516
1517         /*
1518          * We have to delay this as it calls back into the driver.
1519          */
1520         if (cardint)
1521                 mmc_signal_sdio_irq(host->mmc);
1522
1523         return result;
1524 }
1525
1526 /*****************************************************************************\
1527  *                                                                           *
1528  * Suspend/resume                                                            *
1529  *                                                                           *
1530 \*****************************************************************************/
1531
1532 #ifdef CONFIG_PM
1533
1534 int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1535 {
1536         int ret;
1537
1538         sdhci_disable_card_detection(host);
1539
1540         ret = mmc_suspend_host(host->mmc, state);
1541         if (ret)
1542                 return ret;
1543
1544         free_irq(host->irq, host);
1545
1546         return 0;
1547 }
1548
1549 EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1550
1551 int sdhci_resume_host(struct sdhci_host *host)
1552 {
1553         int ret;
1554
1555         if (host->flags & SDHCI_USE_DMA) {
1556                 if (host->ops->enable_dma)
1557                         host->ops->enable_dma(host);
1558         }
1559
1560         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1561                           mmc_hostname(host->mmc), host);
1562         if (ret)
1563                 return ret;
1564
1565         sdhci_init(host);
1566         mmiowb();
1567
1568         ret = mmc_resume_host(host->mmc);
1569         if (ret)
1570                 return ret;
1571
1572         sdhci_enable_card_detection(host);
1573
1574         return 0;
1575 }
1576
1577 EXPORT_SYMBOL_GPL(sdhci_resume_host);
1578
1579 #endif /* CONFIG_PM */
1580
1581 /*****************************************************************************\
1582  *                                                                           *
1583  * Device allocation/registration                                            *
1584  *                                                                           *
1585 \*****************************************************************************/
1586
1587 struct sdhci_host *sdhci_alloc_host(struct device *dev,
1588         size_t priv_size)
1589 {
1590         struct mmc_host *mmc;
1591         struct sdhci_host *host;
1592
1593         WARN_ON(dev == NULL);
1594
1595         mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1596         if (!mmc)
1597                 return ERR_PTR(-ENOMEM);
1598
1599         host = mmc_priv(mmc);
1600         host->mmc = mmc;
1601
1602         return host;
1603 }
1604
1605 EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1606
1607 int sdhci_add_host(struct sdhci_host *host)
1608 {
1609         struct mmc_host *mmc;
1610         unsigned int caps;
1611         int ret;
1612
1613         WARN_ON(host == NULL);
1614         if (host == NULL)
1615                 return -EINVAL;
1616
1617         mmc = host->mmc;
1618
1619         if (debug_quirks)
1620                 host->quirks = debug_quirks;
1621
1622         sdhci_reset(host, SDHCI_RESET_ALL);
1623
1624         host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
1625         host->version = (host->version & SDHCI_SPEC_VER_MASK)
1626                                 >> SDHCI_SPEC_VER_SHIFT;
1627         if (host->version > SDHCI_SPEC_200) {
1628                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1629                         "You may experience problems.\n", mmc_hostname(mmc),
1630                         host->version);
1631         }
1632
1633         caps = sdhci_readl(host, SDHCI_CAPABILITIES);
1634
1635         if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1636                 host->flags |= SDHCI_USE_DMA;
1637         else if (!(caps & SDHCI_CAN_DO_DMA))
1638                 DBG("Controller doesn't have DMA capability\n");
1639         else
1640                 host->flags |= SDHCI_USE_DMA;
1641
1642         if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1643                 (host->flags & SDHCI_USE_DMA)) {
1644                 DBG("Disabling DMA as it is marked broken\n");
1645                 host->flags &= ~SDHCI_USE_DMA;
1646         }
1647
1648         if (host->flags & SDHCI_USE_DMA) {
1649                 if ((host->version >= SDHCI_SPEC_200) &&
1650                                 (caps & SDHCI_CAN_DO_ADMA2))
1651                         host->flags |= SDHCI_USE_ADMA;
1652         }
1653
1654         if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
1655                 (host->flags & SDHCI_USE_ADMA)) {
1656                 DBG("Disabling ADMA as it is marked broken\n");
1657                 host->flags &= ~SDHCI_USE_ADMA;
1658         }
1659
1660         if (host->flags & SDHCI_USE_DMA) {
1661                 if (host->ops->enable_dma) {
1662                         if (host->ops->enable_dma(host)) {
1663                                 printk(KERN_WARNING "%s: No suitable DMA "
1664                                         "available. Falling back to PIO.\n",
1665                                         mmc_hostname(mmc));
1666                                 host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1667                         }
1668                 }
1669         }
1670
1671         if (host->flags & SDHCI_USE_ADMA) {
1672                 /*
1673                  * We need to allocate descriptors for all sg entries
1674                  * (128) and potentially one alignment transfer for
1675                  * each of those entries.
1676                  */
1677                 host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
1678                 host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
1679                 if (!host->adma_desc || !host->align_buffer) {
1680                         kfree(host->adma_desc);
1681                         kfree(host->align_buffer);
1682                         printk(KERN_WARNING "%s: Unable to allocate ADMA "
1683                                 "buffers. Falling back to standard DMA.\n",
1684                                 mmc_hostname(mmc));
1685                         host->flags &= ~SDHCI_USE_ADMA;
1686                 }
1687         }
1688
1689         /*
1690          * If we use DMA, then it's up to the caller to set the DMA
1691          * mask, but PIO does not need the hw shim so we set a new
1692          * mask here in that case.
1693          */
1694         if (!(host->flags & SDHCI_USE_DMA)) {
1695                 host->dma_mask = DMA_BIT_MASK(64);
1696                 mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
1697         }
1698
1699         host->max_clk =
1700                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1701         host->max_clk *= 1000000;
1702         if (host->max_clk == 0) {
1703                 if (!host->ops->get_max_clock) {
1704                         printk(KERN_ERR
1705                                "%s: Hardware doesn't specify base clock "
1706                                "frequency.\n", mmc_hostname(mmc));
1707                         return -ENODEV;
1708                 }
1709                 host->max_clk = host->ops->get_max_clock(host);
1710         }
1711
1712         host->timeout_clk =
1713                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1714         if (host->timeout_clk == 0) {
1715                 if (!host->ops->get_timeout_clock) {
1716                         printk(KERN_ERR
1717                                "%s: Hardware doesn't specify timeout clock "
1718                                "frequency.\n", mmc_hostname(mmc));
1719                         return -ENODEV;
1720                 }
1721                 host->timeout_clk = host->ops->get_timeout_clock(host);
1722         }
1723         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1724                 host->timeout_clk *= 1000;
1725
1726         /*
1727          * Set host parameters.
1728          */
1729         mmc->ops = &sdhci_ops;
1730         mmc->f_min = host->max_clk / 256;
1731         mmc->f_max = host->max_clk;
1732         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1733
1734         if (caps & SDHCI_CAN_DO_HISPD)
1735                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1736
1737         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1738                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1739
1740         mmc->ocr_avail = 0;
1741         if (caps & SDHCI_CAN_VDD_330)
1742                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1743         if (caps & SDHCI_CAN_VDD_300)
1744                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1745         if (caps & SDHCI_CAN_VDD_180)
1746                 mmc->ocr_avail |= MMC_VDD_165_195;
1747
1748         if (mmc->ocr_avail == 0) {
1749                 printk(KERN_ERR "%s: Hardware doesn't report any "
1750                         "support voltages.\n", mmc_hostname(mmc));
1751                 return -ENODEV;
1752         }
1753
1754         spin_lock_init(&host->lock);
1755
1756         /*
1757          * Maximum number of segments. Depends on if the hardware
1758          * can do scatter/gather or not.
1759          */
1760         if (host->flags & SDHCI_USE_ADMA)
1761                 mmc->max_hw_segs = 128;
1762         else if (host->flags & SDHCI_USE_DMA)
1763                 mmc->max_hw_segs = 1;
1764         else /* PIO */
1765                 mmc->max_hw_segs = 128;
1766         mmc->max_phys_segs = 128;
1767
1768         /*
1769          * Maximum number of sectors in one transfer. Limited by DMA boundary
1770          * size (512KiB).
1771          */
1772         mmc->max_req_size = 524288;
1773
1774         /*
1775          * Maximum segment size. Could be one segment with the maximum number
1776          * of bytes. When doing hardware scatter/gather, each entry cannot
1777          * be larger than 64 KiB though.
1778          */
1779         if (host->flags & SDHCI_USE_ADMA)
1780                 mmc->max_seg_size = 65536;
1781         else
1782                 mmc->max_seg_size = mmc->max_req_size;
1783
1784         /*
1785          * Maximum block size. This varies from controller to controller and
1786          * is specified in the capabilities register.
1787          */
1788         if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) {
1789                 mmc->max_blk_size = 2;
1790         } else {
1791                 mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >>
1792                                 SDHCI_MAX_BLOCK_SHIFT;
1793                 if (mmc->max_blk_size >= 3) {
1794                         printk(KERN_WARNING "%s: Invalid maximum block size, "
1795                                 "assuming 512 bytes\n", mmc_hostname(mmc));
1796                         mmc->max_blk_size = 0;
1797                 }
1798         }
1799
1800         mmc->max_blk_size = 512 << mmc->max_blk_size;
1801
1802         /*
1803          * Maximum block count.
1804          */
1805         mmc->max_blk_count = 65535;
1806
1807         /*
1808          * Init tasklets.
1809          */
1810         tasklet_init(&host->card_tasklet,
1811                 sdhci_tasklet_card, (unsigned long)host);
1812         tasklet_init(&host->finish_tasklet,
1813                 sdhci_tasklet_finish, (unsigned long)host);
1814
1815         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1816
1817         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1818                 mmc_hostname(mmc), host);
1819         if (ret)
1820                 goto untasklet;
1821
1822         sdhci_init(host);
1823
1824 #ifdef CONFIG_MMC_DEBUG
1825         sdhci_dumpregs(host);
1826 #endif
1827
1828 #ifdef SDHCI_USE_LEDS_CLASS
1829         snprintf(host->led_name, sizeof(host->led_name),
1830                 "%s::", mmc_hostname(mmc));
1831         host->led.name = host->led_name;
1832         host->led.brightness = LED_OFF;
1833         host->led.default_trigger = mmc_hostname(mmc);
1834         host->led.brightness_set = sdhci_led_control;
1835
1836         ret = led_classdev_register(mmc_dev(mmc), &host->led);
1837         if (ret)
1838                 goto reset;
1839 #endif
1840
1841         mmiowb();
1842
1843         mmc_add_host(mmc);
1844
1845         printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1846                 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
1847                 (host->flags & SDHCI_USE_ADMA)?"A":"",
1848                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1849
1850         sdhci_enable_card_detection(host);
1851
1852         return 0;
1853
1854 #ifdef SDHCI_USE_LEDS_CLASS
1855 reset:
1856         sdhci_reset(host, SDHCI_RESET_ALL);
1857         free_irq(host->irq, host);
1858 #endif
1859 untasklet:
1860         tasklet_kill(&host->card_tasklet);
1861         tasklet_kill(&host->finish_tasklet);
1862
1863         return ret;
1864 }
1865
1866 EXPORT_SYMBOL_GPL(sdhci_add_host);
1867
1868 void sdhci_remove_host(struct sdhci_host *host, int dead)
1869 {
1870         unsigned long flags;
1871
1872         if (dead) {
1873                 spin_lock_irqsave(&host->lock, flags);
1874
1875                 host->flags |= SDHCI_DEVICE_DEAD;
1876
1877                 if (host->mrq) {
1878                         printk(KERN_ERR "%s: Controller removed during "
1879                                 " transfer!\n", mmc_hostname(host->mmc));
1880
1881                         host->mrq->cmd->error = -ENOMEDIUM;
1882                         tasklet_schedule(&host->finish_tasklet);
1883                 }
1884
1885                 spin_unlock_irqrestore(&host->lock, flags);
1886         }
1887
1888         sdhci_disable_card_detection(host);
1889
1890         mmc_remove_host(host->mmc);
1891
1892 #ifdef SDHCI_USE_LEDS_CLASS
1893         led_classdev_unregister(&host->led);
1894 #endif
1895
1896         if (!dead)
1897                 sdhci_reset(host, SDHCI_RESET_ALL);
1898
1899         free_irq(host->irq, host);
1900
1901         del_timer_sync(&host->timer);
1902
1903         tasklet_kill(&host->card_tasklet);
1904         tasklet_kill(&host->finish_tasklet);
1905
1906         kfree(host->adma_desc);
1907         kfree(host->align_buffer);
1908
1909         host->adma_desc = NULL;
1910         host->align_buffer = NULL;
1911 }
1912
1913 EXPORT_SYMBOL_GPL(sdhci_remove_host);
1914
1915 void sdhci_free_host(struct sdhci_host *host)
1916 {
1917         mmc_free_host(host->mmc);
1918 }
1919
1920 EXPORT_SYMBOL_GPL(sdhci_free_host);
1921
1922 /*****************************************************************************\
1923  *                                                                           *
1924  * Driver init/exit                                                          *
1925  *                                                                           *
1926 \*****************************************************************************/
1927
1928 static int __init sdhci_drv_init(void)
1929 {
1930         printk(KERN_INFO DRIVER_NAME
1931                 ": Secure Digital Host Controller Interface driver\n");
1932         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1933
1934         return 0;
1935 }
1936
1937 static void __exit sdhci_drv_exit(void)
1938 {
1939 }
1940
1941 module_init(sdhci_drv_init);
1942 module_exit(sdhci_drv_exit);
1943
1944 module_param(debug_quirks, uint, 0444);
1945
1946 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1947 MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1948 MODULE_LICENSE("GPL");
1949
1950 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");