Merge Btrfs into fs/btrfs
[linux-2.6] / arch / powerpc / boot / dts / mpc8315erdb.dts
1 /*
2  * MPC8315E RDB Device Tree Source
3  *
4  * Copyright 2007 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         compatible = "fsl,mpc8315erdb";
16         #address-cells = <1>;
17         #size-cells = <1>;
18
19         aliases {
20                 ethernet0 = &enet0;
21                 ethernet1 = &enet1;
22                 serial0 = &serial0;
23                 serial1 = &serial1;
24                 pci0 = &pci0;
25         };
26
27         cpus {
28                 #address-cells = <1>;
29                 #size-cells = <0>;
30
31                 PowerPC,8315@0 {
32                         device_type = "cpu";
33                         reg = <0x0>;
34                         d-cache-line-size = <32>;
35                         i-cache-line-size = <32>;
36                         d-cache-size = <16384>;
37                         i-cache-size = <16384>;
38                         timebase-frequency = <0>;       // from bootloader
39                         bus-frequency = <0>;            // from bootloader
40                         clock-frequency = <0>;          // from bootloader
41                 };
42         };
43
44         memory {
45                 device_type = "memory";
46                 reg = <0x00000000 0x08000000>;  // 128MB at 0
47         };
48
49         localbus@e0005000 {
50                 #address-cells = <2>;
51                 #size-cells = <1>;
52                 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
53                 reg = <0xe0005000 0x1000>;
54                 interrupts = <77 0x8>;
55                 interrupt-parent = <&ipic>;
56
57                 // CS0 and CS1 are swapped when
58                 // booting from nand, but the
59                 // addresses are the same.
60                 ranges = <0x0 0x0 0xfe000000 0x00800000
61                           0x1 0x0 0xe0600000 0x00002000
62                           0x2 0x0 0xf0000000 0x00020000
63                           0x3 0x0 0xfa000000 0x00008000>;
64
65                 flash@0,0 {
66                         #address-cells = <1>;
67                         #size-cells = <1>;
68                         compatible = "cfi-flash";
69                         reg = <0x0 0x0 0x800000>;
70                         bank-width = <2>;
71                         device-width = <1>;
72                 };
73
74                 nand@1,0 {
75                         #address-cells = <1>;
76                         #size-cells = <1>;
77                         compatible = "fsl,mpc8315-fcm-nand",
78                                      "fsl,elbc-fcm-nand";
79                         reg = <0x1 0x0 0x2000>;
80
81                         u-boot@0 {
82                                 reg = <0x0 0x100000>;
83                                 read-only;
84                         };
85
86                         kernel@100000 {
87                                 reg = <0x100000 0x300000>;
88                         };
89                         fs@400000 {
90                                 reg = <0x400000 0x1c00000>;
91                         };
92                 };
93         };
94
95         immr@e0000000 {
96                 #address-cells = <1>;
97                 #size-cells = <1>;
98                 device_type = "soc";
99                 compatible = "fsl,mpc8315-immr", "simple-bus";
100                 ranges = <0 0xe0000000 0x00100000>;
101                 reg = <0xe0000000 0x00000200>;
102                 bus-frequency = <0>;
103
104                 wdt@200 {
105                         device_type = "watchdog";
106                         compatible = "mpc83xx_wdt";
107                         reg = <0x200 0x100>;
108                 };
109
110                 i2c@3000 {
111                         #address-cells = <1>;
112                         #size-cells = <0>;
113                         cell-index = <0>;
114                         compatible = "fsl-i2c";
115                         reg = <0x3000 0x100>;
116                         interrupts = <14 0x8>;
117                         interrupt-parent = <&ipic>;
118                         dfsrr;
119                         rtc@68 {
120                                 device_type = "rtc";
121                                 compatible = "dallas,ds1339";
122                                 reg = <0x68>;
123                         };
124                 };
125
126                 spi@7000 {
127                         cell-index = <0>;
128                         compatible = "fsl,spi";
129                         reg = <0x7000 0x1000>;
130                         interrupts = <16 0x8>;
131                         interrupt-parent = <&ipic>;
132                         mode = "cpu";
133                 };
134
135                 dma@82a8 {
136                         #address-cells = <1>;
137                         #size-cells = <1>;
138                         compatible = "fsl,mpc8315-dma", "fsl,elo-dma";
139                         reg = <0x82a8 4>;
140                         ranges = <0 0x8100 0x1a8>;
141                         interrupt-parent = <&ipic>;
142                         interrupts = <71 8>;
143                         cell-index = <0>;
144                         dma-channel@0 {
145                                 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
146                                 reg = <0 0x80>;
147                                 interrupt-parent = <&ipic>;
148                                 interrupts = <71 8>;
149                         };
150                         dma-channel@80 {
151                                 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
152                                 reg = <0x80 0x80>;
153                                 interrupt-parent = <&ipic>;
154                                 interrupts = <71 8>;
155                         };
156                         dma-channel@100 {
157                                 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
158                                 reg = <0x100 0x80>;
159                                 interrupt-parent = <&ipic>;
160                                 interrupts = <71 8>;
161                         };
162                         dma-channel@180 {
163                                 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
164                                 reg = <0x180 0x28>;
165                                 interrupt-parent = <&ipic>;
166                                 interrupts = <71 8>;
167                         };
168                 };
169
170                 usb@23000 {
171                         compatible = "fsl-usb2-dr";
172                         reg = <0x23000 0x1000>;
173                         #address-cells = <1>;
174                         #size-cells = <0>;
175                         interrupt-parent = <&ipic>;
176                         interrupts = <38 0x8>;
177                         phy_type = "utmi";
178                 };
179
180                 mdio@24520 {
181                         #address-cells = <1>;
182                         #size-cells = <0>;
183                         compatible = "fsl,gianfar-mdio";
184                         reg = <0x24520 0x20>;
185                         phy0: ethernet-phy@0 {
186                                 interrupt-parent = <&ipic>;
187                                 interrupts = <20 0x8>;
188                                 reg = <0x0>;
189                                 device_type = "ethernet-phy";
190                         };
191                         phy1: ethernet-phy@1 {
192                                 interrupt-parent = <&ipic>;
193                                 interrupts = <19 0x8>;
194                                 reg = <0x1>;
195                                 device_type = "ethernet-phy";
196                         };
197                 };
198
199                 enet0: ethernet@24000 {
200                         cell-index = <0>;
201                         device_type = "network";
202                         model = "eTSEC";
203                         compatible = "gianfar";
204                         reg = <0x24000 0x1000>;
205                         local-mac-address = [ 00 00 00 00 00 00 ];
206                         interrupts = <32 0x8 33 0x8 34 0x8>;
207                         interrupt-parent = <&ipic>;
208                         phy-handle = < &phy0 >;
209                 };
210
211                 enet1: ethernet@25000 {
212                         cell-index = <1>;
213                         device_type = "network";
214                         model = "eTSEC";
215                         compatible = "gianfar";
216                         reg = <0x25000 0x1000>;
217                         local-mac-address = [ 00 00 00 00 00 00 ];
218                         interrupts = <35 0x8 36 0x8 37 0x8>;
219                         interrupt-parent = <&ipic>;
220                         phy-handle = < &phy1 >;
221                 };
222
223                 serial0: serial@4500 {
224                         cell-index = <0>;
225                         device_type = "serial";
226                         compatible = "ns16550";
227                         reg = <0x4500 0x100>;
228                         clock-frequency = <0>;
229                         interrupts = <9 0x8>;
230                         interrupt-parent = <&ipic>;
231                 };
232
233                 serial1: serial@4600 {
234                         cell-index = <1>;
235                         device_type = "serial";
236                         compatible = "ns16550";
237                         reg = <0x4600 0x100>;
238                         clock-frequency = <0>;
239                         interrupts = <10 0x8>;
240                         interrupt-parent = <&ipic>;
241                 };
242
243                 crypto@30000 {
244                         compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
245                                      "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
246                                      "fsl,sec2.0";
247                         reg = <0x30000 0x10000>;
248                         interrupts = <11 0x8>;
249                         interrupt-parent = <&ipic>;
250                         fsl,num-channels = <4>;
251                         fsl,channel-fifo-len = <24>;
252                         fsl,exec-units-mask = <0x97c>;
253                         fsl,descriptor-types-mask = <0x3ab0abf>;
254                 };
255
256                 sata@18000 {
257                         compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
258                         reg = <0x18000 0x1000>;
259                         cell-index = <1>;
260                         interrupts = <44 0x8>;
261                         interrupt-parent = <&ipic>;
262                 };
263
264                 sata@19000 {
265                         compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
266                         reg = <0x19000 0x1000>;
267                         cell-index = <2>;
268                         interrupts = <45 0x8>;
269                         interrupt-parent = <&ipic>;
270                 };
271
272                 /* IPIC
273                  * interrupts cell = <intr #, sense>
274                  * sense values match linux IORESOURCE_IRQ_* defines:
275                  * sense == 8: Level, low assertion
276                  * sense == 2: Edge, high-to-low change
277                  */
278                 ipic: interrupt-controller@700 {
279                         interrupt-controller;
280                         #address-cells = <0>;
281                         #interrupt-cells = <2>;
282                         reg = <0x700 0x100>;
283                         device_type = "ipic";
284                 };
285         };
286
287         pci0: pci@e0008500 {
288                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
289                 interrupt-map = <
290                                 /* IDSEL 0x0E -mini PCI */
291                                  0x7000 0x0 0x0 0x1 &ipic 18 0x8
292                                  0x7000 0x0 0x0 0x2 &ipic 18 0x8
293                                  0x7000 0x0 0x0 0x3 &ipic 18 0x8
294                                  0x7000 0x0 0x0 0x4 &ipic 18 0x8
295
296                                 /* IDSEL 0x0F -mini PCI */
297                                  0x7800 0x0 0x0 0x1 &ipic 17 0x8
298                                  0x7800 0x0 0x0 0x2 &ipic 17 0x8
299                                  0x7800 0x0 0x0 0x3 &ipic 17 0x8
300                                  0x7800 0x0 0x0 0x4 &ipic 17 0x8
301
302                                 /* IDSEL 0x10 - PCI slot */
303                                  0x8000 0x0 0x0 0x1 &ipic 48 0x8
304                                  0x8000 0x0 0x0 0x2 &ipic 17 0x8
305                                  0x8000 0x0 0x0 0x3 &ipic 48 0x8
306                                  0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
307                 interrupt-parent = <&ipic>;
308                 interrupts = <66 0x8>;
309                 bus-range = <0x0 0x0>;
310                 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
311                           0x42000000 0 0x80000000 0x80000000 0 0x10000000
312                           0x01000000 0 0x00000000 0xe0300000 0 0x00100000>;
313                 clock-frequency = <66666666>;
314                 #interrupt-cells = <1>;
315                 #size-cells = <2>;
316                 #address-cells = <3>;
317                 reg = <0xe0008500 0x100>;
318                 compatible = "fsl,mpc8349-pci";
319                 device_type = "pci";
320         };
321 };