git.oblomov.eu Git - linux-2.6/blob - arch/ia64/kernel/smpboot.c

   1 /*
   2  * SMP boot-related support
   3  *
   4  * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
   5  *      David Mosberger-Tang <davidm@hpl.hp.com>
   6  * Copyright (C) 2001, 2004-2005 Intel Corp
   7  *      Rohit Seth <rohit.seth@intel.com>
   8  *      Suresh Siddha <suresh.b.siddha@intel.com>
   9  *      Gordon Jin <gordon.jin@intel.com>
  10  *      Ashok Raj  <ashok.raj@intel.com>
  11  *
  12  * 01/05/16 Rohit Seth <rohit.seth@intel.com>   Moved SMP booting functions from smp.c to here.
  13  * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
  14  * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
  15  *                                              smp_boot_cpus()/smp_commence() is replaced by
  16  *                                              smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
  17  * 04/06/21 Ashok Raj           <ashok.raj@intel.com> Added CPU Hotplug Support
  18  * 04/12/26 Jin Gordon <gordon.jin@intel.com>
  19  * 04/12/26 Rohit Seth <rohit.seth@intel.com>
  20  *                                              Add multi-threading and multi-core detection
  21  * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
  22  *                                              Setup cpu_sibling_map and cpu_core_map
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/acpi.h>
  27 #include <linux/bootmem.h>
  28 #include <linux/cpu.h>
  29 #include <linux/delay.h>
  30 #include <linux/init.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/irq.h>
  33 #include <linux/kernel.h>
  34 #include <linux/kernel_stat.h>
  35 #include <linux/mm.h>
  36 #include <linux/notifier.h>
  37 #include <linux/smp.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/efi.h>
  40 #include <linux/percpu.h>
  41 #include <linux/bitops.h>
  42
  43 #include <asm/atomic.h>
  44 #include <asm/cache.h>
  45 #include <asm/current.h>
  46 #include <asm/delay.h>
  47 #include <asm/ia32.h>
  48 #include <asm/io.h>
  49 #include <asm/irq.h>
  50 #include <asm/machvec.h>
  51 #include <asm/mca.h>
  52 #include <asm/page.h>
  53 #include <asm/paravirt.h>
  54 #include <asm/pgalloc.h>
  55 #include <asm/pgtable.h>
  56 #include <asm/processor.h>
  57 #include <asm/ptrace.h>
  58 #include <asm/sal.h>
  59 #include <asm/system.h>
  60 #include <asm/tlbflush.h>
  61 #include <asm/unistd.h>
  62 #include <asm/sn/arch.h>
  63
  64 #define SMP_DEBUG 0
  65
  66 #if SMP_DEBUG
  67 #define Dprintk(x...)  printk(x)
  68 #else
  69 #define Dprintk(x...)
  70 #endif
  71
  72 #ifdef CONFIG_HOTPLUG_CPU
  73 #ifdef CONFIG_PERMIT_BSP_REMOVE
  74 #define bsp_remove_ok   1
  75 #else
  76 #define bsp_remove_ok   0
  77 #endif
  78
  79 /*
  80  * Store all idle threads, this can be reused instead of creating
  81  * a new thread. Also avoids complicated thread destroy functionality
  82  * for idle threads.
  83  */
  84 struct task_struct *idle_thread_array[NR_CPUS];
  85
  86 /*
  87  * Global array allocated for NR_CPUS at boot time
  88  */
  89 struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
  90
  91 /*
  92  * start_ap in head.S uses this to store current booting cpu
  93  * info.
  94  */
  95 struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
  96
  97 #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
  98
  99 #define get_idle_for_cpu(x)             (idle_thread_array[(x)])
 100 #define set_idle_for_cpu(x,p)   (idle_thread_array[(x)] = (p))
 101
 102 #else
 103
 104 #define get_idle_for_cpu(x)             (NULL)
 105 #define set_idle_for_cpu(x,p)
 106 #define set_brendez_area(x)
 107 #endif
 108
 109
 110 /*
 111  * ITC synchronization related stuff:
 112  */
 113 #define MASTER  (0)
 114 #define SLAVE   (SMP_CACHE_BYTES/8)
 115
 116 #define NUM_ROUNDS      64      /* magic value */
 117 #define NUM_ITERS       5       /* likewise */
 118
 119 static DEFINE_SPINLOCK(itc_sync_lock);
 120 static volatile unsigned long go[SLAVE + 1];
 121
 122 #define DEBUG_ITC_SYNC  0
 123
 124 extern void start_ap (void);
 125 extern unsigned long ia64_iobase;
 126
 127 struct task_struct *task_for_booting_cpu;
 128
 129 /*
 130  * State for each CPU
 131  */
 132 DEFINE_PER_CPU(int, cpu_state);
 133
 134 /* Bitmasks of currently online, and possible CPUs */
 135 cpumask_t cpu_online_map;
 136 EXPORT_SYMBOL(cpu_online_map);
 137 cpumask_t cpu_possible_map = CPU_MASK_NONE;
 138 EXPORT_SYMBOL(cpu_possible_map);
 139
 140 cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
 141 EXPORT_SYMBOL(cpu_core_map);
 142 DEFINE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
 143 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
 144
 145 int smp_num_siblings = 1;
 146
 147 /* which logical CPU number maps to which CPU (physical APIC ID) */
 148 volatile int ia64_cpu_to_sapicid[NR_CPUS];
 149 EXPORT_SYMBOL(ia64_cpu_to_sapicid);
 150
 151 static volatile cpumask_t cpu_callin_map;
 152
 153 struct smp_boot_data smp_boot_data __initdata;
 154
 155 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
 156
 157 char __initdata no_int_routing;
 158
 159 unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
 160
 161 #ifdef CONFIG_FORCE_CPEI_RETARGET
 162 #define CPEI_OVERRIDE_DEFAULT   (1)
 163 #else
 164 #define CPEI_OVERRIDE_DEFAULT   (0)
 165 #endif
 166
 167 unsigned int force_cpei_retarget = CPEI_OVERRIDE_DEFAULT;
 168
 169 static int __init
 170 cmdl_force_cpei(char *str)
 171 {
 172         int value=0;
 173
 174         get_option (&str, &value);
 175         force_cpei_retarget = value;
 176
 177         return 1;
 178 }
 179
 180 __setup("force_cpei=", cmdl_force_cpei);
 181
 182 static int __init
 183 nointroute (char *str)
 184 {
 185         no_int_routing = 1;
 186         printk ("no_int_routing on\n");
 187         return 1;
 188 }
 189
 190 __setup("nointroute", nointroute);
 191
 192 static void fix_b0_for_bsp(void)
 193 {
 194 #ifdef CONFIG_HOTPLUG_CPU
 195         int cpuid;
 196         static int fix_bsp_b0 = 1;
 197
 198         cpuid = smp_processor_id();
 199
 200         /*
 201          * Cache the b0 value on the first AP that comes up
 202          */
 203         if (!(fix_bsp_b0 && cpuid))
 204                 return;
 205
 206         sal_boot_rendez_state[0].br[0] = sal_boot_rendez_state[cpuid].br[0];
 207         printk ("Fixed BSP b0 value from CPU %d\n", cpuid);
 208
 209         fix_bsp_b0 = 0;
 210 #endif
 211 }
 212
 213 void
 214 sync_master (void *arg)
 215 {
 216         unsigned long flags, i;
 217
 218         go[MASTER] = 0;
 219
 220         local_irq_save(flags);
 221         {
 222                 for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
 223                         while (!go[MASTER])
 224                                 cpu_relax();
 225                         go[MASTER] = 0;
 226                         go[SLAVE] = ia64_get_itc();
 227                 }
 228         }
 229         local_irq_restore(flags);
 230 }
 231
 232 /*
 233  * Return the number of cycles by which our itc differs from the itc on the master
 234  * (time-keeper) CPU.  A positive number indicates our itc is ahead of the master,
 235  * negative that it is behind.
 236  */
 237 static inline long
 238 get_delta (long *rt, long *master)
 239 {
 240         unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
 241         unsigned long tcenter, t0, t1, tm;
 242         long i;
 243
 244         for (i = 0; i < NUM_ITERS; ++i) {
 245                 t0 = ia64_get_itc();
 246                 go[MASTER] = 1;
 247                 while (!(tm = go[SLAVE]))
 248                         cpu_relax();
 249                 go[SLAVE] = 0;
 250                 t1 = ia64_get_itc();
 251
 252                 if (t1 - t0 < best_t1 - best_t0)
 253                         best_t0 = t0, best_t1 = t1, best_tm = tm;
 254         }
 255
 256         *rt = best_t1 - best_t0;
 257         *master = best_tm - best_t0;
 258
 259         /* average best_t0 and best_t1 without overflow: */
 260         tcenter = (best_t0/2 + best_t1/2);
 261         if (best_t0 % 2 + best_t1 % 2 == 2)
 262                 ++tcenter;
 263         return tcenter - best_tm;
 264 }
 265
 266 /*
 267  * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
 268  * (normally the time-keeper CPU).  We use a closed loop to eliminate the possibility of
 269  * unaccounted-for errors (such as getting a machine check in the middle of a calibration
 270  * step).  The basic idea is for the slave to ask the master what itc value it has and to
 271  * read its own itc before and after the master responds.  Each iteration gives us three
 272  * timestamps:
 273  *
 274  *      slave           master
 275  *
 276  *      t0 ---\
 277  *             ---\
 278  *                 --->
 279  *                      tm
 280  *                 /---
 281  *             /---
 282  *      t1 <---
 283  *
 284  *
 285  * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
 286  * and t1.  If we achieve this, the clocks are synchronized provided the interconnect
 287  * between the slave and the master is symmetric.  Even if the interconnect were
 288  * asymmetric, we would still know that the synchronization error is smaller than the
 289  * roundtrip latency (t0 - t1).
 290  *
 291  * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
 292  * within one or two cycles.  However, we can only *guarantee* that the synchronization is
 293  * accurate to within a round-trip time, which is typically in the range of several
 294  * hundred cycles (e.g., ~500 cycles).  In practice, this means that the itc's are usually
 295  * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
 296  * than half a micro second or so.
 297  */
 298 void
 299 ia64_sync_itc (unsigned int master)
 300 {
 301         long i, delta, adj, adjust_latency = 0, done = 0;
 302         unsigned long flags, rt, master_time_stamp, bound;
 303 #if DEBUG_ITC_SYNC
 304         struct {
 305                 long rt;        /* roundtrip time */
 306                 long master;    /* master's timestamp */
 307                 long diff;      /* difference between midpoint and master's timestamp */
 308                 long lat;       /* estimate of itc adjustment latency */
 309         } t[NUM_ROUNDS];
 310 #endif
 311
 312         /*
 313          * Make sure local timer ticks are disabled while we sync.  If
 314          * they were enabled, we'd have to worry about nasty issues
 315          * like setting the ITC ahead of (or a long time before) the
 316          * next scheduled tick.
 317          */
 318         BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
 319
 320         go[MASTER] = 1;
 321
 322         if (smp_call_function_single(master, sync_master, NULL, 0) < 0) {
 323                 printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
 324                 return;
 325         }
 326
 327         while (go[MASTER])
 328                 cpu_relax();    /* wait for master to be ready */
 329
 330         spin_lock_irqsave(&itc_sync_lock, flags);
 331         {
 332                 for (i = 0; i < NUM_ROUNDS; ++i) {
 333                         delta = get_delta(&rt, &master_time_stamp);
 334                         if (delta == 0) {
 335                                 done = 1;       /* let's lock on to this... */
 336                                 bound = rt;
 337                         }
 338
 339                         if (!done) {
 340                                 if (i > 0) {
 341                                         adjust_latency += -delta;
 342                                         adj = -delta + adjust_latency/4;
 343                                 } else
 344                                         adj = -delta;
 345
 346                                 ia64_set_itc(ia64_get_itc() + adj);
 347                         }
 348 #if DEBUG_ITC_SYNC
 349                         t[i].rt = rt;
 350                         t[i].master = master_time_stamp;
 351                         t[i].diff = delta;
 352                         t[i].lat = adjust_latency/4;
 353 #endif
 354                 }
 355         }
 356         spin_unlock_irqrestore(&itc_sync_lock, flags);
 357
 358 #if DEBUG_ITC_SYNC
 359         for (i = 0; i < NUM_ROUNDS; ++i)
 360                 printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
 361                        t[i].rt, t[i].master, t[i].diff, t[i].lat);
 362 #endif
 363
 364         printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
 365                "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
 366 }
 367
 368 /*
 369  * Ideally sets up per-cpu profiling hooks.  Doesn't do much now...
 370  */
 371 static inline void __devinit
 372 smp_setup_percpu_timer (void)
 373 {
 374 }
 375
 376 static void __cpuinit
 377 smp_callin (void)
 378 {
 379         int cpuid, phys_id, itc_master;
 380         struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo;
 381         extern void ia64_init_itm(void);
 382         extern volatile int time_keeper_id;
 383
 384 #ifdef CONFIG_PERFMON
 385         extern void pfm_init_percpu(void);
 386 #endif
 387
 388         cpuid = smp_processor_id();
 389         phys_id = hard_smp_processor_id();
 390         itc_master = time_keeper_id;
 391
 392         if (cpu_online(cpuid)) {
 393                 printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
 394                        phys_id, cpuid);
 395                 BUG();
 396         }
 397
 398         fix_b0_for_bsp();
 399
 400         ipi_call_lock_irq();
 401         spin_lock(&vector_lock);
 402         /* Setup the per cpu irq handling data structures */
 403         __setup_vector_irq(cpuid);
 404         cpu_set(cpuid, cpu_online_map);
 405         per_cpu(cpu_state, cpuid) = CPU_ONLINE;
 406         spin_unlock(&vector_lock);
 407         ipi_call_unlock_irq();
 408
 409         smp_setup_percpu_timer();
 410
 411         ia64_mca_cmc_vector_setup();    /* Setup vector on AP */
 412
 413 #ifdef CONFIG_PERFMON
 414         pfm_init_percpu();
 415 #endif
 416
 417         local_irq_enable();
 418
 419         if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
 420                 /*
 421                  * Synchronize the ITC with the BP.  Need to do this after irqs are
 422                  * enabled because ia64_sync_itc() calls smp_call_function_single(), which
 423                  * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
 424                  * local_bh_enable(), which bugs out if irqs are not enabled...
 425                  */
 426                 Dprintk("Going to syncup ITC with ITC Master.\n");
 427                 ia64_sync_itc(itc_master);
 428         }
 429
 430         /*
 431          * Get our bogomips.
 432          */
 433         ia64_init_itm();
 434
 435         /*
 436          * Delay calibration can be skipped if new processor is identical to the
 437          * previous processor.
 438          */
 439         last_cpuinfo = cpu_data(cpuid - 1);
 440         this_cpuinfo = local_cpu_data;
 441         if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq ||
 442             last_cpuinfo->proc_freq != this_cpuinfo->proc_freq ||
 443             last_cpuinfo->features != this_cpuinfo->features ||
 444             last_cpuinfo->revision != this_cpuinfo->revision ||
 445             last_cpuinfo->family != this_cpuinfo->family ||
 446             last_cpuinfo->archrev != this_cpuinfo->archrev ||
 447             last_cpuinfo->model != this_cpuinfo->model)
 448                 calibrate_delay();
 449         local_cpu_data->loops_per_jiffy = loops_per_jiffy;
 450
 451 #ifdef CONFIG_IA32_SUPPORT
 452         ia32_gdt_init();
 453 #endif
 454
 455         /*
 456          * Allow the master to continue.
 457          */
 458         cpu_set(cpuid, cpu_callin_map);
 459         Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
 460 }
 461
 462
 463 /*
 464  * Activate a secondary processor.  head.S calls this.
 465  */
 466 int __cpuinit
 467 start_secondary (void *unused)
 468 {
 469         /* Early console may use I/O ports */
 470         ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
 471 #ifndef CONFIG_PRINTK_TIME
 472         Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
 473 #endif
 474         efi_map_pal_code();
 475         cpu_init();
 476         preempt_disable();
 477         smp_callin();
 478
 479         cpu_idle();
 480         return 0;
 481 }
 482
 483 struct pt_regs * __cpuinit idle_regs(struct pt_regs *regs)
 484 {
 485         return NULL;
 486 }
 487
 488 struct create_idle {
 489         struct work_struct work;
 490         struct task_struct *idle;
 491         struct completion done;
 492         int cpu;
 493 };
 494
 495 void __cpuinit
 496 do_fork_idle(struct work_struct *work)
 497 {
 498         struct create_idle *c_idle =
 499                 container_of(work, struct create_idle, work);
 500
 501         c_idle->idle = fork_idle(c_idle->cpu);
 502         complete(&c_idle->done);
 503 }
 504
 505 static int __cpuinit
 506 do_boot_cpu (int sapicid, int cpu)
 507 {
 508         int timeout;
 509         struct create_idle c_idle = {
 510                 .work = __WORK_INITIALIZER(c_idle.work, do_fork_idle),
 511                 .cpu    = cpu,
 512                 .done   = COMPLETION_INITIALIZER(c_idle.done),
 513         };
 514
 515         c_idle.idle = get_idle_for_cpu(cpu);
 516         if (c_idle.idle) {
 517                 init_idle(c_idle.idle, cpu);
 518                 goto do_rest;
 519         }
 520
 521         /*
 522          * We can't use kernel_thread since we must avoid to reschedule the child.
 523          */
 524         if (!keventd_up() || current_is_keventd())
 525                 c_idle.work.func(&c_idle.work);
 526         else {
 527                 schedule_work(&c_idle.work);
 528                 wait_for_completion(&c_idle.done);
 529         }
 530
 531         if (IS_ERR(c_idle.idle))
 532                 panic("failed fork for CPU %d", cpu);
 533
 534         set_idle_for_cpu(cpu, c_idle.idle);
 535
 536 do_rest:
 537         task_for_booting_cpu = c_idle.idle;
 538
 539         Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
 540
 541         set_brendez_area(cpu);
 542         platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
 543
 544         /*
 545          * Wait 10s total for the AP to start
 546          */
 547         Dprintk("Waiting on callin_map ...");
 548         for (timeout = 0; timeout < 100000; timeout++) {
 549                 if (cpu_isset(cpu, cpu_callin_map))
 550                         break;  /* It has booted */
 551                 udelay(100);
 552         }
 553         Dprintk("\n");
 554
 555         if (!cpu_isset(cpu, cpu_callin_map)) {
 556                 printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
 557                 ia64_cpu_to_sapicid[cpu] = -1;
 558                 cpu_clear(cpu, cpu_online_map);  /* was set in smp_callin() */
 559                 return -EINVAL;
 560         }
 561         return 0;
 562 }
 563
 564 static int __init
 565 decay (char *str)
 566 {
 567         int ticks;
 568         get_option (&str, &ticks);
 569         return 1;
 570 }
 571
 572 __setup("decay=", decay);
 573
 574 /*
 575  * Initialize the logical CPU number to SAPICID mapping
 576  */
 577 void __init
 578 smp_build_cpu_map (void)
 579 {
 580         int sapicid, cpu, i;
 581         int boot_cpu_id = hard_smp_processor_id();
 582
 583         for (cpu = 0; cpu < NR_CPUS; cpu++) {
 584                 ia64_cpu_to_sapicid[cpu] = -1;
 585         }
 586
 587         ia64_cpu_to_sapicid[0] = boot_cpu_id;
 588         cpus_clear(cpu_present_map);
 589         cpu_set(0, cpu_present_map);
 590         cpu_set(0, cpu_possible_map);
 591         for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
 592                 sapicid = smp_boot_data.cpu_phys_id[i];
 593                 if (sapicid == boot_cpu_id)
 594                         continue;
 595                 cpu_set(cpu, cpu_present_map);
 596                 cpu_set(cpu, cpu_possible_map);
 597                 ia64_cpu_to_sapicid[cpu] = sapicid;
 598                 cpu++;
 599         }
 600 }
 601
 602 /*
 603  * Cycle through the APs sending Wakeup IPIs to boot each.
 604  */
 605 void __init
 606 smp_prepare_cpus (unsigned int max_cpus)
 607 {
 608         int boot_cpu_id = hard_smp_processor_id();
 609
 610         /*
 611          * Initialize the per-CPU profiling counter/multiplier
 612          */
 613
 614         smp_setup_percpu_timer();
 615
 616         /*
 617          * We have the boot CPU online for sure.
 618          */
 619         cpu_set(0, cpu_online_map);
 620         cpu_set(0, cpu_callin_map);
 621
 622         local_cpu_data->loops_per_jiffy = loops_per_jiffy;
 623         ia64_cpu_to_sapicid[0] = boot_cpu_id;
 624
 625         printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
 626
 627         current_thread_info()->cpu = 0;
 628
 629         /*
 630          * If SMP should be disabled, then really disable it!
 631          */
 632         if (!max_cpus) {
 633                 printk(KERN_INFO "SMP mode deactivated.\n");
 634                 cpus_clear(cpu_online_map);
 635                 cpus_clear(cpu_present_map);
 636                 cpus_clear(cpu_possible_map);
 637                 cpu_set(0, cpu_online_map);
 638                 cpu_set(0, cpu_present_map);
 639                 cpu_set(0, cpu_possible_map);
 640                 return;
 641         }
 642 }
 643
 644 void __devinit smp_prepare_boot_cpu(void)
 645 {
 646         cpu_set(smp_processor_id(), cpu_online_map);
 647         cpu_set(smp_processor_id(), cpu_callin_map);
 648         per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
 649         paravirt_post_smp_prepare_boot_cpu();
 650 }
 651
 652 #ifdef CONFIG_HOTPLUG_CPU
 653 static inline void
 654 clear_cpu_sibling_map(int cpu)
 655 {
 656         int i;
 657
 658         for_each_cpu_mask(i, per_cpu(cpu_sibling_map, cpu))
 659                 cpu_clear(cpu, per_cpu(cpu_sibling_map, i));
 660         for_each_cpu_mask(i, cpu_core_map[cpu])
 661                 cpu_clear(cpu, cpu_core_map[i]);
 662
 663         per_cpu(cpu_sibling_map, cpu) = cpu_core_map[cpu] = CPU_MASK_NONE;
 664 }
 665
 666 static void
 667 remove_siblinginfo(int cpu)
 668 {
 669         int last = 0;
 670
 671         if (cpu_data(cpu)->threads_per_core == 1 &&
 672             cpu_data(cpu)->cores_per_socket == 1) {
 673                 cpu_clear(cpu, cpu_core_map[cpu]);
 674                 cpu_clear(cpu, per_cpu(cpu_sibling_map, cpu));
 675                 return;
 676         }
 677
 678         last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0);
 679
 680         /* remove it from all sibling map's */
 681         clear_cpu_sibling_map(cpu);
 682 }
 683
 684 extern void fixup_irqs(void);
 685
 686 int migrate_platform_irqs(unsigned int cpu)
 687 {
 688         int new_cpei_cpu;
 689         irq_desc_t *desc = NULL;
 690         cpumask_t       mask;
 691         int             retval = 0;
 692
 693         /*
 694          * dont permit CPEI target to removed.
 695          */
 696         if (cpe_vector > 0 && is_cpu_cpei_target(cpu)) {
 697                 printk ("CPU (%d) is CPEI Target\n", cpu);
 698                 if (can_cpei_retarget()) {
 699                         /*
 700                          * Now re-target the CPEI to a different processor
 701                          */
 702                         new_cpei_cpu = any_online_cpu(cpu_online_map);
 703                         mask = cpumask_of_cpu(new_cpei_cpu);
 704                         set_cpei_target_cpu(new_cpei_cpu);
 705                         desc = irq_desc + ia64_cpe_irq;
 706                         /*
 707                          * Switch for now, immediately, we need to do fake intr
 708                          * as other interrupts, but need to study CPEI behaviour with
 709                          * polling before making changes.
 710                          */
 711                         if (desc) {
 712                                 desc->chip->disable(ia64_cpe_irq);
 713                                 desc->chip->set_affinity(ia64_cpe_irq, mask);
 714                                 desc->chip->enable(ia64_cpe_irq);
 715                                 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu);
 716                         }
 717                 }
 718                 if (!desc) {
 719                         printk ("Unable to retarget CPEI, offline cpu [%d] failed\n", cpu);
 720                         retval = -EBUSY;
 721                 }
 722         }
 723         return retval;
 724 }
 725
 726 /* must be called with cpucontrol mutex held */
 727 int __cpu_disable(void)
 728 {
 729         int cpu = smp_processor_id();
 730
 731         /*
 732          * dont permit boot processor for now
 733          */
 734         if (cpu == 0 && !bsp_remove_ok) {
 735                 printk ("Your platform does not support removal of BSP\n");
 736                 return (-EBUSY);
 737         }
 738
 739         if (ia64_platform_is("sn2")) {
 740                 if (!sn_cpu_disable_allowed(cpu))
 741                         return -EBUSY;
 742         }
 743
 744         cpu_clear(cpu, cpu_online_map);
 745
 746         if (migrate_platform_irqs(cpu)) {
 747                 cpu_set(cpu, cpu_online_map);
 748                 return (-EBUSY);
 749         }
 750
 751         remove_siblinginfo(cpu);
 752         cpu_clear(cpu, cpu_online_map);
 753         fixup_irqs();
 754         local_flush_tlb_all();
 755         cpu_clear(cpu, cpu_callin_map);
 756         return 0;
 757 }
 758
 759 void __cpu_die(unsigned int cpu)
 760 {
 761         unsigned int i;
 762
 763         for (i = 0; i < 100; i++) {
 764                 /* They ack this in play_dead by setting CPU_DEAD */
 765                 if (per_cpu(cpu_state, cpu) == CPU_DEAD)
 766                 {
 767                         printk ("CPU %d is now offline\n", cpu);
 768                         return;
 769                 }
 770                 msleep(100);
 771         }
 772         printk(KERN_ERR "CPU %u didn't die...\n", cpu);
 773 }
 774 #endif /* CONFIG_HOTPLUG_CPU */
 775
 776 void
 777 smp_cpus_done (unsigned int dummy)
 778 {
 779         int cpu;
 780         unsigned long bogosum = 0;
 781
 782         /*
 783          * Allow the user to impress friends.
 784          */
 785
 786         for_each_online_cpu(cpu) {
 787                 bogosum += cpu_data(cpu)->loops_per_jiffy;
 788         }
 789
 790         printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
 791                (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
 792 }
 793
 794 static inline void __devinit
 795 set_cpu_sibling_map(int cpu)
 796 {
 797         int i;
 798
 799         for_each_online_cpu(i) {
 800                 if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
 801                         cpu_set(i, cpu_core_map[cpu]);
 802                         cpu_set(cpu, cpu_core_map[i]);
 803                         if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
 804                                 cpu_set(i, per_cpu(cpu_sibling_map, cpu));
 805                                 cpu_set(cpu, per_cpu(cpu_sibling_map, i));
 806                         }
 807                 }
 808         }
 809 }
 810
 811 int __cpuinit
 812 __cpu_up (unsigned int cpu)
 813 {
 814         int ret;
 815         int sapicid;
 816
 817         sapicid = ia64_cpu_to_sapicid[cpu];
 818         if (sapicid == -1)
 819                 return -EINVAL;
 820
 821         /*
 822          * Already booted cpu? not valid anymore since we dont
 823          * do idle loop tightspin anymore.
 824          */
 825         if (cpu_isset(cpu, cpu_callin_map))
 826                 return -EINVAL;
 827
 828         per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
 829         /* Processor goes to start_secondary(), sets online flag */
 830         ret = do_boot_cpu(sapicid, cpu);
 831         if (ret < 0)
 832                 return ret;
 833
 834         if (cpu_data(cpu)->threads_per_core == 1 &&
 835             cpu_data(cpu)->cores_per_socket == 1) {
 836                 cpu_set(cpu, per_cpu(cpu_sibling_map, cpu));
 837                 cpu_set(cpu, cpu_core_map[cpu]);
 838                 return 0;
 839         }
 840
 841         set_cpu_sibling_map(cpu);
 842
 843         return 0;
 844 }
 845
 846 /*
 847  * Assume that CPUs have been discovered by some platform-dependent interface.  For
 848  * SoftSDV/Lion, that would be ACPI.
 849  *
 850  * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
 851  */
 852 void __init
 853 init_smp_config(void)
 854 {
 855         struct fptr {
 856                 unsigned long fp;
 857                 unsigned long gp;
 858         } *ap_startup;
 859         long sal_ret;
 860
 861         /* Tell SAL where to drop the APs.  */
 862         ap_startup = (struct fptr *) start_ap;
 863         sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
 864                                        ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
 865         if (sal_ret < 0)
 866                 printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
 867                        ia64_sal_strerror(sal_ret));
 868 }
 869
 870 /*
 871  * identify_siblings(cpu) gets called from identify_cpu. This populates the
 872  * information related to logical execution units in per_cpu_data structure.
 873  */
 874 void __devinit
 875 identify_siblings(struct cpuinfo_ia64 *c)
 876 {
 877         s64 status;
 878         u16 pltid;
 879         pal_logical_to_physical_t info;
 880
 881         status = ia64_pal_logical_to_phys(-1, &info);
 882         if (status != PAL_STATUS_SUCCESS) {
 883                 if (status != PAL_STATUS_UNIMPLEMENTED) {
 884                         printk(KERN_ERR
 885                                 "ia64_pal_logical_to_phys failed with %ld\n",
 886                                 status);
 887                         return;
 888                 }
 889
 890                 info.overview_ppid = 0;
 891                 info.overview_cpp  = 1;
 892                 info.overview_tpc  = 1;
 893         }
 894
 895         status = ia64_sal_physical_id_info(&pltid);
 896         if (status != PAL_STATUS_SUCCESS) {
 897                 if (status != PAL_STATUS_UNIMPLEMENTED)
 898                         printk(KERN_ERR
 899                                 "ia64_sal_pltid failed with %ld\n",
 900                                 status);
 901                 return;
 902         }
 903
 904         c->socket_id =  (pltid << 8) | info.overview_ppid;
 905
 906         if (info.overview_cpp == 1 && info.overview_tpc == 1)
 907                 return;
 908
 909         c->cores_per_socket = info.overview_cpp;
 910         c->threads_per_core = info.overview_tpc;
 911         c->num_log = info.overview_num_log;
 912
 913         c->core_id = info.log1_cid;
 914         c->thread_id = info.log1_tid;
 915 }
 916
 917 /*
 918  * returns non zero, if multi-threading is enabled
 919  * on at least one physical package. Due to hotplug cpu
 920  * and (maxcpus=), all threads may not necessarily be enabled
 921  * even though the processor supports multi-threading.
 922  */
 923 int is_multithreading_enabled(void)
 924 {
 925         int i, j;
 926
 927         for_each_present_cpu(i) {
 928                 for_each_present_cpu(j) {
 929                         if (j == i)
 930                                 continue;
 931                         if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) {
 932                                 if (cpu_data(j)->core_id == cpu_data(i)->core_id)
 933                                         return 1;
 934                         }
 935                 }
 936         }
 937         return 0;
 938 }
 939 EXPORT_SYMBOL_GPL(is_multithreading_enabled);