[ARM] Support register switch in nommu mode
[linux-2.6] / include / asm-sparc / sfp-machine.h
1 /* Machine-dependent software floating-point definitions.
2    Sparc userland (_Q_*) version.
3    Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
4    This file is part of the GNU C Library.
5    Contributed by Richard Henderson (rth@cygnus.com),
6                   Jakub Jelinek (jj@ultra.linux.cz),
7                   David S. Miller (davem@redhat.com) and
8                   Peter Maydell (pmaydell@chiark.greenend.org.uk).
9
10    The GNU C Library is free software; you can redistribute it and/or
11    modify it under the terms of the GNU Library General Public License as
12    published by the Free Software Foundation; either version 2 of the
13    License, or (at your option) any later version.
14
15    The GNU C Library is distributed in the hope that it will be useful,
16    but WITHOUT ANY WARRANTY; without even the implied warranty of
17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18    Library General Public License for more details.
19
20    You should have received a copy of the GNU Library General Public
21    License along with the GNU C Library; see the file COPYING.LIB.  If
22    not, write to the Free Software Foundation, Inc.,
23    59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
24
25 #ifndef _SFP_MACHINE_H
26 #define _SFP_MACHINE_H
27
28 #include <linux/config.h>
29    
30 #define _FP_W_TYPE_SIZE         32
31 #define _FP_W_TYPE              unsigned long
32 #define _FP_WS_TYPE             signed long
33 #define _FP_I_TYPE              long
34
35 #define _FP_MUL_MEAT_S(R,X,Y)                                   \
36   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
37 #define _FP_MUL_MEAT_D(R,X,Y)                                   \
38   _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
39 #define _FP_MUL_MEAT_Q(R,X,Y)                                   \
40   _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
41
42 #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y)
43 #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv(D,R,X,Y)
44 #define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
45
46 #define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
47 #define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1), -1
48 #define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
49 #define _FP_NANSIGN_S           0
50 #define _FP_NANSIGN_D           0
51 #define _FP_NANSIGN_Q           0
52
53 #define _FP_KEEPNANFRACP 1
54
55 /* If one NaN is signaling and the other is not,
56  * we choose that one, otherwise we choose X.
57  */
58 /* For _Qp_* and _Q_*, this should prefer X, for
59  * CPU instruction emulation this should prefer Y.
60  * (see SPAMv9 B.2.2 section).
61  */
62 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
63   do {                                                          \
64     if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
65         && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
66       {                                                         \
67         R##_s = X##_s;                                          \
68         _FP_FRAC_COPY_##wc(R,X);                                \
69       }                                                         \
70     else                                                        \
71       {                                                         \
72         R##_s = Y##_s;                                          \
73         _FP_FRAC_COPY_##wc(R,Y);                                \
74       }                                                         \
75     R##_c = FP_CLS_NAN;                                         \
76   } while (0)
77
78 /* Some assembly to speed things up. */
79 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
80   __asm__ ("addcc %r7,%8,%2\n\t"                                        \
81            "addxcc %r5,%6,%1\n\t"                                       \
82            "addx %r3,%4,%0\n"                                           \
83            : "=r" ((USItype)(r2)),                                      \
84              "=&r" ((USItype)(r1)),                                     \
85              "=&r" ((USItype)(r0))                                      \
86            : "%rJ" ((USItype)(x2)),                                     \
87              "rI" ((USItype)(y2)),                                      \
88              "%rJ" ((USItype)(x1)),                                     \
89              "rI" ((USItype)(y1)),                                      \
90              "%rJ" ((USItype)(x0)),                                     \
91              "rI" ((USItype)(y0))                                       \
92            : "cc")
93
94 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
95   __asm__ ("subcc %r7,%8,%2\n\t"                                        \
96             "subxcc %r5,%6,%1\n\t"                                      \
97             "subx %r3,%4,%0\n"                                          \
98            : "=r" ((USItype)(r2)),                                      \
99              "=&r" ((USItype)(r1)),                                     \
100              "=&r" ((USItype)(r0))                                      \
101            : "%rJ" ((USItype)(x2)),                                     \
102              "rI" ((USItype)(y2)),                                      \
103              "%rJ" ((USItype)(x1)),                                     \
104              "rI" ((USItype)(y1)),                                      \
105              "%rJ" ((USItype)(x0)),                                     \
106              "rI" ((USItype)(y0))                                       \
107            : "cc")
108
109 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
110   do {                                                                  \
111     /* We need to fool gcc,  as we need to pass more than 10            \
112        input/outputs.  */                                               \
113     register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
114     __asm__ __volatile__ (                                              \
115             "addcc %r8,%9,%1\n\t"                                       \
116             "addxcc %r6,%7,%0\n\t"                                      \
117             "addxcc %r4,%5,%%g2\n\t"                                    \
118             "addx %r2,%3,%%g1\n\t"                                      \
119            : "=&r" ((USItype)(r1)),                                     \
120              "=&r" ((USItype)(r0))                                      \
121            : "%rJ" ((USItype)(x3)),                                     \
122              "rI" ((USItype)(y3)),                                      \
123              "%rJ" ((USItype)(x2)),                                     \
124              "rI" ((USItype)(y2)),                                      \
125              "%rJ" ((USItype)(x1)),                                     \
126              "rI" ((USItype)(y1)),                                      \
127              "%rJ" ((USItype)(x0)),                                     \
128              "rI" ((USItype)(y0))                                       \
129            : "cc", "g1", "g2");                                         \
130     __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
131     r3 = _t1; r2 = _t2;                                                 \
132   } while (0)
133
134 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
135   do {                                                                  \
136     /* We need to fool gcc,  as we need to pass more than 10            \
137        input/outputs.  */                                               \
138     register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
139     __asm__ __volatile__ (                                              \
140             "subcc %r8,%9,%1\n\t"                                       \
141             "subxcc %r6,%7,%0\n\t"                                      \
142             "subxcc %r4,%5,%%g2\n\t"                                    \
143             "subx %r2,%3,%%g1\n\t"                                      \
144            : "=&r" ((USItype)(r1)),                                     \
145              "=&r" ((USItype)(r0))                                      \
146            : "%rJ" ((USItype)(x3)),                                     \
147              "rI" ((USItype)(y3)),                                      \
148              "%rJ" ((USItype)(x2)),                                     \
149              "rI" ((USItype)(y2)),                                      \
150              "%rJ" ((USItype)(x1)),                                     \
151              "rI" ((USItype)(y1)),                                      \
152              "%rJ" ((USItype)(x0)),                                     \
153              "rI" ((USItype)(y0))                                       \
154            : "cc", "g1", "g2");                                         \
155     __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
156     r3 = _t1; r2 = _t2;                                                 \
157   } while (0)
158
159 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
160
161 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0)
162
163 #define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i)                                 \
164   __asm__ ("addcc %3,%4,%3\n\t"                                         \
165            "addxcc %2,%%g0,%2\n\t"                                      \
166            "addxcc %1,%%g0,%1\n\t"                                      \
167            "addx %0,%%g0,%0\n\t"                                        \
168            : "=&r" ((USItype)(x3)),                                     \
169              "=&r" ((USItype)(x2)),                                     \
170              "=&r" ((USItype)(x1)),                                     \
171              "=&r" ((USItype)(x0))                                      \
172            : "rI" ((USItype)(i)),                                       \
173              "0" ((USItype)(x3)),                                       \
174              "1" ((USItype)(x2)),                                       \
175              "2" ((USItype)(x1)),                                       \
176              "3" ((USItype)(x0))                                        \
177            : "cc")
178
179 #ifndef CONFIG_SMP
180 extern struct task_struct *last_task_used_math;
181 #endif
182
183 /* Obtain the current rounding mode. */
184 #ifndef FP_ROUNDMODE
185 #ifdef CONFIG_SMP
186 #define FP_ROUNDMODE    ((current->thread.fsr >> 30) & 0x3)
187 #else
188 #define FP_ROUNDMODE    ((last_task_used_math->thread.fsr >> 30) & 0x3)
189 #endif
190 #endif
191
192 /* Exception flags. */
193 #define FP_EX_INVALID           (1 << 4)
194 #define FP_EX_OVERFLOW          (1 << 3)
195 #define FP_EX_UNDERFLOW         (1 << 2)
196 #define FP_EX_DIVZERO           (1 << 1)
197 #define FP_EX_INEXACT           (1 << 0)
198
199 #define FP_HANDLE_EXCEPTIONS return _fex
200
201 #ifdef CONFIG_SMP
202 #define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex)
203 #else
204 #define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex)
205 #endif
206
207 #endif