2 * sma cpu5 watchdog driver
4 * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/types.h>
25 #include <linux/errno.h>
26 #include <linux/miscdevice.h>
28 #include <linux/init.h>
29 #include <linux/ioport.h>
30 #include <linux/timer.h>
31 #include <linux/completion.h>
32 #include <linux/jiffies.h>
34 #include <asm/uaccess.h>
36 #include <linux/watchdog.h>
38 /* adjustable parameters */
40 static int verbose = 0;
41 static int port = 0x91;
42 static int ticks = 10000;
44 #define PFX "cpu5wdt: "
46 #define CPU5WDT_EXTENT 0x0A
48 #define CPU5WDT_STATUS_REG 0x00
49 #define CPU5WDT_TIME_A_REG 0x02
50 #define CPU5WDT_TIME_B_REG 0x03
51 #define CPU5WDT_MODE_REG 0x04
52 #define CPU5WDT_TRIGGER_REG 0x07
53 #define CPU5WDT_ENABLE_REG 0x08
54 #define CPU5WDT_RESET_REG 0x09
56 #define CPU5WDT_INTERVAL (HZ/10+1)
58 /* some device data */
61 struct completion stop;
63 struct timer_list timer;
69 /* generic helper functions */
71 static void cpu5wdt_trigger(unsigned long unused)
74 printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks);
76 if( cpu5wdt_device.running )
79 /* keep watchdog alive */
80 outb(1, port + CPU5WDT_TRIGGER_REG);
83 if (cpu5wdt_device.queue && ticks)
84 mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
86 /* ticks doesn't matter anyway */
87 complete(&cpu5wdt_device.stop);
92 static void cpu5wdt_reset(void)
94 ticks = cpu5wdt_device.default_ticks;
97 printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks);
101 static void cpu5wdt_start(void)
103 if ( !cpu5wdt_device.queue ) {
104 cpu5wdt_device.queue = 1;
105 outb(0, port + CPU5WDT_TIME_A_REG);
106 outb(0, port + CPU5WDT_TIME_B_REG);
107 outb(1, port + CPU5WDT_MODE_REG);
108 outb(0, port + CPU5WDT_RESET_REG);
109 outb(0, port + CPU5WDT_ENABLE_REG);
110 mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
112 /* if process dies, counter is not decremented */
113 cpu5wdt_device.running++;
116 static int cpu5wdt_stop(void)
118 if ( cpu5wdt_device.running )
119 cpu5wdt_device.running = 0;
121 ticks = cpu5wdt_device.default_ticks;
124 printk(KERN_CRIT PFX "stop not possible\n");
129 /* filesystem operations */
131 static int cpu5wdt_open(struct inode *inode, struct file *file)
133 if ( test_and_set_bit(0, &cpu5wdt_device.inuse) )
136 return nonseekable_open(inode, file);
139 static int cpu5wdt_release(struct inode *inode, struct file *file)
141 clear_bit(0, &cpu5wdt_device.inuse);
145 static int cpu5wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
147 void __user *argp = (void __user *)arg;
149 static struct watchdog_info ident =
151 .options = WDIOF_CARDRESET,
152 .identity = "CPU5 WDT",
156 case WDIOC_KEEPALIVE:
159 case WDIOC_GETSTATUS:
160 value = inb(port + CPU5WDT_STATUS_REG);
161 value = (value >> 2) & 1;
162 if ( copy_to_user(argp, &value, sizeof(int)) )
165 case WDIOC_GETSUPPORT:
166 if ( copy_to_user(argp, &ident, sizeof(ident)) )
169 case WDIOC_SETOPTIONS:
170 if ( copy_from_user(&value, argp, sizeof(int)) )
173 case WDIOS_ENABLECARD:
176 case WDIOS_DISABLECARD:
177 return cpu5wdt_stop();
188 static ssize_t cpu5wdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos)
198 static const struct file_operations cpu5wdt_fops = {
199 .owner = THIS_MODULE,
201 .ioctl = cpu5wdt_ioctl,
202 .open = cpu5wdt_open,
203 .write = cpu5wdt_write,
204 .release = cpu5wdt_release,
207 static struct miscdevice cpu5wdt_misc = {
208 .minor = WATCHDOG_MINOR,
210 .fops = &cpu5wdt_fops,
213 /* init/exit function */
215 static int __devinit cpu5wdt_init(void)
221 printk(KERN_DEBUG PFX "port=0x%x, verbose=%i\n", port, verbose);
223 if ( (err = misc_register(&cpu5wdt_misc)) < 0 ) {
224 printk(KERN_ERR PFX "misc_register failed\n");
228 if ( !request_region(port, CPU5WDT_EXTENT, PFX) ) {
229 printk(KERN_ERR PFX "request_region failed\n");
234 /* watchdog reboot? */
235 val = inb(port + CPU5WDT_STATUS_REG);
236 val = (val >> 2) & 1;
238 printk(KERN_INFO PFX "sorry, was my fault\n");
240 init_completion(&cpu5wdt_device.stop);
241 cpu5wdt_device.queue = 0;
243 clear_bit(0, &cpu5wdt_device.inuse);
245 setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
247 cpu5wdt_device.default_ticks = ticks;
249 printk(KERN_INFO PFX "init success\n");
254 misc_deregister(&cpu5wdt_misc);
259 static int __devinit cpu5wdt_init_module(void)
261 return cpu5wdt_init();
264 static void __devexit cpu5wdt_exit(void)
266 if ( cpu5wdt_device.queue ) {
267 cpu5wdt_device.queue = 0;
268 wait_for_completion(&cpu5wdt_device.stop);
271 misc_deregister(&cpu5wdt_misc);
273 release_region(port, CPU5WDT_EXTENT);
277 static void __devexit cpu5wdt_exit_module(void)
282 /* module entry points */
284 module_init(cpu5wdt_init_module);
285 module_exit(cpu5wdt_exit_module);
287 MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
288 MODULE_DESCRIPTION("sma cpu5 watchdog driver");
289 MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
290 MODULE_LICENSE("GPL");
291 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
293 module_param(port, int, 0);
294 MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
296 module_param(verbose, int, 0);
297 MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
299 module_param(ticks, int, 0);
300 MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");