Merge master.kernel.org:/pub/scm/linux/kernel/git/kyle/parisc-2.6
[linux-2.6] / drivers / mtd / onenand / onenand_base.c
1 /*
2  *  linux/drivers/mtd/onenand/onenand_base.c
3  *
4  *  Copyright (C) 2005-2007 Samsung Electronics
5  *  Kyungmin Park <kyungmin.park@samsung.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
21
22 #include <asm/io.h>
23
24 /**
25  * onenand_oob_64 - oob info for large (2KB) page
26  */
27 static struct nand_ecclayout onenand_oob_64 = {
28         .eccbytes       = 20,
29         .eccpos         = {
30                 8, 9, 10, 11, 12,
31                 24, 25, 26, 27, 28,
32                 40, 41, 42, 43, 44,
33                 56, 57, 58, 59, 60,
34                 },
35         .oobfree        = {
36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
38         }
39 };
40
41 /**
42  * onenand_oob_32 - oob info for middle (1KB) page
43  */
44 static struct nand_ecclayout onenand_oob_32 = {
45         .eccbytes       = 10,
46         .eccpos         = {
47                 8, 9, 10, 11, 12,
48                 24, 25, 26, 27, 28,
49                 },
50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
51 };
52
53 static const unsigned char ffchars[] = {
54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
62 };
63
64 /**
65  * onenand_readw - [OneNAND Interface] Read OneNAND register
66  * @param addr          address to read
67  *
68  * Read OneNAND register
69  */
70 static unsigned short onenand_readw(void __iomem *addr)
71 {
72         return readw(addr);
73 }
74
75 /**
76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77  * @param value         value to write
78  * @param addr          address to write
79  *
80  * Write OneNAND register with value
81  */
82 static void onenand_writew(unsigned short value, void __iomem *addr)
83 {
84         writew(value, addr);
85 }
86
87 /**
88  * onenand_block_address - [DEFAULT] Get block address
89  * @param this          onenand chip data structure
90  * @param block         the block
91  * @return              translated block address if DDP, otherwise same
92  *
93  * Setup Start Address 1 Register (F100h)
94  */
95 static int onenand_block_address(struct onenand_chip *this, int block)
96 {
97         /* Device Flash Core select, NAND Flash Block Address */
98         if (block & this->density_mask)
99                 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
100
101         return block;
102 }
103
104 /**
105  * onenand_bufferram_address - [DEFAULT] Get bufferram address
106  * @param this          onenand chip data structure
107  * @param block         the block
108  * @return              set DBS value if DDP, otherwise 0
109  *
110  * Setup Start Address 2 Register (F101h) for DDP
111  */
112 static int onenand_bufferram_address(struct onenand_chip *this, int block)
113 {
114         /* Device BufferRAM Select */
115         if (block & this->density_mask)
116                 return ONENAND_DDP_CHIP1;
117
118         return ONENAND_DDP_CHIP0;
119 }
120
121 /**
122  * onenand_page_address - [DEFAULT] Get page address
123  * @param page          the page address
124  * @param sector        the sector address
125  * @return              combined page and sector address
126  *
127  * Setup Start Address 8 Register (F107h)
128  */
129 static int onenand_page_address(int page, int sector)
130 {
131         /* Flash Page Address, Flash Sector Address */
132         int fpa, fsa;
133
134         fpa = page & ONENAND_FPA_MASK;
135         fsa = sector & ONENAND_FSA_MASK;
136
137         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
138 }
139
140 /**
141  * onenand_buffer_address - [DEFAULT] Get buffer address
142  * @param dataram1      DataRAM index
143  * @param sectors       the sector address
144  * @param count         the number of sectors
145  * @return              the start buffer value
146  *
147  * Setup Start Buffer Register (F200h)
148  */
149 static int onenand_buffer_address(int dataram1, int sectors, int count)
150 {
151         int bsa, bsc;
152
153         /* BufferRAM Sector Address */
154         bsa = sectors & ONENAND_BSA_MASK;
155
156         if (dataram1)
157                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
158         else
159                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
160
161         /* BufferRAM Sector Count */
162         bsc = count & ONENAND_BSC_MASK;
163
164         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
165 }
166
167 /**
168  * onenand_command - [DEFAULT] Send command to OneNAND device
169  * @param mtd           MTD device structure
170  * @param cmd           the command to be sent
171  * @param addr          offset to read from or write to
172  * @param len           number of bytes to read or write
173  *
174  * Send command to OneNAND device. This function is used for middle/large page
175  * devices (1KB/2KB Bytes per page)
176  */
177 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
178 {
179         struct onenand_chip *this = mtd->priv;
180         int value, readcmd = 0, block_cmd = 0;
181         int block, page;
182
183         /* Address translation */
184         switch (cmd) {
185         case ONENAND_CMD_UNLOCK:
186         case ONENAND_CMD_LOCK:
187         case ONENAND_CMD_LOCK_TIGHT:
188         case ONENAND_CMD_UNLOCK_ALL:
189                 block = -1;
190                 page = -1;
191                 break;
192
193         case ONENAND_CMD_ERASE:
194         case ONENAND_CMD_BUFFERRAM:
195         case ONENAND_CMD_OTP_ACCESS:
196                 block_cmd = 1;
197                 block = (int) (addr >> this->erase_shift);
198                 page = -1;
199                 break;
200
201         default:
202                 block = (int) (addr >> this->erase_shift);
203                 page = (int) (addr >> this->page_shift);
204                 page &= this->page_mask;
205                 break;
206         }
207
208         /* NOTE: The setting order of the registers is very important! */
209         if (cmd == ONENAND_CMD_BUFFERRAM) {
210                 /* Select DataRAM for DDP */
211                 value = onenand_bufferram_address(this, block);
212                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
213
214                 /* Switch to the next data buffer */
215                 ONENAND_SET_NEXT_BUFFERRAM(this);
216
217                 return 0;
218         }
219
220         if (block != -1) {
221                 /* Write 'DFS, FBA' of Flash */
222                 value = onenand_block_address(this, block);
223                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
224
225                 if (block_cmd) {
226                         /* Select DataRAM for DDP */
227                         value = onenand_bufferram_address(this, block);
228                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
229                 }
230         }
231
232         if (page != -1) {
233                 /* Now we use page size operation */
234                 int sectors = 4, count = 4;
235                 int dataram;
236
237                 switch (cmd) {
238                 case ONENAND_CMD_READ:
239                 case ONENAND_CMD_READOOB:
240                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
241                         readcmd = 1;
242                         break;
243
244                 default:
245                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
246                         break;
247                 }
248
249                 /* Write 'FPA, FSA' of Flash */
250                 value = onenand_page_address(page, sectors);
251                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
252
253                 /* Write 'BSA, BSC' of DataRAM */
254                 value = onenand_buffer_address(dataram, sectors, count);
255                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
256
257                 if (readcmd) {
258                         /* Select DataRAM for DDP */
259                         value = onenand_bufferram_address(this, block);
260                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
261                 }
262         }
263
264         /* Interrupt clear */
265         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
266
267         /* Write command */
268         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
269
270         return 0;
271 }
272
273 /**
274  * onenand_wait - [DEFAULT] wait until the command is done
275  * @param mtd           MTD device structure
276  * @param state         state to select the max. timeout value
277  *
278  * Wait for command done. This applies to all OneNAND command
279  * Read can take up to 30us, erase up to 2ms and program up to 350us
280  * according to general OneNAND specs
281  */
282 static int onenand_wait(struct mtd_info *mtd, int state)
283 {
284         struct onenand_chip * this = mtd->priv;
285         unsigned long timeout;
286         unsigned int flags = ONENAND_INT_MASTER;
287         unsigned int interrupt = 0;
288         unsigned int ctrl;
289
290         /* The 20 msec is enough */
291         timeout = jiffies + msecs_to_jiffies(20);
292         while (time_before(jiffies, timeout)) {
293                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
294
295                 if (interrupt & flags)
296                         break;
297
298                 if (state != FL_READING)
299                         cond_resched();
300         }
301         /* To get correct interrupt status in timeout case */
302         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
303
304         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
305
306         if (ctrl & ONENAND_CTRL_ERROR) {
307                 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
308                 if (ctrl & ONENAND_CTRL_LOCK)
309                         printk(KERN_ERR "onenand_wait: it's locked error.\n");
310                 return ctrl;
311         }
312
313         if (interrupt & ONENAND_INT_READ) {
314                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
315                 if (ecc) {
316                         printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
317                         if (ecc & ONENAND_ECC_2BIT_ALL) {
318                                 mtd->ecc_stats.failed++;
319                                 return ecc;
320                         } else if (ecc & ONENAND_ECC_1BIT_ALL)
321                                 mtd->ecc_stats.corrected++;
322                 }
323         } else if (state == FL_READING) {
324                 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
325                 return -EIO;
326         }
327
328         return 0;
329 }
330
331 /*
332  * onenand_interrupt - [DEFAULT] onenand interrupt handler
333  * @param irq           onenand interrupt number
334  * @param dev_id        interrupt data
335  *
336  * complete the work
337  */
338 static irqreturn_t onenand_interrupt(int irq, void *data)
339 {
340         struct onenand_chip *this = (struct onenand_chip *) data;
341
342         /* To handle shared interrupt */
343         if (!this->complete.done)
344                 complete(&this->complete);
345
346         return IRQ_HANDLED;
347 }
348
349 /*
350  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
351  * @param mtd           MTD device structure
352  * @param state         state to select the max. timeout value
353  *
354  * Wait for command done.
355  */
356 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
357 {
358         struct onenand_chip *this = mtd->priv;
359
360         wait_for_completion(&this->complete);
361
362         return onenand_wait(mtd, state);
363 }
364
365 /*
366  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
367  * @param mtd           MTD device structure
368  * @param state         state to select the max. timeout value
369  *
370  * Try interrupt based wait (It is used one-time)
371  */
372 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
373 {
374         struct onenand_chip *this = mtd->priv;
375         unsigned long remain, timeout;
376
377         /* We use interrupt wait first */
378         this->wait = onenand_interrupt_wait;
379
380         timeout = msecs_to_jiffies(100);
381         remain = wait_for_completion_timeout(&this->complete, timeout);
382         if (!remain) {
383                 printk(KERN_INFO "OneNAND: There's no interrupt. "
384                                 "We use the normal wait\n");
385
386                 /* Release the irq */
387                 free_irq(this->irq, this);
388
389                 this->wait = onenand_wait;
390         }
391
392         return onenand_wait(mtd, state);
393 }
394
395 /*
396  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
397  * @param mtd           MTD device structure
398  *
399  * There's two method to wait onenand work
400  * 1. polling - read interrupt status register
401  * 2. interrupt - use the kernel interrupt method
402  */
403 static void onenand_setup_wait(struct mtd_info *mtd)
404 {
405         struct onenand_chip *this = mtd->priv;
406         int syscfg;
407
408         init_completion(&this->complete);
409
410         if (this->irq <= 0) {
411                 this->wait = onenand_wait;
412                 return;
413         }
414
415         if (request_irq(this->irq, &onenand_interrupt,
416                                 IRQF_SHARED, "onenand", this)) {
417                 /* If we can't get irq, use the normal wait */
418                 this->wait = onenand_wait;
419                 return;
420         }
421
422         /* Enable interrupt */
423         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
424         syscfg |= ONENAND_SYS_CFG1_IOBE;
425         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
426
427         this->wait = onenand_try_interrupt_wait;
428 }
429
430 /**
431  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
432  * @param mtd           MTD data structure
433  * @param area          BufferRAM area
434  * @return              offset given area
435  *
436  * Return BufferRAM offset given area
437  */
438 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
439 {
440         struct onenand_chip *this = mtd->priv;
441
442         if (ONENAND_CURRENT_BUFFERRAM(this)) {
443                 if (area == ONENAND_DATARAM)
444                         return mtd->writesize;
445                 if (area == ONENAND_SPARERAM)
446                         return mtd->oobsize;
447         }
448
449         return 0;
450 }
451
452 /**
453  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
454  * @param mtd           MTD data structure
455  * @param area          BufferRAM area
456  * @param buffer        the databuffer to put/get data
457  * @param offset        offset to read from or write to
458  * @param count         number of bytes to read/write
459  *
460  * Read the BufferRAM area
461  */
462 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
463                 unsigned char *buffer, int offset, size_t count)
464 {
465         struct onenand_chip *this = mtd->priv;
466         void __iomem *bufferram;
467
468         bufferram = this->base + area;
469
470         bufferram += onenand_bufferram_offset(mtd, area);
471
472         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
473                 unsigned short word;
474
475                 /* Align with word(16-bit) size */
476                 count--;
477
478                 /* Read word and save byte */
479                 word = this->read_word(bufferram + offset + count);
480                 buffer[count] = (word & 0xff);
481         }
482
483         memcpy(buffer, bufferram + offset, count);
484
485         return 0;
486 }
487
488 /**
489  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
490  * @param mtd           MTD data structure
491  * @param area          BufferRAM area
492  * @param buffer        the databuffer to put/get data
493  * @param offset        offset to read from or write to
494  * @param count         number of bytes to read/write
495  *
496  * Read the BufferRAM area with Sync. Burst Mode
497  */
498 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
499                 unsigned char *buffer, int offset, size_t count)
500 {
501         struct onenand_chip *this = mtd->priv;
502         void __iomem *bufferram;
503
504         bufferram = this->base + area;
505
506         bufferram += onenand_bufferram_offset(mtd, area);
507
508         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
509
510         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
511                 unsigned short word;
512
513                 /* Align with word(16-bit) size */
514                 count--;
515
516                 /* Read word and save byte */
517                 word = this->read_word(bufferram + offset + count);
518                 buffer[count] = (word & 0xff);
519         }
520
521         memcpy(buffer, bufferram + offset, count);
522
523         this->mmcontrol(mtd, 0);
524
525         return 0;
526 }
527
528 /**
529  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
530  * @param mtd           MTD data structure
531  * @param area          BufferRAM area
532  * @param buffer        the databuffer to put/get data
533  * @param offset        offset to read from or write to
534  * @param count         number of bytes to read/write
535  *
536  * Write the BufferRAM area
537  */
538 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
539                 const unsigned char *buffer, int offset, size_t count)
540 {
541         struct onenand_chip *this = mtd->priv;
542         void __iomem *bufferram;
543
544         bufferram = this->base + area;
545
546         bufferram += onenand_bufferram_offset(mtd, area);
547
548         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
549                 unsigned short word;
550                 int byte_offset;
551
552                 /* Align with word(16-bit) size */
553                 count--;
554
555                 /* Calculate byte access offset */
556                 byte_offset = offset + count;
557
558                 /* Read word and save byte */
559                 word = this->read_word(bufferram + byte_offset);
560                 word = (word & ~0xff) | buffer[count];
561                 this->write_word(word, bufferram + byte_offset);
562         }
563
564         memcpy(bufferram + offset, buffer, count);
565
566         return 0;
567 }
568
569 /**
570  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
571  * @param mtd           MTD data structure
572  * @param addr          address to check
573  * @return              1 if there are valid data, otherwise 0
574  *
575  * Check bufferram if there is data we required
576  */
577 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
578 {
579         struct onenand_chip *this = mtd->priv;
580         int blockpage, found = 0;
581         unsigned int i;
582
583         blockpage = (int) (addr >> this->page_shift);
584
585         /* Is there valid data? */
586         i = ONENAND_CURRENT_BUFFERRAM(this);
587         if (this->bufferram[i].blockpage == blockpage)
588                 found = 1;
589         else {
590                 /* Check another BufferRAM */
591                 i = ONENAND_NEXT_BUFFERRAM(this);
592                 if (this->bufferram[i].blockpage == blockpage) {
593                         ONENAND_SET_NEXT_BUFFERRAM(this);
594                         found = 1;
595                 }
596         }
597
598         if (found && ONENAND_IS_DDP(this)) {
599                 /* Select DataRAM for DDP */
600                 int block = (int) (addr >> this->erase_shift);
601                 int value = onenand_bufferram_address(this, block);
602                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
603         }
604
605         return found;
606 }
607
608 /**
609  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
610  * @param mtd           MTD data structure
611  * @param addr          address to update
612  * @param valid         valid flag
613  *
614  * Update BufferRAM information
615  */
616 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
617                 int valid)
618 {
619         struct onenand_chip *this = mtd->priv;
620         int blockpage;
621         unsigned int i;
622
623         blockpage = (int) (addr >> this->page_shift);
624
625         /* Invalidate another BufferRAM */
626         i = ONENAND_NEXT_BUFFERRAM(this);
627         if (this->bufferram[i].blockpage == blockpage)
628                 this->bufferram[i].blockpage = -1;
629
630         /* Update BufferRAM */
631         i = ONENAND_CURRENT_BUFFERRAM(this);
632         if (valid)
633                 this->bufferram[i].blockpage = blockpage;
634         else
635                 this->bufferram[i].blockpage = -1;
636 }
637
638 /**
639  * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
640  * @param mtd           MTD data structure
641  * @param addr          start address to invalidate
642  * @param len           length to invalidate
643  *
644  * Invalidate BufferRAM information
645  */
646 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
647                 unsigned int len)
648 {
649         struct onenand_chip *this = mtd->priv;
650         int i;
651         loff_t end_addr = addr + len;
652
653         /* Invalidate BufferRAM */
654         for (i = 0; i < MAX_BUFFERRAM; i++) {
655                 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
656                 if (buf_addr >= addr && buf_addr < end_addr)
657                         this->bufferram[i].blockpage = -1;
658         }
659 }
660
661 /**
662  * onenand_get_device - [GENERIC] Get chip for selected access
663  * @param mtd           MTD device structure
664  * @param new_state     the state which is requested
665  *
666  * Get the device and lock it for exclusive access
667  */
668 static int onenand_get_device(struct mtd_info *mtd, int new_state)
669 {
670         struct onenand_chip *this = mtd->priv;
671         DECLARE_WAITQUEUE(wait, current);
672
673         /*
674          * Grab the lock and see if the device is available
675          */
676         while (1) {
677                 spin_lock(&this->chip_lock);
678                 if (this->state == FL_READY) {
679                         this->state = new_state;
680                         spin_unlock(&this->chip_lock);
681                         break;
682                 }
683                 if (new_state == FL_PM_SUSPENDED) {
684                         spin_unlock(&this->chip_lock);
685                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
686                 }
687                 set_current_state(TASK_UNINTERRUPTIBLE);
688                 add_wait_queue(&this->wq, &wait);
689                 spin_unlock(&this->chip_lock);
690                 schedule();
691                 remove_wait_queue(&this->wq, &wait);
692         }
693
694         return 0;
695 }
696
697 /**
698  * onenand_release_device - [GENERIC] release chip
699  * @param mtd           MTD device structure
700  *
701  * Deselect, release chip lock and wake up anyone waiting on the device
702  */
703 static void onenand_release_device(struct mtd_info *mtd)
704 {
705         struct onenand_chip *this = mtd->priv;
706
707         /* Release the chip */
708         spin_lock(&this->chip_lock);
709         this->state = FL_READY;
710         wake_up(&this->wq);
711         spin_unlock(&this->chip_lock);
712 }
713
714 /**
715  * onenand_read - [MTD Interface] Read data from flash
716  * @param mtd           MTD device structure
717  * @param from          offset to read from
718  * @param len           number of bytes to read
719  * @param retlen        pointer to variable to store the number of read bytes
720  * @param buf           the databuffer to put data
721  *
722  * Read with ecc
723 */
724 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
725         size_t *retlen, u_char *buf)
726 {
727         struct onenand_chip *this = mtd->priv;
728         struct mtd_ecc_stats stats;
729         int read = 0, column;
730         int thislen;
731         int ret = 0, boundary = 0;
732
733         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
734
735         /* Do not allow reads past end of device */
736         if ((from + len) > mtd->size) {
737                 printk(KERN_ERR "onenand_read: Attempt read beyond end of device\n");
738                 *retlen = 0;
739                 return -EINVAL;
740         }
741
742         /* Grab the lock and see if the device is available */
743         onenand_get_device(mtd, FL_READING);
744
745         stats = mtd->ecc_stats;
746
747         /* Read-while-load method */
748
749         /* Do first load to bufferRAM */
750         if (read < len) {
751                 if (!onenand_check_bufferram(mtd, from)) {
752                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
753                         ret = this->wait(mtd, FL_READING);
754                         onenand_update_bufferram(mtd, from, !ret);
755                 }
756         }
757
758         thislen = min_t(int, mtd->writesize, len - read);
759         column = from & (mtd->writesize - 1);
760         if (column + thislen > mtd->writesize)
761                 thislen = mtd->writesize - column;
762
763         while (!ret) {
764                 /* If there is more to load then start next load */
765                 from += thislen;
766                 if (read + thislen < len) {
767                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
768                         /*
769                          * Chip boundary handling in DDP
770                          * Now we issued chip 1 read and pointed chip 1
771                          * bufferam so we have to point chip 0 bufferam.
772                          */
773                         if (ONENAND_IS_DDP(this) &&
774                             unlikely(from == (this->chipsize >> 1))) {
775                                 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
776                                 boundary = 1;
777                         } else
778                                 boundary = 0;
779                         ONENAND_SET_PREV_BUFFERRAM(this);
780                 }
781                 /* While load is going, read from last bufferRAM */
782                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
783                 /* See if we are done */
784                 read += thislen;
785                 if (read == len)
786                         break;
787                 /* Set up for next read from bufferRAM */
788                 if (unlikely(boundary))
789                         this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
790                 ONENAND_SET_NEXT_BUFFERRAM(this);
791                 buf += thislen;
792                 thislen = min_t(int, mtd->writesize, len - read);
793                 column = 0;
794                 cond_resched();
795                 /* Now wait for load */
796                 ret = this->wait(mtd, FL_READING);
797                 onenand_update_bufferram(mtd, from, !ret);
798         }
799
800         /* Deselect and wake up anyone waiting on the device */
801         onenand_release_device(mtd);
802
803         /*
804          * Return success, if no ECC failures, else -EBADMSG
805          * fs driver will take care of that, because
806          * retlen == desired len and result == -EBADMSG
807          */
808         *retlen = read;
809
810         if (mtd->ecc_stats.failed - stats.failed)
811                 return -EBADMSG;
812
813         if (ret)
814                 return ret;
815
816         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
817 }
818
819 /**
820  * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
821  * @param mtd           MTD device structure
822  * @param buf           destination address
823  * @param column        oob offset to read from
824  * @param thislen       oob length to read
825  */
826 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
827                                 int thislen)
828 {
829         struct onenand_chip *this = mtd->priv;
830         struct nand_oobfree *free;
831         int readcol = column;
832         int readend = column + thislen;
833         int lastgap = 0;
834         uint8_t *oob_buf = this->page_buf + mtd->writesize;
835
836         for (free = this->ecclayout->oobfree; free->length; ++free) {
837                 if (readcol >= lastgap)
838                         readcol += free->offset - lastgap;
839                 if (readend >= lastgap)
840                         readend += free->offset - lastgap;
841                 lastgap = free->offset + free->length;
842         }
843         this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
844         for (free = this->ecclayout->oobfree; free->length; ++free) {
845                 int free_end = free->offset + free->length;
846                 if (free->offset < readend && free_end > readcol) {
847                         int st = max_t(int,free->offset,readcol);
848                         int ed = min_t(int,free_end,readend);
849                         int n = ed - st;
850                         memcpy(buf, oob_buf + st, n);
851                         buf += n;
852                 }
853         }
854         return 0;
855 }
856
857 /**
858  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
859  * @param mtd           MTD device structure
860  * @param from          offset to read from
861  * @param len           number of bytes to read
862  * @param retlen        pointer to variable to store the number of read bytes
863  * @param buf           the databuffer to put data
864  * @param mode          operation mode
865  *
866  * OneNAND read out-of-band data from the spare area
867  */
868 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
869                         size_t *retlen, u_char *buf, mtd_oob_mode_t mode)
870 {
871         struct onenand_chip *this = mtd->priv;
872         int read = 0, thislen, column, oobsize;
873         int ret = 0;
874
875         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
876
877         /* Initialize return length value */
878         *retlen = 0;
879
880         if (mode == MTD_OOB_AUTO)
881                 oobsize = this->ecclayout->oobavail;
882         else
883                 oobsize = mtd->oobsize;
884
885         column = from & (mtd->oobsize - 1);
886
887         if (unlikely(column >= oobsize)) {
888                 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
889                 return -EINVAL;
890         }
891
892         /* Do not allow reads past end of device */
893         if (unlikely(from >= mtd->size ||
894                      column + len > ((mtd->size >> this->page_shift) -
895                                      (from >> this->page_shift)) * oobsize)) {
896                 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
897                 return -EINVAL;
898         }
899
900         /* Grab the lock and see if the device is available */
901         onenand_get_device(mtd, FL_READING);
902
903         while (read < len) {
904                 cond_resched();
905
906                 thislen = oobsize - column;
907                 thislen = min_t(int, thislen, len);
908
909                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
910
911                 onenand_update_bufferram(mtd, from, 0);
912
913                 ret = this->wait(mtd, FL_READING);
914                 /* First copy data and check return value for ECC handling */
915
916                 if (mode == MTD_OOB_AUTO)
917                         onenand_transfer_auto_oob(mtd, buf, column, thislen);
918                 else
919                         this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
920
921                 if (ret) {
922                         printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
923                         break;
924                 }
925
926                 read += thislen;
927
928                 if (read == len)
929                         break;
930
931                 buf += thislen;
932
933                 /* Read more? */
934                 if (read < len) {
935                         /* Page size */
936                         from += mtd->writesize;
937                         column = 0;
938                 }
939         }
940
941         /* Deselect and wake up anyone waiting on the device */
942         onenand_release_device(mtd);
943
944         *retlen = read;
945         return ret;
946 }
947
948 /**
949  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
950  * @mtd:        MTD device structure
951  * @from:       offset to read from
952  * @ops:        oob operation description structure
953  */
954 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
955                             struct mtd_oob_ops *ops)
956 {
957         switch (ops->mode) {
958         case MTD_OOB_PLACE:
959         case MTD_OOB_AUTO:
960                 break;
961         case MTD_OOB_RAW:
962                 /* Not implemented yet */
963         default:
964                 return -EINVAL;
965         }
966         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
967                                    &ops->oobretlen, ops->oobbuf, ops->mode);
968 }
969
970 /**
971  * onenand_bbt_wait - [DEFAULT] wait until the command is done
972  * @param mtd           MTD device structure
973  * @param state         state to select the max. timeout value
974  *
975  * Wait for command done.
976  */
977 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
978 {
979         struct onenand_chip *this = mtd->priv;
980         unsigned long timeout;
981         unsigned int interrupt;
982         unsigned int ctrl;
983
984         /* The 20 msec is enough */
985         timeout = jiffies + msecs_to_jiffies(20);
986         while (time_before(jiffies, timeout)) {
987                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
988                 if (interrupt & ONENAND_INT_MASTER)
989                         break;
990         }
991         /* To get correct interrupt status in timeout case */
992         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
993         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
994
995         if (ctrl & ONENAND_CTRL_ERROR) {
996                 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
997                 /* Initial bad block case */
998                 if (ctrl & ONENAND_CTRL_LOAD)
999                         return ONENAND_BBT_READ_ERROR;
1000                 return ONENAND_BBT_READ_FATAL_ERROR;
1001         }
1002
1003         if (interrupt & ONENAND_INT_READ) {
1004                 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1005                 if (ecc & ONENAND_ECC_2BIT_ALL)
1006                         return ONENAND_BBT_READ_ERROR;
1007         } else {
1008                 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1009                         "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1010                 return ONENAND_BBT_READ_FATAL_ERROR;
1011         }
1012
1013         return 0;
1014 }
1015
1016 /**
1017  * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1018  * @param mtd           MTD device structure
1019  * @param from          offset to read from
1020  * @param @ops          oob operation description structure
1021  *
1022  * OneNAND read out-of-band data from the spare area for bbt scan
1023  */
1024 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from, 
1025                             struct mtd_oob_ops *ops)
1026 {
1027         struct onenand_chip *this = mtd->priv;
1028         int read = 0, thislen, column;
1029         int ret = 0;
1030         size_t len = ops->ooblen;
1031         u_char *buf = ops->oobbuf;
1032
1033         DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1034
1035         /* Initialize return value */
1036         ops->oobretlen = 0;
1037
1038         /* Do not allow reads past end of device */
1039         if (unlikely((from + len) > mtd->size)) {
1040                 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1041                 return ONENAND_BBT_READ_FATAL_ERROR;
1042         }
1043
1044         /* Grab the lock and see if the device is available */
1045         onenand_get_device(mtd, FL_READING);
1046
1047         column = from & (mtd->oobsize - 1);
1048
1049         while (read < len) {
1050                 cond_resched();
1051
1052                 thislen = mtd->oobsize - column;
1053                 thislen = min_t(int, thislen, len);
1054
1055                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1056
1057                 onenand_update_bufferram(mtd, from, 0);
1058
1059                 ret = onenand_bbt_wait(mtd, FL_READING);
1060                 if (ret)
1061                         break;
1062
1063                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1064                 read += thislen;
1065                 if (read == len)
1066                         break;
1067
1068                 buf += thislen;
1069
1070                 /* Read more? */
1071                 if (read < len) {
1072                         /* Update Page size */
1073                         from += mtd->writesize;
1074                         column = 0;
1075                 }
1076         }
1077
1078         /* Deselect and wake up anyone waiting on the device */
1079         onenand_release_device(mtd);
1080
1081         ops->oobretlen = read;
1082         return ret;
1083 }
1084
1085 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1086 /**
1087  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1088  * @param mtd           MTD device structure
1089  * @param buf           the databuffer to verify
1090  * @param to            offset to read from
1091  *
1092  */
1093 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1094 {
1095         struct onenand_chip *this = mtd->priv;
1096         char *readp = this->page_buf + mtd->writesize;
1097         int status, i;
1098
1099         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1100         onenand_update_bufferram(mtd, to, 0);
1101         status = this->wait(mtd, FL_READING);
1102         if (status)
1103                 return status;
1104
1105         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, 0, mtd->oobsize);
1106         for(i = 0; i < mtd->oobsize; i++)
1107                 if (buf[i] != 0xFF && buf[i] != readp[i])
1108                         return -EBADMSG;
1109
1110         return 0;
1111 }
1112
1113 /**
1114  * onenand_verify - [GENERIC] verify the chip contents after a write
1115  * @param mtd          MTD device structure
1116  * @param buf          the databuffer to verify
1117  * @param addr         offset to read from
1118  * @param len          number of bytes to read and compare
1119  *
1120  */
1121 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1122 {
1123         struct onenand_chip *this = mtd->priv;
1124         void __iomem *dataram;
1125         int ret = 0;
1126         int thislen, column;
1127
1128         while (len != 0) {
1129                 thislen = min_t(int, mtd->writesize, len);
1130                 column = addr & (mtd->writesize - 1);
1131                 if (column + thislen > mtd->writesize)
1132                         thislen = mtd->writesize - column;
1133
1134                 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
1135
1136                 onenand_update_bufferram(mtd, addr, 0);
1137
1138                 ret = this->wait(mtd, FL_READING);
1139                 if (ret)
1140                         return ret;
1141
1142                 onenand_update_bufferram(mtd, addr, 1);
1143
1144                 dataram = this->base + ONENAND_DATARAM;
1145                 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1146
1147                 if (memcmp(buf, dataram + column, thislen))
1148                         return -EBADMSG;
1149
1150                 len -= thislen;
1151                 buf += thislen;
1152                 addr += thislen;
1153         }
1154
1155         return 0;
1156 }
1157 #else
1158 #define onenand_verify(...)             (0)
1159 #define onenand_verify_oob(...)         (0)
1160 #endif
1161
1162 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
1163
1164 /**
1165  * onenand_write - [MTD Interface] write buffer to FLASH
1166  * @param mtd           MTD device structure
1167  * @param to            offset to write to
1168  * @param len           number of bytes to write
1169  * @param retlen        pointer to variable to store the number of written bytes
1170  * @param buf           the data to write
1171  *
1172  * Write with ECC
1173  */
1174 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1175         size_t *retlen, const u_char *buf)
1176 {
1177         struct onenand_chip *this = mtd->priv;
1178         int written = 0;
1179         int ret = 0;
1180         int column, subpage;
1181
1182         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1183
1184         /* Initialize retlen, in case of early exit */
1185         *retlen = 0;
1186
1187         /* Do not allow writes past end of device */
1188         if (unlikely((to + len) > mtd->size)) {
1189                 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1190                 return -EINVAL;
1191         }
1192
1193         /* Reject writes, which are not page aligned */
1194         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1195                 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1196                 return -EINVAL;
1197         }
1198
1199         column = to & (mtd->writesize - 1);
1200
1201         /* Grab the lock and see if the device is available */
1202         onenand_get_device(mtd, FL_WRITING);
1203
1204         /* Loop until all data write */
1205         while (written < len) {
1206                 int thislen = min_t(int, mtd->writesize - column, len - written);
1207                 u_char *wbuf = (u_char *) buf;
1208
1209                 cond_resched();
1210
1211                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1212
1213                 /* Partial page write */
1214                 subpage = thislen < mtd->writesize;
1215                 if (subpage) {
1216                         memset(this->page_buf, 0xff, mtd->writesize);
1217                         memcpy(this->page_buf + column, buf, thislen);
1218                         wbuf = this->page_buf;
1219                 }
1220
1221                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1222                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1223
1224                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1225
1226                 ret = this->wait(mtd, FL_WRITING);
1227
1228                 /* In partial page write we don't update bufferram */
1229                 onenand_update_bufferram(mtd, to, !ret && !subpage);
1230
1231                 if (ret) {
1232                         printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1233                         break;
1234                 }
1235
1236                 /* Only check verify write turn on */
1237                 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1238                 if (ret) {
1239                         printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1240                         break;
1241                 }
1242
1243                 written += thislen;
1244
1245                 if (written == len)
1246                         break;
1247
1248                 column = 0;
1249                 to += thislen;
1250                 buf += thislen;
1251         }
1252
1253         /* Deselect and wake up anyone waiting on the device */
1254         onenand_release_device(mtd);
1255
1256         *retlen = written;
1257
1258         return ret;
1259 }
1260
1261 /**
1262  * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1263  * @param mtd           MTD device structure
1264  * @param oob_buf       oob buffer
1265  * @param buf           source address
1266  * @param column        oob offset to write to
1267  * @param thislen       oob length to write
1268  */
1269 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1270                                   const u_char *buf, int column, int thislen)
1271 {
1272         struct onenand_chip *this = mtd->priv;
1273         struct nand_oobfree *free;
1274         int writecol = column;
1275         int writeend = column + thislen;
1276         int lastgap = 0;
1277
1278         for (free = this->ecclayout->oobfree; free->length; ++free) {
1279                 if (writecol >= lastgap)
1280                         writecol += free->offset - lastgap;
1281                 if (writeend >= lastgap)
1282                         writeend += free->offset - lastgap;
1283                 lastgap = free->offset + free->length;
1284         }
1285         for (free = this->ecclayout->oobfree; free->length; ++free) {
1286                 int free_end = free->offset + free->length;
1287                 if (free->offset < writeend && free_end > writecol) {
1288                         int st = max_t(int,free->offset,writecol);
1289                         int ed = min_t(int,free_end,writeend);
1290                         int n = ed - st;
1291                         memcpy(oob_buf + st, buf, n);
1292                         buf += n;
1293                 }
1294         }
1295         return 0;
1296 }
1297
1298 /**
1299  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1300  * @param mtd           MTD device structure
1301  * @param to            offset to write to
1302  * @param len           number of bytes to write
1303  * @param retlen        pointer to variable to store the number of written bytes
1304  * @param buf           the data to write
1305  * @param mode          operation mode
1306  *
1307  * OneNAND write out-of-band
1308  */
1309 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1310                                 size_t *retlen, const u_char *buf, mtd_oob_mode_t mode)
1311 {
1312         struct onenand_chip *this = mtd->priv;
1313         int column, ret = 0, oobsize;
1314         int written = 0;
1315
1316         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1317
1318         /* Initialize retlen, in case of early exit */
1319         *retlen = 0;
1320
1321         if (mode == MTD_OOB_AUTO)
1322                 oobsize = this->ecclayout->oobavail;
1323         else
1324                 oobsize = mtd->oobsize;
1325
1326         column = to & (mtd->oobsize - 1);
1327
1328         if (unlikely(column >= oobsize)) {
1329                 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1330                 return -EINVAL;
1331         }
1332
1333         /* For compatibility with NAND: Do not allow write past end of page */
1334         if (column + len > oobsize) {
1335                 printk(KERN_ERR "onenand_write_oob: "
1336                       "Attempt to write past end of page\n");
1337                 return -EINVAL;
1338         }
1339
1340         /* Do not allow reads past end of device */
1341         if (unlikely(to >= mtd->size ||
1342                      column + len > ((mtd->size >> this->page_shift) -
1343                                      (to >> this->page_shift)) * oobsize)) {
1344                 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1345                 return -EINVAL;
1346         }
1347
1348         /* Grab the lock and see if the device is available */
1349         onenand_get_device(mtd, FL_WRITING);
1350
1351         /* Loop until all data write */
1352         while (written < len) {
1353                 int thislen = min_t(int, oobsize, len - written);
1354
1355                 cond_resched();
1356
1357                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1358
1359                 /* We send data to spare ram with oobsize
1360                  * to prevent byte access */
1361                 memset(this->page_buf, 0xff, mtd->oobsize);
1362                 if (mode == MTD_OOB_AUTO)
1363                         onenand_fill_auto_oob(mtd, this->page_buf, buf, column, thislen);
1364                 else
1365                         memcpy(this->page_buf + column, buf, thislen);
1366                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1367
1368                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1369
1370                 onenand_update_bufferram(mtd, to, 0);
1371
1372                 ret = this->wait(mtd, FL_WRITING);
1373                 if (ret) {
1374                         printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1375                         break;
1376                 }
1377
1378                 ret = onenand_verify_oob(mtd, this->page_buf, to);
1379                 if (ret) {
1380                         printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1381                         break;
1382                 }
1383
1384                 written += thislen;
1385                 if (written == len)
1386                         break;
1387
1388                 to += mtd->writesize;
1389                 buf += thislen;
1390                 column = 0;
1391         }
1392
1393         /* Deselect and wake up anyone waiting on the device */
1394         onenand_release_device(mtd);
1395
1396         *retlen = written;
1397
1398         return ret;
1399 }
1400
1401 /**
1402  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1403  * @mtd:        MTD device structure
1404  * @from:       offset to read from
1405  * @ops:        oob operation description structure
1406  */
1407 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1408                              struct mtd_oob_ops *ops)
1409 {
1410         switch (ops->mode) {
1411         case MTD_OOB_PLACE:
1412         case MTD_OOB_AUTO:
1413                 break;
1414         case MTD_OOB_RAW:
1415                 /* Not implemented yet */
1416         default:
1417                 return -EINVAL;
1418         }
1419         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1420                                     &ops->oobretlen, ops->oobbuf, ops->mode);
1421 }
1422
1423 /**
1424  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1425  * @param mtd           MTD device structure
1426  * @param ofs           offset from device start
1427  * @param getchip       0, if the chip is already selected
1428  * @param allowbbt      1, if its allowed to access the bbt area
1429  *
1430  * Check, if the block is bad. Either by reading the bad block table or
1431  * calling of the scan function.
1432  */
1433 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1434 {
1435         struct onenand_chip *this = mtd->priv;
1436         struct bbm_info *bbm = this->bbm;
1437
1438         /* Return info from the table */
1439         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1440 }
1441
1442 /**
1443  * onenand_erase - [MTD Interface] erase block(s)
1444  * @param mtd           MTD device structure
1445  * @param instr         erase instruction
1446  *
1447  * Erase one ore more blocks
1448  */
1449 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1450 {
1451         struct onenand_chip *this = mtd->priv;
1452         unsigned int block_size;
1453         loff_t addr;
1454         int len;
1455         int ret = 0;
1456
1457         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1458
1459         block_size = (1 << this->erase_shift);
1460
1461         /* Start address must align on block boundary */
1462         if (unlikely(instr->addr & (block_size - 1))) {
1463                 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1464                 return -EINVAL;
1465         }
1466
1467         /* Length must align on block boundary */
1468         if (unlikely(instr->len & (block_size - 1))) {
1469                 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1470                 return -EINVAL;
1471         }
1472
1473         /* Do not allow erase past end of device */
1474         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1475                 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1476                 return -EINVAL;
1477         }
1478
1479         instr->fail_addr = 0xffffffff;
1480
1481         /* Grab the lock and see if the device is available */
1482         onenand_get_device(mtd, FL_ERASING);
1483
1484         /* Loop throught the pages */
1485         len = instr->len;
1486         addr = instr->addr;
1487
1488         instr->state = MTD_ERASING;
1489
1490         while (len) {
1491                 cond_resched();
1492
1493                 /* Check if we have a bad block, we do not erase bad blocks */
1494                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1495                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1496                         instr->state = MTD_ERASE_FAILED;
1497                         goto erase_exit;
1498                 }
1499
1500                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1501
1502                 onenand_invalidate_bufferram(mtd, addr, block_size);
1503
1504                 ret = this->wait(mtd, FL_ERASING);
1505                 /* Check, if it is write protected */
1506                 if (ret) {
1507                         printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1508                         instr->state = MTD_ERASE_FAILED;
1509                         instr->fail_addr = addr;
1510                         goto erase_exit;
1511                 }
1512
1513                 len -= block_size;
1514                 addr += block_size;
1515         }
1516
1517         instr->state = MTD_ERASE_DONE;
1518
1519 erase_exit:
1520
1521         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1522         /* Do call back function */
1523         if (!ret)
1524                 mtd_erase_callback(instr);
1525
1526         /* Deselect and wake up anyone waiting on the device */
1527         onenand_release_device(mtd);
1528
1529         return ret;
1530 }
1531
1532 /**
1533  * onenand_sync - [MTD Interface] sync
1534  * @param mtd           MTD device structure
1535  *
1536  * Sync is actually a wait for chip ready function
1537  */
1538 static void onenand_sync(struct mtd_info *mtd)
1539 {
1540         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1541
1542         /* Grab the lock and see if the device is available */
1543         onenand_get_device(mtd, FL_SYNCING);
1544
1545         /* Release it and go back */
1546         onenand_release_device(mtd);
1547 }
1548
1549 /**
1550  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1551  * @param mtd           MTD device structure
1552  * @param ofs           offset relative to mtd start
1553  *
1554  * Check whether the block is bad
1555  */
1556 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1557 {
1558         /* Check for invalid offset */
1559         if (ofs > mtd->size)
1560                 return -EINVAL;
1561
1562         return onenand_block_checkbad(mtd, ofs, 1, 0);
1563 }
1564
1565 /**
1566  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1567  * @param mtd           MTD device structure
1568  * @param ofs           offset from device start
1569  *
1570  * This is the default implementation, which can be overridden by
1571  * a hardware specific driver.
1572  */
1573 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1574 {
1575         struct onenand_chip *this = mtd->priv;
1576         struct bbm_info *bbm = this->bbm;
1577         u_char buf[2] = {0, 0};
1578         size_t retlen;
1579         int block;
1580
1581         /* Get block number */
1582         block = ((int) ofs) >> bbm->bbt_erase_shift;
1583         if (bbm->bbt)
1584                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1585
1586         /* We write two bytes, so we dont have to mess with 16 bit access */
1587         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1588         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf, MTD_OOB_PLACE);
1589 }
1590
1591 /**
1592  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1593  * @param mtd           MTD device structure
1594  * @param ofs           offset relative to mtd start
1595  *
1596  * Mark the block as bad
1597  */
1598 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1599 {
1600         struct onenand_chip *this = mtd->priv;
1601         int ret;
1602
1603         ret = onenand_block_isbad(mtd, ofs);
1604         if (ret) {
1605                 /* If it was bad already, return success and do nothing */
1606                 if (ret > 0)
1607                         return 0;
1608                 return ret;
1609         }
1610
1611         return this->block_markbad(mtd, ofs);
1612 }
1613
1614 /**
1615  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1616  * @param mtd           MTD device structure
1617  * @param ofs           offset relative to mtd start
1618  * @param len           number of bytes to lock or unlock
1619  *
1620  * Lock or unlock one or more blocks
1621  */
1622 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1623 {
1624         struct onenand_chip *this = mtd->priv;
1625         int start, end, block, value, status;
1626         int wp_status_mask;
1627
1628         start = ofs >> this->erase_shift;
1629         end = len >> this->erase_shift;
1630
1631         if (cmd == ONENAND_CMD_LOCK)
1632                 wp_status_mask = ONENAND_WP_LS;
1633         else
1634                 wp_status_mask = ONENAND_WP_US;
1635
1636         /* Continuous lock scheme */
1637         if (this->options & ONENAND_HAS_CONT_LOCK) {
1638                 /* Set start block address */
1639                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1640                 /* Set end block address */
1641                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1642                 /* Write lock command */
1643                 this->command(mtd, cmd, 0, 0);
1644
1645                 /* There's no return value */
1646                 this->wait(mtd, FL_LOCKING);
1647
1648                 /* Sanity check */
1649                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1650                     & ONENAND_CTRL_ONGO)
1651                         continue;
1652
1653                 /* Check lock status */
1654                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1655                 if (!(status & wp_status_mask))
1656                         printk(KERN_ERR "wp status = 0x%x\n", status);
1657
1658                 return 0;
1659         }
1660
1661         /* Block lock scheme */
1662         for (block = start; block < start + end; block++) {
1663                 /* Set block address */
1664                 value = onenand_block_address(this, block);
1665                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1666                 /* Select DataRAM for DDP */
1667                 value = onenand_bufferram_address(this, block);
1668                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1669                 /* Set start block address */
1670                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1671                 /* Write lock command */
1672                 this->command(mtd, cmd, 0, 0);
1673
1674                 /* There's no return value */
1675                 this->wait(mtd, FL_LOCKING);
1676
1677                 /* Sanity check */
1678                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1679                     & ONENAND_CTRL_ONGO)
1680                         continue;
1681
1682                 /* Check lock status */
1683                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1684                 if (!(status & wp_status_mask))
1685                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1686         }
1687
1688         return 0;
1689 }
1690
1691 /**
1692  * onenand_lock - [MTD Interface] Lock block(s)
1693  * @param mtd           MTD device structure
1694  * @param ofs           offset relative to mtd start
1695  * @param len           number of bytes to unlock
1696  *
1697  * Lock one or more blocks
1698  */
1699 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1700 {
1701         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1702 }
1703
1704 /**
1705  * onenand_unlock - [MTD Interface] Unlock block(s)
1706  * @param mtd           MTD device structure
1707  * @param ofs           offset relative to mtd start
1708  * @param len           number of bytes to unlock
1709  *
1710  * Unlock one or more blocks
1711  */
1712 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1713 {
1714         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1715 }
1716
1717 /**
1718  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1719  * @param this          onenand chip data structure
1720  *
1721  * Check lock status
1722  */
1723 static void onenand_check_lock_status(struct onenand_chip *this)
1724 {
1725         unsigned int value, block, status;
1726         unsigned int end;
1727
1728         end = this->chipsize >> this->erase_shift;
1729         for (block = 0; block < end; block++) {
1730                 /* Set block address */
1731                 value = onenand_block_address(this, block);
1732                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1733                 /* Select DataRAM for DDP */
1734                 value = onenand_bufferram_address(this, block);
1735                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1736                 /* Set start block address */
1737                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1738
1739                 /* Check lock status */
1740                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1741                 if (!(status & ONENAND_WP_US))
1742                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1743         }
1744 }
1745
1746 /**
1747  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1748  * @param mtd           MTD device structure
1749  *
1750  * Unlock all blocks
1751  */
1752 static int onenand_unlock_all(struct mtd_info *mtd)
1753 {
1754         struct onenand_chip *this = mtd->priv;
1755
1756         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1757                 /* Set start block address */
1758                 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1759                 /* Write unlock command */
1760                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1761
1762                 /* There's no return value */
1763                 this->wait(mtd, FL_LOCKING);
1764
1765                 /* Sanity check */
1766                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1767                     & ONENAND_CTRL_ONGO)
1768                         continue;
1769
1770                 /* Workaround for all block unlock in DDP */
1771                 if (ONENAND_IS_DDP(this)) {
1772                         /* 1st block on another chip */
1773                         loff_t ofs = this->chipsize >> 1;
1774                         size_t len = mtd->erasesize;
1775
1776                         onenand_unlock(mtd, ofs, len);
1777                 }
1778
1779                 onenand_check_lock_status(this);
1780
1781                 return 0;
1782         }
1783
1784         onenand_unlock(mtd, 0x0, this->chipsize);
1785
1786         return 0;
1787 }
1788
1789 #ifdef CONFIG_MTD_ONENAND_OTP
1790
1791 /* Interal OTP operation */
1792 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1793                 size_t *retlen, u_char *buf);
1794
1795 /**
1796  * do_otp_read - [DEFAULT] Read OTP block area
1797  * @param mtd           MTD device structure
1798  * @param from          The offset to read
1799  * @param len           number of bytes to read
1800  * @param retlen        pointer to variable to store the number of readbytes
1801  * @param buf           the databuffer to put/get data
1802  *
1803  * Read OTP block area.
1804  */
1805 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1806                 size_t *retlen, u_char *buf)
1807 {
1808         struct onenand_chip *this = mtd->priv;
1809         int ret;
1810
1811         /* Enter OTP access mode */
1812         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1813         this->wait(mtd, FL_OTPING);
1814
1815         ret = mtd->read(mtd, from, len, retlen, buf);
1816
1817         /* Exit OTP access mode */
1818         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1819         this->wait(mtd, FL_RESETING);
1820
1821         return ret;
1822 }
1823
1824 /**
1825  * do_otp_write - [DEFAULT] Write OTP block area
1826  * @param mtd           MTD device structure
1827  * @param from          The offset to write
1828  * @param len           number of bytes to write
1829  * @param retlen        pointer to variable to store the number of write bytes
1830  * @param buf           the databuffer to put/get data
1831  *
1832  * Write OTP block area.
1833  */
1834 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1835                 size_t *retlen, u_char *buf)
1836 {
1837         struct onenand_chip *this = mtd->priv;
1838         unsigned char *pbuf = buf;
1839         int ret;
1840
1841         /* Force buffer page aligned */
1842         if (len < mtd->writesize) {
1843                 memcpy(this->page_buf, buf, len);
1844                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1845                 pbuf = this->page_buf;
1846                 len = mtd->writesize;
1847         }
1848
1849         /* Enter OTP access mode */
1850         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1851         this->wait(mtd, FL_OTPING);
1852
1853         ret = mtd->write(mtd, from, len, retlen, pbuf);
1854
1855         /* Exit OTP access mode */
1856         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1857         this->wait(mtd, FL_RESETING);
1858
1859         return ret;
1860 }
1861
1862 /**
1863  * do_otp_lock - [DEFAULT] Lock OTP block area
1864  * @param mtd           MTD device structure
1865  * @param from          The offset to lock
1866  * @param len           number of bytes to lock
1867  * @param retlen        pointer to variable to store the number of lock bytes
1868  * @param buf           the databuffer to put/get data
1869  *
1870  * Lock OTP block area.
1871  */
1872 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1873                 size_t *retlen, u_char *buf)
1874 {
1875         struct onenand_chip *this = mtd->priv;
1876         int ret;
1877
1878         /* Enter OTP access mode */
1879         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1880         this->wait(mtd, FL_OTPING);
1881
1882         ret = onenand_do_write_oob(mtd, from, len, retlen, buf, MTD_OOB_PLACE);
1883
1884         /* Exit OTP access mode */
1885         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1886         this->wait(mtd, FL_RESETING);
1887
1888         return ret;
1889 }
1890
1891 /**
1892  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1893  * @param mtd           MTD device structure
1894  * @param from          The offset to read/write
1895  * @param len           number of bytes to read/write
1896  * @param retlen        pointer to variable to store the number of read bytes
1897  * @param buf           the databuffer to put/get data
1898  * @param action        do given action
1899  * @param mode          specify user and factory
1900  *
1901  * Handle OTP operation.
1902  */
1903 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1904                         size_t *retlen, u_char *buf,
1905                         otp_op_t action, int mode)
1906 {
1907         struct onenand_chip *this = mtd->priv;
1908         int otp_pages;
1909         int density;
1910         int ret = 0;
1911
1912         *retlen = 0;
1913
1914         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1915         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1916                 otp_pages = 20;
1917         else
1918                 otp_pages = 10;
1919
1920         if (mode == MTD_OTP_FACTORY) {
1921                 from += mtd->writesize * otp_pages;
1922                 otp_pages = 64 - otp_pages;
1923         }
1924
1925         /* Check User/Factory boundary */
1926         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1927                 return 0;
1928
1929         while (len > 0 && otp_pages > 0) {
1930                 if (!action) {  /* OTP Info functions */
1931                         struct otp_info *otpinfo;
1932
1933                         len -= sizeof(struct otp_info);
1934                         if (len <= 0)
1935                                 return -ENOSPC;
1936
1937                         otpinfo = (struct otp_info *) buf;
1938                         otpinfo->start = from;
1939                         otpinfo->length = mtd->writesize;
1940                         otpinfo->locked = 0;
1941
1942                         from += mtd->writesize;
1943                         buf += sizeof(struct otp_info);
1944                         *retlen += sizeof(struct otp_info);
1945                 } else {
1946                         size_t tmp_retlen;
1947                         int size = len;
1948
1949                         ret = action(mtd, from, len, &tmp_retlen, buf);
1950
1951                         buf += size;
1952                         len -= size;
1953                         *retlen += size;
1954
1955                         if (ret < 0)
1956                                 return ret;
1957                 }
1958                 otp_pages--;
1959         }
1960
1961         return 0;
1962 }
1963
1964 /**
1965  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1966  * @param mtd           MTD device structure
1967  * @param buf           the databuffer to put/get data
1968  * @param len           number of bytes to read
1969  *
1970  * Read factory OTP info.
1971  */
1972 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1973                         struct otp_info *buf, size_t len)
1974 {
1975         size_t retlen;
1976         int ret;
1977
1978         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1979
1980         return ret ? : retlen;
1981 }
1982
1983 /**
1984  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1985  * @param mtd           MTD device structure
1986  * @param from          The offset to read
1987  * @param len           number of bytes to read
1988  * @param retlen        pointer to variable to store the number of read bytes
1989  * @param buf           the databuffer to put/get data
1990  *
1991  * Read factory OTP area.
1992  */
1993 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1994                         size_t len, size_t *retlen, u_char *buf)
1995 {
1996         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1997 }
1998
1999 /**
2000  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2001  * @param mtd           MTD device structure
2002  * @param buf           the databuffer to put/get data
2003  * @param len           number of bytes to read
2004  *
2005  * Read user OTP info.
2006  */
2007 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2008                         struct otp_info *buf, size_t len)
2009 {
2010         size_t retlen;
2011         int ret;
2012
2013         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2014
2015         return ret ? : retlen;
2016 }
2017
2018 /**
2019  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2020  * @param mtd           MTD device structure
2021  * @param from          The offset to read
2022  * @param len           number of bytes to read
2023  * @param retlen        pointer to variable to store the number of read bytes
2024  * @param buf           the databuffer to put/get data
2025  *
2026  * Read user OTP area.
2027  */
2028 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2029                         size_t len, size_t *retlen, u_char *buf)
2030 {
2031         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2032 }
2033
2034 /**
2035  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2036  * @param mtd           MTD device structure
2037  * @param from          The offset to write
2038  * @param len           number of bytes to write
2039  * @param retlen        pointer to variable to store the number of write bytes
2040  * @param buf           the databuffer to put/get data
2041  *
2042  * Write user OTP area.
2043  */
2044 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2045                         size_t len, size_t *retlen, u_char *buf)
2046 {
2047         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2048 }
2049
2050 /**
2051  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2052  * @param mtd           MTD device structure
2053  * @param from          The offset to lock
2054  * @param len           number of bytes to unlock
2055  *
2056  * Write lock mark on spare area in page 0 in OTP block
2057  */
2058 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2059                         size_t len)
2060 {
2061         unsigned char oob_buf[64];
2062         size_t retlen;
2063         int ret;
2064
2065         memset(oob_buf, 0xff, mtd->oobsize);
2066         /*
2067          * Note: OTP lock operation
2068          *       OTP block : 0xXXFC
2069          *       1st block : 0xXXF3 (If chip support)
2070          *       Both      : 0xXXF0 (If chip support)
2071          */
2072         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2073
2074         /*
2075          * Write lock mark to 8th word of sector0 of page0 of the spare0.
2076          * We write 16 bytes spare area instead of 2 bytes.
2077          */
2078         from = 0;
2079         len = 16;
2080
2081         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2082
2083         return ret ? : retlen;
2084 }
2085 #endif  /* CONFIG_MTD_ONENAND_OTP */
2086
2087 /**
2088  * onenand_check_features - Check and set OneNAND features
2089  * @param mtd           MTD data structure
2090  *
2091  * Check and set OneNAND features
2092  * - lock scheme
2093  */
2094 static void onenand_check_features(struct mtd_info *mtd)
2095 {
2096         struct onenand_chip *this = mtd->priv;
2097         unsigned int density, process;
2098
2099         /* Lock scheme depends on density and process */
2100         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2101         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2102
2103         /* Lock scheme */
2104         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
2105                 /* A-Die has all block unlock */
2106                 if (process) {
2107                         printk(KERN_DEBUG "Chip support all block unlock\n");
2108                         this->options |= ONENAND_HAS_UNLOCK_ALL;
2109                 }
2110         } else {
2111                 /* Some OneNAND has continues lock scheme */
2112                 if (!process) {
2113                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
2114                         this->options |= ONENAND_HAS_CONT_LOCK;
2115                 }
2116         }
2117 }
2118
2119 /**
2120  * onenand_print_device_info - Print device ID
2121  * @param device        device ID
2122  *
2123  * Print device ID
2124  */
2125 static void onenand_print_device_info(int device, int version)
2126 {
2127         int vcc, demuxed, ddp, density;
2128
2129         vcc = device & ONENAND_DEVICE_VCC_MASK;
2130         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2131         ddp = device & ONENAND_DEVICE_IS_DDP;
2132         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2133         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2134                 demuxed ? "" : "Muxed ",
2135                 ddp ? "(DDP)" : "",
2136                 (16 << density),
2137                 vcc ? "2.65/3.3" : "1.8",
2138                 device);
2139         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2140 }
2141
2142 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2143         {ONENAND_MFR_SAMSUNG, "Samsung"},
2144 };
2145
2146 /**
2147  * onenand_check_maf - Check manufacturer ID
2148  * @param manuf         manufacturer ID
2149  *
2150  * Check manufacturer ID
2151  */
2152 static int onenand_check_maf(int manuf)
2153 {
2154         int size = ARRAY_SIZE(onenand_manuf_ids);
2155         char *name;
2156         int i;
2157
2158         for (i = 0; i < size; i++)
2159                 if (manuf == onenand_manuf_ids[i].id)
2160                         break;
2161
2162         if (i < size)
2163                 name = onenand_manuf_ids[i].name;
2164         else
2165                 name = "Unknown";
2166
2167         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2168
2169         return (i == size);
2170 }
2171
2172 /**
2173  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2174  * @param mtd           MTD device structure
2175  *
2176  * OneNAND detection method:
2177  *   Compare the the values from command with ones from register
2178  */
2179 static int onenand_probe(struct mtd_info *mtd)
2180 {
2181         struct onenand_chip *this = mtd->priv;
2182         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2183         int density;
2184         int syscfg;
2185
2186         /* Save system configuration 1 */
2187         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2188         /* Clear Sync. Burst Read mode to read BootRAM */
2189         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2190
2191         /* Send the command for reading device ID from BootRAM */
2192         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2193
2194         /* Read manufacturer and device IDs from BootRAM */
2195         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2196         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2197
2198         /* Reset OneNAND to read default register values */
2199         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2200         /* Wait reset */
2201         this->wait(mtd, FL_RESETING);
2202
2203         /* Restore system configuration 1 */
2204         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2205
2206         /* Check manufacturer ID */
2207         if (onenand_check_maf(bram_maf_id))
2208                 return -ENXIO;
2209
2210         /* Read manufacturer and device IDs from Register */
2211         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2212         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2213         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2214
2215         /* Check OneNAND device */
2216         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2217                 return -ENXIO;
2218
2219         /* Flash device information */
2220         onenand_print_device_info(dev_id, ver_id);
2221         this->device_id = dev_id;
2222         this->version_id = ver_id;
2223
2224         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2225         this->chipsize = (16 << density) << 20;
2226         /* Set density mask. it is used for DDP */
2227         if (ONENAND_IS_DDP(this))
2228                 this->density_mask = (1 << (density + 6));
2229         else
2230                 this->density_mask = 0;
2231
2232         /* OneNAND page size & block size */
2233         /* The data buffer size is equal to page size */
2234         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2235         mtd->oobsize = mtd->writesize >> 5;
2236         /* Pages per a block are always 64 in OneNAND */
2237         mtd->erasesize = mtd->writesize << 6;
2238
2239         this->erase_shift = ffs(mtd->erasesize) - 1;
2240         this->page_shift = ffs(mtd->writesize) - 1;
2241         this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2242
2243         /* REVIST: Multichip handling */
2244
2245         mtd->size = this->chipsize;
2246
2247         /* Check OneNAND features */
2248         onenand_check_features(mtd);
2249
2250         return 0;
2251 }
2252
2253 /**
2254  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2255  * @param mtd           MTD device structure
2256  */
2257 static int onenand_suspend(struct mtd_info *mtd)
2258 {
2259         return onenand_get_device(mtd, FL_PM_SUSPENDED);
2260 }
2261
2262 /**
2263  * onenand_resume - [MTD Interface] Resume the OneNAND flash
2264  * @param mtd           MTD device structure
2265  */
2266 static void onenand_resume(struct mtd_info *mtd)
2267 {
2268         struct onenand_chip *this = mtd->priv;
2269
2270         if (this->state == FL_PM_SUSPENDED)
2271                 onenand_release_device(mtd);
2272         else
2273                 printk(KERN_ERR "resume() called for the chip which is not"
2274                                 "in suspended state\n");
2275 }
2276
2277 /**
2278  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2279  * @param mtd           MTD device structure
2280  * @param maxchips      Number of chips to scan for
2281  *
2282  * This fills out all the not initialized function pointers
2283  * with the defaults.
2284  * The flash ID is read and the mtd/chip structures are
2285  * filled with the appropriate values.
2286  */
2287 int onenand_scan(struct mtd_info *mtd, int maxchips)
2288 {
2289         int i;
2290         struct onenand_chip *this = mtd->priv;
2291
2292         if (!this->read_word)
2293                 this->read_word = onenand_readw;
2294         if (!this->write_word)
2295                 this->write_word = onenand_writew;
2296
2297         if (!this->command)
2298                 this->command = onenand_command;
2299         if (!this->wait)
2300                 onenand_setup_wait(mtd);
2301
2302         if (!this->read_bufferram)
2303                 this->read_bufferram = onenand_read_bufferram;
2304         if (!this->write_bufferram)
2305                 this->write_bufferram = onenand_write_bufferram;
2306
2307         if (!this->block_markbad)
2308                 this->block_markbad = onenand_default_block_markbad;
2309         if (!this->scan_bbt)
2310                 this->scan_bbt = onenand_default_bbt;
2311
2312         if (onenand_probe(mtd))
2313                 return -ENXIO;
2314
2315         /* Set Sync. Burst Read after probing */
2316         if (this->mmcontrol) {
2317                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2318                 this->read_bufferram = onenand_sync_read_bufferram;
2319         }
2320
2321         /* Allocate buffers, if necessary */
2322         if (!this->page_buf) {
2323                 size_t len;
2324                 len = mtd->writesize + mtd->oobsize;
2325                 this->page_buf = kmalloc(len, GFP_KERNEL);
2326                 if (!this->page_buf) {
2327                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2328                         return -ENOMEM;
2329                 }
2330                 this->options |= ONENAND_PAGEBUF_ALLOC;
2331         }
2332
2333         this->state = FL_READY;
2334         init_waitqueue_head(&this->wq);
2335         spin_lock_init(&this->chip_lock);
2336
2337         /*
2338          * Allow subpage writes up to oobsize.
2339          */
2340         switch (mtd->oobsize) {
2341         case 64:
2342                 this->ecclayout = &onenand_oob_64;
2343                 mtd->subpage_sft = 2;
2344                 break;
2345
2346         case 32:
2347                 this->ecclayout = &onenand_oob_32;
2348                 mtd->subpage_sft = 1;
2349                 break;
2350
2351         default:
2352                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2353                         mtd->oobsize);
2354                 mtd->subpage_sft = 0;
2355                 /* To prevent kernel oops */
2356                 this->ecclayout = &onenand_oob_32;
2357                 break;
2358         }
2359
2360         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2361
2362         /*
2363          * The number of bytes available for a client to place data into
2364          * the out of band area
2365          */
2366         this->ecclayout->oobavail = 0;
2367         for (i = 0; this->ecclayout->oobfree[i].length; i++)
2368                 this->ecclayout->oobavail +=
2369                         this->ecclayout->oobfree[i].length;
2370
2371         mtd->ecclayout = this->ecclayout;
2372
2373         /* Fill in remaining MTD driver data */
2374         mtd->type = MTD_NANDFLASH;
2375         mtd->flags = MTD_CAP_NANDFLASH;
2376         mtd->erase = onenand_erase;
2377         mtd->point = NULL;
2378         mtd->unpoint = NULL;
2379         mtd->read = onenand_read;
2380         mtd->write = onenand_write;
2381         mtd->read_oob = onenand_read_oob;
2382         mtd->write_oob = onenand_write_oob;
2383 #ifdef CONFIG_MTD_ONENAND_OTP
2384         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2385         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2386         mtd->get_user_prot_info = onenand_get_user_prot_info;
2387         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2388         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2389         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2390 #endif
2391         mtd->sync = onenand_sync;
2392         mtd->lock = onenand_lock;
2393         mtd->unlock = onenand_unlock;
2394         mtd->suspend = onenand_suspend;
2395         mtd->resume = onenand_resume;
2396         mtd->block_isbad = onenand_block_isbad;
2397         mtd->block_markbad = onenand_block_markbad;
2398         mtd->owner = THIS_MODULE;
2399
2400         /* Unlock whole block */
2401         onenand_unlock_all(mtd);
2402
2403         return this->scan_bbt(mtd);
2404 }
2405
2406 /**
2407  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2408  * @param mtd           MTD device structure
2409  */
2410 void onenand_release(struct mtd_info *mtd)
2411 {
2412         struct onenand_chip *this = mtd->priv;
2413
2414 #ifdef CONFIG_MTD_PARTITIONS
2415         /* Deregister partitions */
2416         del_mtd_partitions (mtd);
2417 #endif
2418         /* Deregister the device */
2419         del_mtd_device (mtd);
2420
2421         /* Free bad block table memory, if allocated */
2422         if (this->bbm) {
2423                 struct bbm_info *bbm = this->bbm;
2424                 kfree(bbm->bbt);
2425                 kfree(this->bbm);
2426         }
2427         /* Buffer allocated by onenand_scan */
2428         if (this->options & ONENAND_PAGEBUF_ALLOC)
2429                 kfree(this->page_buf);
2430 }
2431
2432 EXPORT_SYMBOL_GPL(onenand_scan);
2433 EXPORT_SYMBOL_GPL(onenand_release);
2434
2435 MODULE_LICENSE("GPL");
2436 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2437 MODULE_DESCRIPTION("Generic OneNAND flash driver code");