2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
12 #include <linux/delay.h>
13 #include <linux/highmem.h>
14 #include <linux/pci.h>
15 #include <linux/dma-mapping.h>
17 #include <linux/mmc/host.h>
18 #include <linux/mmc/protocol.h>
20 #include <asm/scatterlist.h>
24 #define DRIVER_NAME "sdhci"
25 #define DRIVER_VERSION "0.12"
27 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
29 #define DBG(f, x...) \
30 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
32 static unsigned int debug_nodma = 0;
33 static unsigned int debug_forcedma = 0;
34 static unsigned int debug_quirks = 0;
36 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
37 #define SDHCI_QUIRK_FORCE_DMA (1<<1)
38 /* Controller doesn't like some resets when there is no card inserted. */
39 #define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<2)
41 static const struct pci_device_id pci_ids[] __devinitdata = {
43 .vendor = PCI_VENDOR_ID_RICOH,
44 .device = PCI_DEVICE_ID_RICOH_R5C822,
45 .subvendor = PCI_VENDOR_ID_IBM,
46 .subdevice = PCI_ANY_ID,
47 .driver_data = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
48 SDHCI_QUIRK_FORCE_DMA,
52 .vendor = PCI_VENDOR_ID_RICOH,
53 .device = PCI_DEVICE_ID_RICOH_R5C822,
54 .subvendor = PCI_ANY_ID,
55 .subdevice = PCI_ANY_ID,
56 .driver_data = SDHCI_QUIRK_FORCE_DMA |
57 SDHCI_QUIRK_NO_CARD_NO_RESET,
61 .vendor = PCI_VENDOR_ID_TI,
62 .device = PCI_DEVICE_ID_TI_XX21_XX11_SD,
63 .subvendor = PCI_ANY_ID,
64 .subdevice = PCI_ANY_ID,
65 .driver_data = SDHCI_QUIRK_FORCE_DMA,
68 { /* Generic SD host controller */
69 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
72 { /* end: all zeroes */ },
75 MODULE_DEVICE_TABLE(pci, pci_ids);
77 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
78 static void sdhci_finish_data(struct sdhci_host *);
80 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
81 static void sdhci_finish_command(struct sdhci_host *);
83 static void sdhci_dumpregs(struct sdhci_host *host)
85 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
87 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
88 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
89 readw(host->ioaddr + SDHCI_HOST_VERSION));
90 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
91 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
92 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
93 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
94 readl(host->ioaddr + SDHCI_ARGUMENT),
95 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
96 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
97 readl(host->ioaddr + SDHCI_PRESENT_STATE),
98 readb(host->ioaddr + SDHCI_HOST_CONTROL));
99 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
100 readb(host->ioaddr + SDHCI_POWER_CONTROL),
101 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
102 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
103 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
104 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
105 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
106 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
107 readl(host->ioaddr + SDHCI_INT_STATUS));
108 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
109 readl(host->ioaddr + SDHCI_INT_ENABLE),
110 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
111 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
112 readw(host->ioaddr + SDHCI_ACMD12_ERR),
113 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
114 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
115 readl(host->ioaddr + SDHCI_CAPABILITIES),
116 readl(host->ioaddr + SDHCI_MAX_CURRENT));
118 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
121 /*****************************************************************************\
123 * Low level functions *
125 \*****************************************************************************/
127 static void sdhci_reset(struct sdhci_host *host, u8 mask)
129 unsigned long timeout;
131 if (host->chip->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
132 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) &
137 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
139 if (mask & SDHCI_RESET_ALL)
142 /* Wait max 100 ms */
145 /* hw clears the bit when it's done */
146 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
148 printk(KERN_ERR "%s: Reset 0x%x never completed. "
149 "Please report this to " BUGMAIL ".\n",
150 mmc_hostname(host->mmc), (int)mask);
151 sdhci_dumpregs(host);
159 static void sdhci_init(struct sdhci_host *host)
163 sdhci_reset(host, SDHCI_RESET_ALL);
165 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
166 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
167 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
168 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
169 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
170 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
172 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
173 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
176 static void sdhci_activate_led(struct sdhci_host *host)
180 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
181 ctrl |= SDHCI_CTRL_LED;
182 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
185 static void sdhci_deactivate_led(struct sdhci_host *host)
189 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
190 ctrl &= ~SDHCI_CTRL_LED;
191 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
194 /*****************************************************************************\
198 \*****************************************************************************/
200 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
202 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
203 return host->mapped_sg + host->cur_sg->offset;
206 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
208 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
211 static inline int sdhci_next_sg(struct sdhci_host* host)
214 * Skip to next SG entry.
222 if (host->num_sg > 0) {
224 host->remain = host->cur_sg->length;
230 static void sdhci_read_block_pio(struct sdhci_host *host)
232 int blksize, chunk_remain;
237 DBG("PIO reading\n");
239 blksize = host->data->blksz;
243 buffer = sdhci_kmap_sg(host) + host->offset;
246 if (chunk_remain == 0) {
247 data = readl(host->ioaddr + SDHCI_BUFFER);
248 chunk_remain = min(blksize, 4);
251 size = min(host->size, host->remain);
252 size = min(size, chunk_remain);
254 chunk_remain -= size;
256 host->offset += size;
257 host->remain -= size;
260 *buffer = data & 0xFF;
266 if (host->remain == 0) {
267 sdhci_kunmap_sg(host);
268 if (sdhci_next_sg(host) == 0) {
269 BUG_ON(blksize != 0);
272 buffer = sdhci_kmap_sg(host);
276 sdhci_kunmap_sg(host);
279 static void sdhci_write_block_pio(struct sdhci_host *host)
281 int blksize, chunk_remain;
286 DBG("PIO writing\n");
288 blksize = host->data->blksz;
293 buffer = sdhci_kmap_sg(host) + host->offset;
296 size = min(host->size, host->remain);
297 size = min(size, chunk_remain);
299 chunk_remain -= size;
301 host->offset += size;
302 host->remain -= size;
306 data |= (u32)*buffer << 24;
311 if (chunk_remain == 0) {
312 writel(data, host->ioaddr + SDHCI_BUFFER);
313 chunk_remain = min(blksize, 4);
316 if (host->remain == 0) {
317 sdhci_kunmap_sg(host);
318 if (sdhci_next_sg(host) == 0) {
319 BUG_ON(blksize != 0);
322 buffer = sdhci_kmap_sg(host);
326 sdhci_kunmap_sg(host);
329 static void sdhci_transfer_pio(struct sdhci_host *host)
338 if (host->data->flags & MMC_DATA_READ)
339 mask = SDHCI_DATA_AVAILABLE;
341 mask = SDHCI_SPACE_AVAILABLE;
343 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
344 if (host->data->flags & MMC_DATA_READ)
345 sdhci_read_block_pio(host);
347 sdhci_write_block_pio(host);
352 BUG_ON(host->num_sg == 0);
355 DBG("PIO transfer complete.\n");
358 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
361 unsigned target_timeout, current_timeout;
368 DBG("blksz %04x blks %04x flags %08x\n",
369 data->blksz, data->blocks, data->flags);
370 DBG("tsac %d ms nsac %d clk\n",
371 data->timeout_ns / 1000000, data->timeout_clks);
374 BUG_ON(data->blksz * data->blocks > 524288);
375 BUG_ON(data->blksz > host->max_block);
376 BUG_ON(data->blocks > 65535);
379 target_timeout = data->timeout_ns / 1000 +
380 data->timeout_clks / host->clock;
383 * Figure out needed cycles.
384 * We do this in steps in order to fit inside a 32 bit int.
385 * The first step is the minimum timeout, which will have a
386 * minimum resolution of 6 bits:
387 * (1) 2^13*1000 > 2^22,
388 * (2) host->timeout_clk < 2^16
393 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
394 while (current_timeout < target_timeout) {
396 current_timeout <<= 1;
402 printk(KERN_WARNING "%s: Too large timeout requested!\n",
403 mmc_hostname(host->mmc));
407 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
409 if (host->flags & SDHCI_USE_DMA) {
412 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
413 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
416 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
418 host->size = data->blksz * data->blocks;
420 host->cur_sg = data->sg;
421 host->num_sg = data->sg_len;
424 host->remain = host->cur_sg->length;
427 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
428 writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
429 host->ioaddr + SDHCI_BLOCK_SIZE);
430 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
433 static void sdhci_set_transfer_mode(struct sdhci_host *host,
434 struct mmc_data *data)
443 mode = SDHCI_TRNS_BLK_CNT_EN;
444 if (data->blocks > 1)
445 mode |= SDHCI_TRNS_MULTI;
446 if (data->flags & MMC_DATA_READ)
447 mode |= SDHCI_TRNS_READ;
448 if (host->flags & SDHCI_USE_DMA)
449 mode |= SDHCI_TRNS_DMA;
451 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
454 static void sdhci_finish_data(struct sdhci_host *host)
456 struct mmc_data *data;
464 if (host->flags & SDHCI_USE_DMA) {
465 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
466 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
470 * Controller doesn't count down when in single block mode.
472 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
475 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
476 data->bytes_xfered = data->blksz * (data->blocks - blocks);
478 if ((data->error == MMC_ERR_NONE) && blocks) {
479 printk(KERN_ERR "%s: Controller signalled completion even "
480 "though there were blocks left. Please report this "
481 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
482 data->error = MMC_ERR_FAILED;
483 } else if (host->size != 0) {
484 printk(KERN_ERR "%s: %d bytes were left untransferred. "
485 "Please report this to " BUGMAIL ".\n",
486 mmc_hostname(host->mmc), host->size);
487 data->error = MMC_ERR_FAILED;
490 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
494 * The controller needs a reset of internal state machines
495 * upon error conditions.
497 if (data->error != MMC_ERR_NONE) {
498 sdhci_reset(host, SDHCI_RESET_CMD);
499 sdhci_reset(host, SDHCI_RESET_DATA);
502 sdhci_send_command(host, data->stop);
504 tasklet_schedule(&host->finish_tasklet);
507 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
511 unsigned long timeout;
515 DBG("Sending cmd (%x)\n", cmd->opcode);
520 mask = SDHCI_CMD_INHIBIT;
521 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
522 mask |= SDHCI_DATA_INHIBIT;
524 /* We shouldn't wait for data inihibit for stop commands, even
525 though they might use busy signaling */
526 if (host->mrq->data && (cmd == host->mrq->data->stop))
527 mask &= ~SDHCI_DATA_INHIBIT;
529 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
531 printk(KERN_ERR "%s: Controller never released "
532 "inhibit bit(s). Please report this to "
533 BUGMAIL ".\n", mmc_hostname(host->mmc));
534 sdhci_dumpregs(host);
535 cmd->error = MMC_ERR_FAILED;
536 tasklet_schedule(&host->finish_tasklet);
543 mod_timer(&host->timer, jiffies + 10 * HZ);
547 sdhci_prepare_data(host, cmd->data);
549 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
551 sdhci_set_transfer_mode(host, cmd->data);
553 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
554 printk(KERN_ERR "%s: Unsupported response type! "
555 "Please report this to " BUGMAIL ".\n",
556 mmc_hostname(host->mmc));
557 cmd->error = MMC_ERR_INVALID;
558 tasklet_schedule(&host->finish_tasklet);
562 if (!(cmd->flags & MMC_RSP_PRESENT))
563 flags = SDHCI_CMD_RESP_NONE;
564 else if (cmd->flags & MMC_RSP_136)
565 flags = SDHCI_CMD_RESP_LONG;
566 else if (cmd->flags & MMC_RSP_BUSY)
567 flags = SDHCI_CMD_RESP_SHORT_BUSY;
569 flags = SDHCI_CMD_RESP_SHORT;
571 if (cmd->flags & MMC_RSP_CRC)
572 flags |= SDHCI_CMD_CRC;
573 if (cmd->flags & MMC_RSP_OPCODE)
574 flags |= SDHCI_CMD_INDEX;
576 flags |= SDHCI_CMD_DATA;
578 writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
579 host->ioaddr + SDHCI_COMMAND);
582 static void sdhci_finish_command(struct sdhci_host *host)
586 BUG_ON(host->cmd == NULL);
588 if (host->cmd->flags & MMC_RSP_PRESENT) {
589 if (host->cmd->flags & MMC_RSP_136) {
590 /* CRC is stripped so we need to do some shifting. */
591 for (i = 0;i < 4;i++) {
592 host->cmd->resp[i] = readl(host->ioaddr +
593 SDHCI_RESPONSE + (3-i)*4) << 8;
595 host->cmd->resp[i] |=
597 SDHCI_RESPONSE + (3-i)*4-1);
600 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
604 host->cmd->error = MMC_ERR_NONE;
606 DBG("Ending cmd (%x)\n", host->cmd->opcode);
609 host->data = host->cmd->data;
611 tasklet_schedule(&host->finish_tasklet);
616 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
620 unsigned long timeout;
622 if (clock == host->clock)
625 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
630 for (div = 1;div < 256;div *= 2) {
631 if ((host->max_clk / div) <= clock)
636 clk = div << SDHCI_DIVIDER_SHIFT;
637 clk |= SDHCI_CLOCK_INT_EN;
638 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
642 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
643 & SDHCI_CLOCK_INT_STABLE)) {
645 printk(KERN_ERR "%s: Internal clock never stabilised. "
646 "Please report this to " BUGMAIL ".\n",
647 mmc_hostname(host->mmc));
648 sdhci_dumpregs(host);
655 clk |= SDHCI_CLOCK_CARD_EN;
656 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
662 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
666 if (host->power == power)
669 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
671 if (power == (unsigned short)-1)
674 pwr = SDHCI_POWER_ON;
680 pwr |= SDHCI_POWER_180;
685 pwr |= SDHCI_POWER_300;
690 pwr |= SDHCI_POWER_330;
696 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
702 /*****************************************************************************\
706 \*****************************************************************************/
708 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
710 struct sdhci_host *host;
713 host = mmc_priv(mmc);
715 spin_lock_irqsave(&host->lock, flags);
717 WARN_ON(host->mrq != NULL);
719 sdhci_activate_led(host);
723 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
724 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
725 tasklet_schedule(&host->finish_tasklet);
727 sdhci_send_command(host, mrq->cmd);
730 spin_unlock_irqrestore(&host->lock, flags);
733 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
735 struct sdhci_host *host;
739 host = mmc_priv(mmc);
741 spin_lock_irqsave(&host->lock, flags);
744 * Reset the chip on each power off.
745 * Should clear out any weird states.
747 if (ios->power_mode == MMC_POWER_OFF) {
748 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
752 sdhci_set_clock(host, ios->clock);
754 if (ios->power_mode == MMC_POWER_OFF)
755 sdhci_set_power(host, -1);
757 sdhci_set_power(host, ios->vdd);
759 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
760 if (ios->bus_width == MMC_BUS_WIDTH_4)
761 ctrl |= SDHCI_CTRL_4BITBUS;
763 ctrl &= ~SDHCI_CTRL_4BITBUS;
764 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
767 spin_unlock_irqrestore(&host->lock, flags);
770 static int sdhci_get_ro(struct mmc_host *mmc)
772 struct sdhci_host *host;
776 host = mmc_priv(mmc);
778 spin_lock_irqsave(&host->lock, flags);
780 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
782 spin_unlock_irqrestore(&host->lock, flags);
784 return !(present & SDHCI_WRITE_PROTECT);
787 static struct mmc_host_ops sdhci_ops = {
788 .request = sdhci_request,
789 .set_ios = sdhci_set_ios,
790 .get_ro = sdhci_get_ro,
793 /*****************************************************************************\
797 \*****************************************************************************/
799 static void sdhci_tasklet_card(unsigned long param)
801 struct sdhci_host *host;
804 host = (struct sdhci_host*)param;
806 spin_lock_irqsave(&host->lock, flags);
808 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
810 printk(KERN_ERR "%s: Card removed during transfer!\n",
811 mmc_hostname(host->mmc));
812 printk(KERN_ERR "%s: Resetting controller.\n",
813 mmc_hostname(host->mmc));
815 sdhci_reset(host, SDHCI_RESET_CMD);
816 sdhci_reset(host, SDHCI_RESET_DATA);
818 host->mrq->cmd->error = MMC_ERR_FAILED;
819 tasklet_schedule(&host->finish_tasklet);
823 spin_unlock_irqrestore(&host->lock, flags);
825 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
828 static void sdhci_tasklet_finish(unsigned long param)
830 struct sdhci_host *host;
832 struct mmc_request *mrq;
834 host = (struct sdhci_host*)param;
836 spin_lock_irqsave(&host->lock, flags);
838 del_timer(&host->timer);
842 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
845 * The controller needs a reset of internal state machines
846 * upon error conditions.
848 if ((mrq->cmd->error != MMC_ERR_NONE) ||
849 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
850 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
852 /* Some controllers need this kick or reset won't work here */
853 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
856 /* This is to force an update */
859 sdhci_set_clock(host, clock);
862 /* Spec says we should do both at the same time, but Ricoh
863 controllers do not like that. */
864 sdhci_reset(host, SDHCI_RESET_CMD);
865 sdhci_reset(host, SDHCI_RESET_DATA);
872 sdhci_deactivate_led(host);
875 spin_unlock_irqrestore(&host->lock, flags);
877 mmc_request_done(host->mmc, mrq);
880 static void sdhci_timeout_timer(unsigned long data)
882 struct sdhci_host *host;
885 host = (struct sdhci_host*)data;
887 spin_lock_irqsave(&host->lock, flags);
890 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
891 "Please report this to " BUGMAIL ".\n",
892 mmc_hostname(host->mmc));
893 sdhci_dumpregs(host);
896 host->data->error = MMC_ERR_TIMEOUT;
897 sdhci_finish_data(host);
900 host->cmd->error = MMC_ERR_TIMEOUT;
902 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
904 tasklet_schedule(&host->finish_tasklet);
909 spin_unlock_irqrestore(&host->lock, flags);
912 /*****************************************************************************\
914 * Interrupt handling *
916 \*****************************************************************************/
918 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
920 BUG_ON(intmask == 0);
923 printk(KERN_ERR "%s: Got command interrupt even though no "
924 "command operation was in progress.\n",
925 mmc_hostname(host->mmc));
926 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
927 mmc_hostname(host->mmc));
928 sdhci_dumpregs(host);
932 if (intmask & SDHCI_INT_RESPONSE)
933 sdhci_finish_command(host);
935 if (intmask & SDHCI_INT_TIMEOUT)
936 host->cmd->error = MMC_ERR_TIMEOUT;
937 else if (intmask & SDHCI_INT_CRC)
938 host->cmd->error = MMC_ERR_BADCRC;
939 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
940 host->cmd->error = MMC_ERR_FAILED;
942 host->cmd->error = MMC_ERR_INVALID;
944 tasklet_schedule(&host->finish_tasklet);
948 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
950 BUG_ON(intmask == 0);
954 * A data end interrupt is sent together with the response
955 * for the stop command.
957 if (intmask & SDHCI_INT_DATA_END)
960 printk(KERN_ERR "%s: Got data interrupt even though no "
961 "data operation was in progress.\n",
962 mmc_hostname(host->mmc));
963 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
964 mmc_hostname(host->mmc));
965 sdhci_dumpregs(host);
970 if (intmask & SDHCI_INT_DATA_TIMEOUT)
971 host->data->error = MMC_ERR_TIMEOUT;
972 else if (intmask & SDHCI_INT_DATA_CRC)
973 host->data->error = MMC_ERR_BADCRC;
974 else if (intmask & SDHCI_INT_DATA_END_BIT)
975 host->data->error = MMC_ERR_FAILED;
977 if (host->data->error != MMC_ERR_NONE)
978 sdhci_finish_data(host);
980 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
981 sdhci_transfer_pio(host);
983 if (intmask & SDHCI_INT_DATA_END)
984 sdhci_finish_data(host);
988 static irqreturn_t sdhci_irq(int irq, void *dev_id)
991 struct sdhci_host* host = dev_id;
994 spin_lock(&host->lock);
996 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
1003 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
1005 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1006 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
1007 host->ioaddr + SDHCI_INT_STATUS);
1008 tasklet_schedule(&host->card_tasklet);
1011 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1013 if (intmask & SDHCI_INT_CMD_MASK) {
1014 writel(intmask & SDHCI_INT_CMD_MASK,
1015 host->ioaddr + SDHCI_INT_STATUS);
1016 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1019 if (intmask & SDHCI_INT_DATA_MASK) {
1020 writel(intmask & SDHCI_INT_DATA_MASK,
1021 host->ioaddr + SDHCI_INT_STATUS);
1022 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1025 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1027 if (intmask & SDHCI_INT_BUS_POWER) {
1028 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1029 mmc_hostname(host->mmc));
1030 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1033 intmask &= SDHCI_INT_BUS_POWER;
1036 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
1037 "report this to " BUGMAIL ".\n",
1038 mmc_hostname(host->mmc), intmask);
1039 sdhci_dumpregs(host);
1041 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1044 result = IRQ_HANDLED;
1048 spin_unlock(&host->lock);
1053 /*****************************************************************************\
1057 \*****************************************************************************/
1061 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1063 struct sdhci_chip *chip;
1066 chip = pci_get_drvdata(pdev);
1070 DBG("Suspending...\n");
1072 for (i = 0;i < chip->num_slots;i++) {
1073 if (!chip->hosts[i])
1075 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1077 for (i--;i >= 0;i--)
1078 mmc_resume_host(chip->hosts[i]->mmc);
1083 pci_save_state(pdev);
1084 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1085 pci_disable_device(pdev);
1086 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1091 static int sdhci_resume (struct pci_dev *pdev)
1093 struct sdhci_chip *chip;
1096 chip = pci_get_drvdata(pdev);
1100 DBG("Resuming...\n");
1102 pci_set_power_state(pdev, PCI_D0);
1103 pci_restore_state(pdev);
1104 pci_enable_device(pdev);
1106 for (i = 0;i < chip->num_slots;i++) {
1107 if (!chip->hosts[i])
1109 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1110 pci_set_master(pdev);
1111 sdhci_init(chip->hosts[i]);
1113 ret = mmc_resume_host(chip->hosts[i]->mmc);
1121 #else /* CONFIG_PM */
1123 #define sdhci_suspend NULL
1124 #define sdhci_resume NULL
1126 #endif /* CONFIG_PM */
1128 /*****************************************************************************\
1130 * Device probing/removal *
1132 \*****************************************************************************/
1134 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1137 unsigned int version;
1138 struct sdhci_chip *chip;
1139 struct mmc_host *mmc;
1140 struct sdhci_host *host;
1145 chip = pci_get_drvdata(pdev);
1148 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1152 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1154 if (first_bar > 5) {
1155 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1159 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1160 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1164 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1165 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1169 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1170 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1174 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1175 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1179 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1183 host = mmc_priv(mmc);
1187 chip->hosts[slot] = host;
1189 host->bar = first_bar + slot;
1191 host->addr = pci_resource_start(pdev, host->bar);
1192 host->irq = pdev->irq;
1194 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1196 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1198 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1202 host->ioaddr = ioremap_nocache(host->addr,
1203 pci_resource_len(pdev, host->bar));
1204 if (!host->ioaddr) {
1209 sdhci_reset(host, SDHCI_RESET_ALL);
1211 version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1212 version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1214 printk(KERN_ERR "%s: Unknown controller version (%d). "
1215 "You may experience problems.\n", host->slot_descr,
1219 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1222 DBG("DMA forced off\n");
1223 else if (debug_forcedma) {
1224 DBG("DMA forced on\n");
1225 host->flags |= SDHCI_USE_DMA;
1226 } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1227 host->flags |= SDHCI_USE_DMA;
1228 else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1229 DBG("Controller doesn't have DMA interface\n");
1230 else if (!(caps & SDHCI_CAN_DO_DMA))
1231 DBG("Controller doesn't have DMA capability\n");
1233 host->flags |= SDHCI_USE_DMA;
1235 if (host->flags & SDHCI_USE_DMA) {
1236 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1237 printk(KERN_WARNING "%s: No suitable DMA available. "
1238 "Falling back to PIO.\n", host->slot_descr);
1239 host->flags &= ~SDHCI_USE_DMA;
1243 if (host->flags & SDHCI_USE_DMA)
1244 pci_set_master(pdev);
1245 else /* XXX: Hack to get MMC layer to avoid highmem */
1249 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1250 if (host->max_clk == 0) {
1251 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1252 "frequency.\n", host->slot_descr);
1256 host->max_clk *= 1000000;
1259 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1260 if (host->timeout_clk == 0) {
1261 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1262 "frequency.\n", host->slot_descr);
1266 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1267 host->timeout_clk *= 1000;
1269 host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1270 if (host->max_block >= 3) {
1271 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1276 host->max_block = 512 << host->max_block;
1279 * Set host parameters.
1281 mmc->ops = &sdhci_ops;
1282 mmc->f_min = host->max_clk / 256;
1283 mmc->f_max = host->max_clk;
1284 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1287 if (caps & SDHCI_CAN_VDD_330)
1288 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1289 else if (caps & SDHCI_CAN_VDD_300)
1290 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1291 else if (caps & SDHCI_CAN_VDD_180)
1292 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1294 if (mmc->ocr_avail == 0) {
1295 printk(KERN_ERR "%s: Hardware doesn't report any "
1296 "support voltages.\n", host->slot_descr);
1301 spin_lock_init(&host->lock);
1304 * Maximum number of segments. Hardware cannot do scatter lists.
1306 if (host->flags & SDHCI_USE_DMA)
1307 mmc->max_hw_segs = 1;
1309 mmc->max_hw_segs = 16;
1310 mmc->max_phys_segs = 16;
1313 * Maximum number of sectors in one transfer. Limited by DMA boundary
1314 * size (512KiB), which means (512 KiB/512=) 1024 entries.
1316 mmc->max_sectors = 1024;
1319 * Maximum segment size. Could be one segment with the maximum number
1322 mmc->max_seg_size = mmc->max_sectors * 512;
1327 tasklet_init(&host->card_tasklet,
1328 sdhci_tasklet_card, (unsigned long)host);
1329 tasklet_init(&host->finish_tasklet,
1330 sdhci_tasklet_finish, (unsigned long)host);
1332 setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1334 ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1335 host->slot_descr, host);
1341 #ifdef CONFIG_MMC_DEBUG
1342 sdhci_dumpregs(host);
1349 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1350 host->addr, host->irq,
1351 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1356 tasklet_kill(&host->card_tasklet);
1357 tasklet_kill(&host->finish_tasklet);
1359 iounmap(host->ioaddr);
1361 pci_release_region(pdev, host->bar);
1368 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1370 struct sdhci_chip *chip;
1371 struct mmc_host *mmc;
1372 struct sdhci_host *host;
1374 chip = pci_get_drvdata(pdev);
1375 host = chip->hosts[slot];
1378 chip->hosts[slot] = NULL;
1380 mmc_remove_host(mmc);
1382 sdhci_reset(host, SDHCI_RESET_ALL);
1384 free_irq(host->irq, host);
1386 del_timer_sync(&host->timer);
1388 tasklet_kill(&host->card_tasklet);
1389 tasklet_kill(&host->finish_tasklet);
1391 iounmap(host->ioaddr);
1393 pci_release_region(pdev, host->bar);
1398 static int __devinit sdhci_probe(struct pci_dev *pdev,
1399 const struct pci_device_id *ent)
1403 struct sdhci_chip *chip;
1405 BUG_ON(pdev == NULL);
1406 BUG_ON(ent == NULL);
1408 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1410 printk(KERN_INFO DRIVER_NAME
1411 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1412 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1415 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1419 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1420 DBG("found %d slot(s)\n", slots);
1424 ret = pci_enable_device(pdev);
1428 chip = kzalloc(sizeof(struct sdhci_chip) +
1429 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1436 chip->quirks = ent->driver_data;
1439 chip->quirks = debug_quirks;
1441 chip->num_slots = slots;
1442 pci_set_drvdata(pdev, chip);
1444 for (i = 0;i < slots;i++) {
1445 ret = sdhci_probe_slot(pdev, i);
1447 for (i--;i >= 0;i--)
1448 sdhci_remove_slot(pdev, i);
1456 pci_set_drvdata(pdev, NULL);
1460 pci_disable_device(pdev);
1464 static void __devexit sdhci_remove(struct pci_dev *pdev)
1467 struct sdhci_chip *chip;
1469 chip = pci_get_drvdata(pdev);
1472 for (i = 0;i < chip->num_slots;i++)
1473 sdhci_remove_slot(pdev, i);
1475 pci_set_drvdata(pdev, NULL);
1480 pci_disable_device(pdev);
1483 static struct pci_driver sdhci_driver = {
1484 .name = DRIVER_NAME,
1485 .id_table = pci_ids,
1486 .probe = sdhci_probe,
1487 .remove = __devexit_p(sdhci_remove),
1488 .suspend = sdhci_suspend,
1489 .resume = sdhci_resume,
1492 /*****************************************************************************\
1494 * Driver init/exit *
1496 \*****************************************************************************/
1498 static int __init sdhci_drv_init(void)
1500 printk(KERN_INFO DRIVER_NAME
1501 ": Secure Digital Host Controller Interface driver, "
1502 DRIVER_VERSION "\n");
1503 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1505 return pci_register_driver(&sdhci_driver);
1508 static void __exit sdhci_drv_exit(void)
1512 pci_unregister_driver(&sdhci_driver);
1515 module_init(sdhci_drv_init);
1516 module_exit(sdhci_drv_exit);
1518 module_param(debug_nodma, uint, 0444);
1519 module_param(debug_forcedma, uint, 0444);
1520 module_param(debug_quirks, uint, 0444);
1522 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1523 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1524 MODULE_VERSION(DRIVER_VERSION);
1525 MODULE_LICENSE("GPL");
1527 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1528 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1529 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");