git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/platforms/iseries/setup.c

   1 /*
   2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Description:
   6  *      Architecture- / platform-specific boot-time initialization code for
   7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
   8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   9  *      <dan@net4x.com>.
  10  *
  11  *      This program is free software; you can redistribute it and/or
  12  *      modify it under the terms of the GNU General Public License
  13  *      as published by the Free Software Foundation; either version
  14  *      2 of the License, or (at your option) any later version.
  15  */
  16
  17 #undef DEBUG
  18
  19 #include <linux/config.h>
  20 #include <linux/init.h>
  21 #include <linux/threads.h>
  22 #include <linux/smp.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/seq_file.h>
  27 #include <linux/kdev_t.h>
  28 #include <linux/major.h>
  29 #include <linux/root_dev.h>
  30
  31 #include <asm/processor.h>
  32 #include <asm/machdep.h>
  33 #include <asm/page.h>
  34 #include <asm/mmu.h>
  35 #include <asm/pgtable.h>
  36 #include <asm/mmu_context.h>
  37 #include <asm/cputable.h>
  38 #include <asm/sections.h>
  39 #include <asm/iommu.h>
  40 #include <asm/firmware.h>
  41
  42 #include <asm/time.h>
  43 #include <asm/naca.h>
  44 #include <asm/paca.h>
  45 #include <asm/cache.h>
  46 #include <asm/sections.h>
  47 #include <asm/abs_addr.h>
  48 #include <asm/iSeries/HvCallHpt.h>
  49 #include <asm/iSeries/HvLpConfig.h>
  50 #include <asm/iSeries/HvCallEvent.h>
  51 #include <asm/iSeries/HvCallXm.h>
  52 #include <asm/iSeries/ItLpQueue.h>
  53 #include <asm/iSeries/mf.h>
  54 #include <asm/iSeries/HvLpEvent.h>
  55 #include <asm/iSeries/LparMap.h>
  56
  57 #include "setup.h"
  58 #include "irq.h"
  59 #include "vpd_areas.h"
  60 #include "processor_vpd.h"
  61 #include "main_store.h"
  62 #include "call_sm.h"
  63
  64 extern void hvlog(char *fmt, ...);
  65
  66 #ifdef DEBUG
  67 #define DBG(fmt...) hvlog(fmt)
  68 #else
  69 #define DBG(fmt...)
  70 #endif
  71
  72 /* Function Prototypes */
  73 extern void ppcdbg_initialize(void);
  74
  75 static void build_iSeries_Memory_Map(void);
  76 static int iseries_shared_idle(void);
  77 static int iseries_dedicated_idle(void);
  78 #ifdef CONFIG_PCI
  79 extern void iSeries_pci_final_fixup(void);
  80 #else
  81 static void iSeries_pci_final_fixup(void) { }
  82 #endif
  83
  84 /* Global Variables */
  85 int piranha_simulator;
  86
  87 extern int rd_size;             /* Defined in drivers/block/rd.c */
  88 extern unsigned long klimit;
  89 extern unsigned long embedded_sysmap_start;
  90 extern unsigned long embedded_sysmap_end;
  91
  92 extern unsigned long iSeries_recal_tb;
  93 extern unsigned long iSeries_recal_titan;
  94
  95 static int mf_initialized;
  96
  97 struct MemoryBlock {
  98         unsigned long absStart;
  99         unsigned long absEnd;
 100         unsigned long logicalStart;
 101         unsigned long logicalEnd;
 102 };
 103
 104 /*
 105  * Process the main store vpd to determine where the holes in memory are
 106  * and return the number of physical blocks and fill in the array of
 107  * block data.
 108  */
 109 static unsigned long iSeries_process_Condor_mainstore_vpd(
 110                 struct MemoryBlock *mb_array, unsigned long max_entries)
 111 {
 112         unsigned long holeFirstChunk, holeSizeChunks;
 113         unsigned long numMemoryBlocks = 1;
 114         struct IoHriMainStoreSegment4 *msVpd =
 115                 (struct IoHriMainStoreSegment4 *)xMsVpd;
 116         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
 117         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
 118         unsigned long holeSize = holeEnd - holeStart;
 119
 120         printk("Mainstore_VPD: Condor\n");
 121         /*
 122          * Determine if absolute memory has any
 123          * holes so that we can interpret the
 124          * access map we get back from the hypervisor
 125          * correctly.
 126          */
 127         mb_array[0].logicalStart = 0;
 128         mb_array[0].logicalEnd = 0x100000000;
 129         mb_array[0].absStart = 0;
 130         mb_array[0].absEnd = 0x100000000;
 131
 132         if (holeSize) {
 133                 numMemoryBlocks = 2;
 134                 holeStart = holeStart & 0x000fffffffffffff;
 135                 holeStart = addr_to_chunk(holeStart);
 136                 holeFirstChunk = holeStart;
 137                 holeSize = addr_to_chunk(holeSize);
 138                 holeSizeChunks = holeSize;
 139                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
 140                                 holeFirstChunk, holeSizeChunks );
 141                 mb_array[0].logicalEnd = holeFirstChunk;
 142                 mb_array[0].absEnd = holeFirstChunk;
 143                 mb_array[1].logicalStart = holeFirstChunk;
 144                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
 145                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
 146                 mb_array[1].absEnd = 0x100000000;
 147         }
 148         return numMemoryBlocks;
 149 }
 150
 151 #define MaxSegmentAreas                 32
 152 #define MaxSegmentAdrRangeBlocks        128
 153 #define MaxAreaRangeBlocks              4
 154
 155 static unsigned long iSeries_process_Regatta_mainstore_vpd(
 156                 struct MemoryBlock *mb_array, unsigned long max_entries)
 157 {
 158         struct IoHriMainStoreSegment5 *msVpdP =
 159                 (struct IoHriMainStoreSegment5 *)xMsVpd;
 160         unsigned long numSegmentBlocks = 0;
 161         u32 existsBits = msVpdP->msAreaExists;
 162         unsigned long area_num;
 163
 164         printk("Mainstore_VPD: Regatta\n");
 165
 166         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
 167                 unsigned long numAreaBlocks;
 168                 struct IoHriMainStoreArea4 *currentArea;
 169
 170                 if (existsBits & 0x80000000) {
 171                         unsigned long block_num;
 172
 173                         currentArea = &msVpdP->msAreaArray[area_num];
 174                         numAreaBlocks = currentArea->numAdrRangeBlocks;
 175                         printk("ms_vpd: processing area %2ld  blocks=%ld",
 176                                         area_num, numAreaBlocks);
 177                         for (block_num = 0; block_num < numAreaBlocks;
 178                                         ++block_num ) {
 179                                 /* Process an address range block */
 180                                 struct MemoryBlock tempBlock;
 181                                 unsigned long i;
 182
 183                                 tempBlock.absStart =
 184                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
 185                                 tempBlock.absEnd =
 186                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
 187                                 tempBlock.logicalStart = 0;
 188                                 tempBlock.logicalEnd   = 0;
 189                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
 190                                                 block_num, tempBlock.absStart,
 191                                                 tempBlock.absEnd);
 192
 193                                 for (i = 0; i < numSegmentBlocks; ++i) {
 194                                         if (mb_array[i].absStart ==
 195                                                         tempBlock.absStart)
 196                                                 break;
 197                                 }
 198                                 if (i == numSegmentBlocks) {
 199                                         if (numSegmentBlocks == max_entries)
 200                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
 201                                         mb_array[numSegmentBlocks] = tempBlock;
 202                                         ++numSegmentBlocks;
 203                                 } else
 204                                         printk(" (duplicate)");
 205                         }
 206                         printk("\n");
 207                 }
 208                 existsBits <<= 1;
 209         }
 210         /* Now sort the blocks found into ascending sequence */
 211         if (numSegmentBlocks > 1) {
 212                 unsigned long m, n;
 213
 214                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
 215                         for (n = numSegmentBlocks - 1; m < n; --n) {
 216                                 if (mb_array[n].absStart <
 217                                                 mb_array[n-1].absStart) {
 218                                         struct MemoryBlock tempBlock;
 219
 220                                         tempBlock = mb_array[n];
 221                                         mb_array[n] = mb_array[n-1];
 222                                         mb_array[n-1] = tempBlock;
 223                                 }
 224                         }
 225                 }
 226         }
 227         /*
 228          * Assign "logical" addresses to each block.  These
 229          * addresses correspond to the hypervisor "bitmap" space.
 230          * Convert all addresses into units of 256K chunks.
 231          */
 232         {
 233         unsigned long i, nextBitmapAddress;
 234
 235         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
 236         nextBitmapAddress = 0;
 237         for (i = 0; i < numSegmentBlocks; ++i) {
 238                 unsigned long length = mb_array[i].absEnd -
 239                         mb_array[i].absStart;
 240
 241                 mb_array[i].logicalStart = nextBitmapAddress;
 242                 mb_array[i].logicalEnd = nextBitmapAddress + length;
 243                 nextBitmapAddress += length;
 244                 printk("          Bitmap range: %016lx - %016lx\n"
 245                                 "        Absolute range: %016lx - %016lx\n",
 246                                 mb_array[i].logicalStart,
 247                                 mb_array[i].logicalEnd,
 248                                 mb_array[i].absStart, mb_array[i].absEnd);
 249                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
 250                                 0x000fffffffffffff);
 251                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
 252                                 0x000fffffffffffff);
 253                 mb_array[i].logicalStart =
 254                         addr_to_chunk(mb_array[i].logicalStart);
 255                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
 256         }
 257         }
 258
 259         return numSegmentBlocks;
 260 }
 261
 262 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
 263                 unsigned long max_entries)
 264 {
 265         unsigned long i;
 266         unsigned long mem_blocks = 0;
 267
 268         if (cpu_has_feature(CPU_FTR_SLB))
 269                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
 270                                 max_entries);
 271         else
 272                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
 273                                 max_entries);
 274
 275         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
 276         for (i = 0; i < mem_blocks; ++i) {
 277                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
 278                        "                             abs chunks %016lx - %016lx\n",
 279                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
 280                         mb_array[i].absStart, mb_array[i].absEnd);
 281         }
 282         return mem_blocks;
 283 }
 284
 285 static void __init iSeries_get_cmdline(void)
 286 {
 287         char *p, *q;
 288
 289         /* copy the command line parameter from the primary VSP  */
 290         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
 291                         HvLpDma_Direction_RemoteToLocal);
 292
 293         p = cmd_line;
 294         q = cmd_line + 255;
 295         while(p < q) {
 296                 if (!*p || *p == '\n')
 297                         break;
 298                 ++p;
 299         }
 300         *p = 0;
 301 }
 302
 303 static void __init iSeries_init_early(void)
 304 {
 305         extern unsigned long memory_limit;
 306
 307         DBG(" -> iSeries_init_early()\n");
 308
 309         ppc64_firmware_features = FW_FEATURE_ISERIES;
 310
 311         ppcdbg_initialize();
 312
 313         ppc64_interrupt_controller = IC_ISERIES;
 314
 315 #if defined(CONFIG_BLK_DEV_INITRD)
 316         /*
 317          * If the init RAM disk has been configured and there is
 318          * a non-zero starting address for it, set it up
 319          */
 320         if (naca.xRamDisk) {
 321                 initrd_start = (unsigned long)__va(naca.xRamDisk);
 322                 initrd_end = initrd_start + naca.xRamDiskSize * PAGE_SIZE;
 323                 initrd_below_start_ok = 1;      // ramdisk in kernel space
 324                 ROOT_DEV = Root_RAM0;
 325                 if (((rd_size * 1024) / PAGE_SIZE) < naca.xRamDiskSize)
 326                         rd_size = (naca.xRamDiskSize * PAGE_SIZE) / 1024;
 327         } else
 328 #endif /* CONFIG_BLK_DEV_INITRD */
 329         {
 330             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
 331         }
 332
 333         iSeries_recal_tb = get_tb();
 334         iSeries_recal_titan = HvCallXm_loadTod();
 335
 336         /*
 337          * Initialize the hash table management pointers
 338          */
 339         hpte_init_iSeries();
 340
 341         /*
 342          * Initialize the DMA/TCE management
 343          */
 344         iommu_init_early_iSeries();
 345
 346         iSeries_get_cmdline();
 347
 348         /* Save unparsed command line copy for /proc/cmdline */
 349         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 350
 351         /* Parse early parameters, in particular mem=x */
 352         parse_early_param();
 353
 354         if (memory_limit) {
 355                 if (memory_limit < systemcfg->physicalMemorySize)
 356                         systemcfg->physicalMemorySize = memory_limit;
 357                 else {
 358                         printk("Ignoring mem=%lu >= ram_top.\n", memory_limit);
 359                         memory_limit = 0;
 360                 }
 361         }
 362
 363         /* Initialize machine-dependency vectors */
 364 #ifdef CONFIG_SMP
 365         smp_init_iSeries();
 366 #endif
 367         if (itLpNaca.xPirEnvironMode == 0)
 368                 piranha_simulator = 1;
 369
 370         /* Associate Lp Event Queue 0 with processor 0 */
 371         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
 372
 373         mf_init();
 374         mf_initialized = 1;
 375         mb();
 376
 377         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 378          * look sensible. If not, clear initrd reference.
 379          */
 380 #ifdef CONFIG_BLK_DEV_INITRD
 381         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
 382             initrd_end > initrd_start)
 383                 ROOT_DEV = Root_RAM0;
 384         else
 385                 initrd_start = initrd_end = 0;
 386 #endif /* CONFIG_BLK_DEV_INITRD */
 387
 388         DBG(" <- iSeries_init_early()\n");
 389 }
 390
 391 struct mschunks_map mschunks_map = {
 392         /* XXX We don't use these, but Piranha might need them. */
 393         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
 394         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
 395         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
 396 };
 397 EXPORT_SYMBOL(mschunks_map);
 398
 399 void mschunks_alloc(unsigned long num_chunks)
 400 {
 401         klimit = _ALIGN(klimit, sizeof(u32));
 402         mschunks_map.mapping = (u32 *)klimit;
 403         klimit += num_chunks * sizeof(u32);
 404         mschunks_map.num_chunks = num_chunks;
 405 }
 406
 407 /*
 408  * The iSeries may have very large memories ( > 128 GB ) and a partition
 409  * may get memory in "chunks" that may be anywhere in the 2**52 real
 410  * address space.  The chunks are 256K in size.  To map this to the
 411  * memory model Linux expects, the AS/400 specific code builds a
 412  * translation table to translate what Linux thinks are "physical"
 413  * addresses to the actual real addresses.  This allows us to make
 414  * it appear to Linux that we have contiguous memory starting at
 415  * physical address zero while in fact this could be far from the truth.
 416  * To avoid confusion, I'll let the words physical and/or real address
 417  * apply to the Linux addresses while I'll use "absolute address" to
 418  * refer to the actual hardware real address.
 419  *
 420  * build_iSeries_Memory_Map gets information from the Hypervisor and
 421  * looks at the Main Store VPD to determine the absolute addresses
 422  * of the memory that has been assigned to our partition and builds
 423  * a table used to translate Linux's physical addresses to these
 424  * absolute addresses.  Absolute addresses are needed when
 425  * communicating with the hypervisor (e.g. to build HPT entries)
 426  */
 427
 428 static void __init build_iSeries_Memory_Map(void)
 429 {
 430         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
 431         u32 nextPhysChunk;
 432         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
 433         u32 num_ptegs;
 434         u32 totalChunks,moreChunks;
 435         u32 currChunk, thisChunk, absChunk;
 436         u32 currDword;
 437         u32 chunkBit;
 438         u64 map;
 439         struct MemoryBlock mb[32];
 440         unsigned long numMemoryBlocks, curBlock;
 441
 442         /* Chunk size on iSeries is 256K bytes */
 443         totalChunks = (u32)HvLpConfig_getMsChunks();
 444         mschunks_alloc(totalChunks);
 445
 446         /*
 447          * Get absolute address of our load area
 448          * and map it to physical address 0
 449          * This guarantees that the loadarea ends up at physical 0
 450          * otherwise, it might not be returned by PLIC as the first
 451          * chunks
 452          */
 453
 454         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
 455         loadAreaSize =  itLpNaca.xLoadAreaChunks;
 456
 457         /*
 458          * Only add the pages already mapped here.
 459          * Otherwise we might add the hpt pages
 460          * The rest of the pages of the load area
 461          * aren't in the HPT yet and can still
 462          * be assigned an arbitrary physical address
 463          */
 464         if ((loadAreaSize * 64) > HvPagesToMap)
 465                 loadAreaSize = HvPagesToMap / 64;
 466
 467         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
 468
 469         /*
 470          * TODO Do we need to do something if the HPT is in the 64MB load area?
 471          * This would be required if the itLpNaca.xLoadAreaChunks includes
 472          * the HPT size
 473          */
 474
 475         printk("Mapping load area - physical addr = 0000000000000000\n"
 476                 "                    absolute addr = %016lx\n",
 477                 chunk_to_addr(loadAreaFirstChunk));
 478         printk("Load area size %dK\n", loadAreaSize * 256);
 479
 480         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
 481                 mschunks_map.mapping[nextPhysChunk] =
 482                         loadAreaFirstChunk + nextPhysChunk;
 483
 484         /*
 485          * Get absolute address of our HPT and remember it so
 486          * we won't map it to any physical address
 487          */
 488         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
 489         hptSizePages = (u32)HvCallHpt_getHptPages();
 490         hptSizeChunks = hptSizePages >> (MSCHUNKS_CHUNK_SHIFT - PAGE_SHIFT);
 491         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
 492
 493         printk("HPT absolute addr = %016lx, size = %dK\n",
 494                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 495
 496         /* Fill in the hashed page table hash mask */
 497         num_ptegs = hptSizePages *
 498                 (PAGE_SIZE / (sizeof(hpte_t) * HPTES_PER_GROUP));
 499         htab_hash_mask = num_ptegs - 1;
 500
 501         /*
 502          * The actual hashed page table is in the hypervisor,
 503          * we have no direct access
 504          */
 505         htab_address = NULL;
 506
 507         /*
 508          * Determine if absolute memory has any
 509          * holes so that we can interpret the
 510          * access map we get back from the hypervisor
 511          * correctly.
 512          */
 513         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
 514
 515         /*
 516          * Process the main store access map from the hypervisor
 517          * to build up our physical -> absolute translation table
 518          */
 519         curBlock = 0;
 520         currChunk = 0;
 521         currDword = 0;
 522         moreChunks = totalChunks;
 523
 524         while (moreChunks) {
 525                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
 526                                 currDword);
 527                 thisChunk = currChunk;
 528                 while (map) {
 529                         chunkBit = map >> 63;
 530                         map <<= 1;
 531                         if (chunkBit) {
 532                                 --moreChunks;
 533                                 while (thisChunk >= mb[curBlock].logicalEnd) {
 534                                         ++curBlock;
 535                                         if (curBlock >= numMemoryBlocks)
 536                                                 panic("out of memory blocks");
 537                                 }
 538                                 if (thisChunk < mb[curBlock].logicalStart)
 539                                         panic("memory block error");
 540
 541                                 absChunk = mb[curBlock].absStart +
 542                                         (thisChunk - mb[curBlock].logicalStart);
 543                                 if (((absChunk < hptFirstChunk) ||
 544                                      (absChunk > hptLastChunk)) &&
 545                                     ((absChunk < loadAreaFirstChunk) ||
 546                                      (absChunk > loadAreaLastChunk))) {
 547                                         mschunks_map.mapping[nextPhysChunk] =
 548                                                 absChunk;
 549                                         ++nextPhysChunk;
 550                                 }
 551                         }
 552                         ++thisChunk;
 553                 }
 554                 ++currDword;
 555                 currChunk += 64;
 556         }
 557
 558         /*
 559          * main store size (in chunks) is
 560          *   totalChunks - hptSizeChunks
 561          * which should be equal to
 562          *   nextPhysChunk
 563          */
 564         systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
 565 }
 566
 567 /*
 568  * Document me.
 569  */
 570 static void __init iSeries_setup_arch(void)
 571 {
 572         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
 573
 574         if (get_paca()->lppaca.shared_proc) {
 575                 ppc_md.idle_loop = iseries_shared_idle;
 576                 printk(KERN_INFO "Using shared processor idle loop\n");
 577         } else {
 578                 ppc_md.idle_loop = iseries_dedicated_idle;
 579                 printk(KERN_INFO "Using dedicated idle loop\n");
 580         }
 581
 582         /* Setup the Lp Event Queue */
 583         setup_hvlpevent_queue();
 584
 585         printk("Max  logical processors = %d\n",
 586                         itVpdAreas.xSlicMaxLogicalProcs);
 587         printk("Max physical processors = %d\n",
 588                         itVpdAreas.xSlicMaxPhysicalProcs);
 589
 590         systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
 591         printk("Processor version = %x\n", systemcfg->processor);
 592 }
 593
 594 static void iSeries_get_cpuinfo(struct seq_file *m)
 595 {
 596         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 597 }
 598
 599 /*
 600  * Document me.
 601  * and Implement me.
 602  */
 603 static int iSeries_get_irq(struct pt_regs *regs)
 604 {
 605         /* -2 means ignore this interrupt */
 606         return -2;
 607 }
 608
 609 /*
 610  * Document me.
 611  */
 612 static void iSeries_restart(char *cmd)
 613 {
 614         mf_reboot();
 615 }
 616
 617 /*
 618  * Document me.
 619  */
 620 static void iSeries_power_off(void)
 621 {
 622         mf_power_off();
 623 }
 624
 625 /*
 626  * Document me.
 627  */
 628 static void iSeries_halt(void)
 629 {
 630         mf_power_off();
 631 }
 632
 633 static void __init iSeries_progress(char * st, unsigned short code)
 634 {
 635         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
 636         if (!piranha_simulator && mf_initialized) {
 637                 if (code != 0xffff)
 638                         mf_display_progress(code);
 639                 else
 640                         mf_clear_src();
 641         }
 642 }
 643
 644 static void __init iSeries_fixup_klimit(void)
 645 {
 646         /*
 647          * Change klimit to take into account any ram disk
 648          * that may be included
 649          */
 650         if (naca.xRamDisk)
 651                 klimit = KERNELBASE + (u64)naca.xRamDisk +
 652                         (naca.xRamDiskSize * PAGE_SIZE);
 653         else {
 654                 /*
 655                  * No ram disk was included - check and see if there
 656                  * was an embedded system map.  Change klimit to take
 657                  * into account any embedded system map
 658                  */
 659                 if (embedded_sysmap_end)
 660                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
 661                                         0xfffffffffffff000);
 662         }
 663 }
 664
 665 static int __init iSeries_src_init(void)
 666 {
 667         /* clear the progress line */
 668         ppc_md.progress(" ", 0xffff);
 669         return 0;
 670 }
 671
 672 late_initcall(iSeries_src_init);
 673
 674 static inline void process_iSeries_events(void)
 675 {
 676         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
 677 }
 678
 679 static void yield_shared_processor(void)
 680 {
 681         unsigned long tb;
 682
 683         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
 684                                     HvCall_MaskLpEvent |
 685                                     HvCall_MaskLpProd |
 686                                     HvCall_MaskTimeout);
 687
 688         tb = get_tb();
 689         /* Compute future tb value when yield should expire */
 690         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
 691
 692         /*
 693          * The decrementer stops during the yield.  Force a fake decrementer
 694          * here and let the timer_interrupt code sort out the actual time.
 695          */
 696         get_paca()->lppaca.int_dword.fields.decr_int = 1;
 697         process_iSeries_events();
 698 }
 699
 700 static int iseries_shared_idle(void)
 701 {
 702         while (1) {
 703                 while (!need_resched() && !hvlpevent_is_pending()) {
 704                         local_irq_disable();
 705                         ppc64_runlatch_off();
 706
 707                         /* Recheck with irqs off */
 708                         if (!need_resched() && !hvlpevent_is_pending())
 709                                 yield_shared_processor();
 710
 711                         HMT_medium();
 712                         local_irq_enable();
 713                 }
 714
 715                 ppc64_runlatch_on();
 716
 717                 if (hvlpevent_is_pending())
 718                         process_iSeries_events();
 719
 720                 schedule();
 721         }
 722
 723         return 0;
 724 }
 725
 726 static int iseries_dedicated_idle(void)
 727 {
 728         long oldval;
 729
 730         while (1) {
 731                 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
 732
 733                 if (!oldval) {
 734                         set_thread_flag(TIF_POLLING_NRFLAG);
 735
 736                         while (!need_resched()) {
 737                                 ppc64_runlatch_off();
 738                                 HMT_low();
 739
 740                                 if (hvlpevent_is_pending()) {
 741                                         HMT_medium();
 742                                         ppc64_runlatch_on();
 743                                         process_iSeries_events();
 744                                 }
 745                         }
 746
 747                         HMT_medium();
 748                         clear_thread_flag(TIF_POLLING_NRFLAG);
 749                 } else {
 750                         set_need_resched();
 751                 }
 752
 753                 ppc64_runlatch_on();
 754                 schedule();
 755         }
 756
 757         return 0;
 758 }
 759
 760 #ifndef CONFIG_PCI
 761 void __init iSeries_init_IRQ(void) { }
 762 #endif
 763
 764 static int __init iseries_probe(int platform)
 765 {
 766         return PLATFORM_ISERIES_LPAR == platform;
 767 }
 768
 769 struct machdep_calls __initdata iseries_md = {
 770         .setup_arch     = iSeries_setup_arch,
 771         .get_cpuinfo    = iSeries_get_cpuinfo,
 772         .init_IRQ       = iSeries_init_IRQ,
 773         .get_irq        = iSeries_get_irq,
 774         .init_early     = iSeries_init_early,
 775         .pcibios_fixup  = iSeries_pci_final_fixup,
 776         .restart        = iSeries_restart,
 777         .power_off      = iSeries_power_off,
 778         .halt           = iSeries_halt,
 779         .get_boot_time  = iSeries_get_boot_time,
 780         .set_rtc_time   = iSeries_set_rtc_time,
 781         .get_rtc_time   = iSeries_get_rtc_time,
 782         .calibrate_decr = generic_calibrate_decr,
 783         .progress       = iSeries_progress,
 784         .probe          = iseries_probe,
 785         /* XXX Implement enable_pmcs for iSeries */
 786 };
 787
 788 struct blob {
 789         unsigned char data[PAGE_SIZE];
 790         unsigned long next;
 791 };
 792
 793 struct iseries_flat_dt {
 794         struct boot_param_header header;
 795         u64 reserve_map[2];
 796         struct blob dt;
 797         struct blob strings;
 798 };
 799
 800 struct iseries_flat_dt iseries_dt;
 801
 802 void dt_init(struct iseries_flat_dt *dt)
 803 {
 804         dt->header.off_mem_rsvmap =
 805                 offsetof(struct iseries_flat_dt, reserve_map);
 806         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
 807         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
 808         dt->header.totalsize = sizeof(struct iseries_flat_dt);
 809         dt->header.dt_strings_size = sizeof(struct blob);
 810
 811         /* There is no notion of hardware cpu id on iSeries */
 812         dt->header.boot_cpuid_phys = smp_processor_id();
 813
 814         dt->dt.next = (unsigned long)&dt->dt.data;
 815         dt->strings.next = (unsigned long)&dt->strings.data;
 816
 817         dt->header.magic = OF_DT_HEADER;
 818         dt->header.version = 0x10;
 819         dt->header.last_comp_version = 0x10;
 820
 821         dt->reserve_map[0] = 0;
 822         dt->reserve_map[1] = 0;
 823 }
 824
 825 void dt_check_blob(struct blob *b)
 826 {
 827         if (b->next >= (unsigned long)&b->next) {
 828                 DBG("Ran out of space in flat device tree blob!\n");
 829                 BUG();
 830         }
 831 }
 832
 833 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
 834 {
 835         *((u32*)dt->dt.next) = value;
 836         dt->dt.next += sizeof(u32);
 837
 838         dt_check_blob(&dt->dt);
 839 }
 840
 841 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
 842 {
 843         *((u64*)dt->dt.next) = value;
 844         dt->dt.next += sizeof(u64);
 845
 846         dt_check_blob(&dt->dt);
 847 }
 848
 849 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
 850 {
 851         unsigned long start = blob->next - (unsigned long)blob->data;
 852
 853         memcpy((char *)blob->next, data, len);
 854         blob->next = _ALIGN(blob->next + len, 4);
 855
 856         dt_check_blob(blob);
 857
 858         return start;
 859 }
 860
 861 void dt_start_node(struct iseries_flat_dt *dt, char *name)
 862 {
 863         dt_push_u32(dt, OF_DT_BEGIN_NODE);
 864         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
 865 }
 866
 867 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
 868
 869 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
 870 {
 871         unsigned long offset;
 872
 873         dt_push_u32(dt, OF_DT_PROP);
 874
 875         /* Length of the data */
 876         dt_push_u32(dt, len);
 877
 878         /* Put the property name in the string blob. */
 879         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
 880
 881         /* The offset of the properties name in the string blob. */
 882         dt_push_u32(dt, (u32)offset);
 883
 884         /* The actual data. */
 885         dt_push_bytes(&dt->dt, data, len);
 886 }
 887
 888 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
 889 {
 890         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
 891 }
 892
 893 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
 894 {
 895         dt_prop(dt, name, (char *)&data, sizeof(u32));
 896 }
 897
 898 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
 899 {
 900         dt_prop(dt, name, (char *)&data, sizeof(u64));
 901 }
 902
 903 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
 904 {
 905         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
 906 }
 907
 908 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
 909 {
 910         dt_prop(dt, name, NULL, 0);
 911 }
 912
 913 void dt_cpus(struct iseries_flat_dt *dt)
 914 {
 915         unsigned char buf[32];
 916         unsigned char *p;
 917         unsigned int i, index;
 918         struct IoHriProcessorVpd *d;
 919
 920         /* yuck */
 921         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
 922         p = strchr(buf, ' ');
 923         if (!p) p = buf + strlen(buf);
 924
 925         dt_start_node(dt, "cpus");
 926         dt_prop_u32(dt, "#address-cells", 1);
 927         dt_prop_u32(dt, "#size-cells", 0);
 928
 929         for (i = 0; i < NR_CPUS; i++) {
 930                 if (paca[i].lppaca.dyn_proc_status >= 2)
 931                         continue;
 932
 933                 snprintf(p, 32 - (p - buf), "@%d", i);
 934                 dt_start_node(dt, buf);
 935
 936                 dt_prop_str(dt, "device_type", "cpu");
 937
 938                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
 939                 d = &xIoHriProcessorVpd[index];
 940
 941                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
 942                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
 943
 944                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
 945                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
 946
 947                 /* magic conversions to Hz copied from old code */
 948                 dt_prop_u32(dt, "clock-frequency",
 949                         ((1UL << 34) * 1000000) / d->xProcFreq);
 950                 dt_prop_u32(dt, "timebase-frequency",
 951                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
 952
 953                 dt_prop_u32(dt, "reg", i);
 954
 955                 dt_end_node(dt);
 956         }
 957
 958         dt_end_node(dt);
 959 }
 960
 961 void build_flat_dt(struct iseries_flat_dt *dt)
 962 {
 963         u64 tmp[2];
 964
 965         dt_init(dt);
 966
 967         dt_start_node(dt, "");
 968
 969         dt_prop_u32(dt, "#address-cells", 2);
 970         dt_prop_u32(dt, "#size-cells", 2);
 971
 972         /* /memory */
 973         dt_start_node(dt, "memory@0");
 974         dt_prop_str(dt, "name", "memory");
 975         dt_prop_str(dt, "device_type", "memory");
 976         tmp[0] = 0;
 977         tmp[1] = systemcfg->physicalMemorySize;
 978         dt_prop_u64_list(dt, "reg", tmp, 2);
 979         dt_end_node(dt);
 980
 981         /* /chosen */
 982         dt_start_node(dt, "chosen");
 983         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
 984         dt_end_node(dt);
 985
 986         dt_cpus(dt);
 987
 988         dt_end_node(dt);
 989
 990         dt_push_u32(dt, OF_DT_END);
 991 }
 992
 993 void * __init iSeries_early_setup(void)
 994 {
 995         iSeries_fixup_klimit();
 996
 997         /*
 998          * Initialize the table which translate Linux physical addresses to
 999          * AS/400 absolute addresses
1000          */
1001         build_iSeries_Memory_Map();
1002
1003         build_flat_dt(&iseries_dt);
1004
1005         return (void *) __pa(&iseries_dt);
1006 }