2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/mlx4/cq.h>
35 #include <linux/mlx4/qp.h>
36 #include <linux/skbuff.h>
37 #include <linux/if_ether.h>
38 #include <linux/if_vlan.h>
39 #include <linux/vmalloc.h>
43 static void *get_wqe(struct mlx4_en_rx_ring *ring, int n)
45 int offset = n << ring->srq.wqe_shift;
46 return ring->buf + offset;
49 static void mlx4_en_srq_event(struct mlx4_srq *srq, enum mlx4_event type)
54 static int mlx4_en_get_frag_header(struct skb_frag_struct *frags, void **mac_hdr,
55 void **ip_hdr, void **tcpudp_hdr,
56 u64 *hdr_flags, void *priv)
58 *mac_hdr = page_address(frags->page) + frags->page_offset;
59 *ip_hdr = *mac_hdr + ETH_HLEN;
60 *tcpudp_hdr = (struct tcphdr *)(*ip_hdr + sizeof(struct iphdr));
61 *hdr_flags = LRO_IPV4 | LRO_TCP;
66 static int mlx4_en_alloc_frag(struct mlx4_en_priv *priv,
67 struct mlx4_en_rx_desc *rx_desc,
68 struct skb_frag_struct *skb_frags,
69 struct mlx4_en_rx_alloc *ring_alloc,
72 struct mlx4_en_dev *mdev = priv->mdev;
73 struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
74 struct mlx4_en_rx_alloc *page_alloc = &ring_alloc[i];
78 if (page_alloc->offset == frag_info->last_offset) {
79 /* Allocate new page */
80 page = alloc_pages(GFP_ATOMIC | __GFP_COMP, MLX4_EN_ALLOC_ORDER);
84 skb_frags[i].page = page_alloc->page;
85 skb_frags[i].page_offset = page_alloc->offset;
86 page_alloc->page = page;
87 page_alloc->offset = frag_info->frag_align;
89 page = page_alloc->page;
92 skb_frags[i].page = page;
93 skb_frags[i].page_offset = page_alloc->offset;
94 page_alloc->offset += frag_info->frag_stride;
96 dma = pci_map_single(mdev->pdev, page_address(skb_frags[i].page) +
97 skb_frags[i].page_offset, frag_info->frag_size,
99 rx_desc->data[i].addr = cpu_to_be64(dma);
103 static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
104 struct mlx4_en_rx_ring *ring)
106 struct mlx4_en_rx_alloc *page_alloc;
109 for (i = 0; i < priv->num_frags; i++) {
110 page_alloc = &ring->page_alloc[i];
111 page_alloc->page = alloc_pages(GFP_ATOMIC | __GFP_COMP,
112 MLX4_EN_ALLOC_ORDER);
113 if (!page_alloc->page)
116 page_alloc->offset = priv->frag_info[i].frag_align;
117 en_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n",
118 i, page_alloc->page);
124 page_alloc = &ring->page_alloc[i];
125 put_page(page_alloc->page);
126 page_alloc->page = NULL;
131 static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
132 struct mlx4_en_rx_ring *ring)
134 struct mlx4_en_rx_alloc *page_alloc;
137 for (i = 0; i < priv->num_frags; i++) {
138 page_alloc = &ring->page_alloc[i];
139 en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
140 i, page_count(page_alloc->page));
142 put_page(page_alloc->page);
143 page_alloc->page = NULL;
148 static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
149 struct mlx4_en_rx_ring *ring, int index)
151 struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
152 struct skb_frag_struct *skb_frags = ring->rx_info +
153 (index << priv->log_rx_info);
157 /* Pre-link descriptor */
158 rx_desc->next.next_wqe_index = cpu_to_be16((index + 1) & ring->size_mask);
160 /* Set size and memtype fields */
161 for (i = 0; i < priv->num_frags; i++) {
162 skb_frags[i].size = priv->frag_info[i].frag_size;
163 rx_desc->data[i].byte_count =
164 cpu_to_be32(priv->frag_info[i].frag_size);
165 rx_desc->data[i].lkey = cpu_to_be32(priv->mdev->mr.key);
168 /* If the number of used fragments does not fill up the ring stride,
169 * remaining (unused) fragments must be padded with null address/size
170 * and a special memory key */
171 possible_frags = (ring->stride - sizeof(struct mlx4_en_rx_desc)) / DS_SIZE;
172 for (i = priv->num_frags; i < possible_frags; i++) {
173 rx_desc->data[i].byte_count = 0;
174 rx_desc->data[i].lkey = cpu_to_be32(MLX4_EN_MEMTYPE_PAD);
175 rx_desc->data[i].addr = 0;
180 static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
181 struct mlx4_en_rx_ring *ring, int index)
183 struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
184 struct skb_frag_struct *skb_frags = ring->rx_info +
185 (index << priv->log_rx_info);
188 for (i = 0; i < priv->num_frags; i++)
189 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, ring->page_alloc, i))
196 put_page(skb_frags[i].page);
200 static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
202 *ring->wqres.db.db = cpu_to_be32(ring->prod & 0xffff);
205 static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
206 struct mlx4_en_rx_ring *ring,
209 struct mlx4_en_dev *mdev = priv->mdev;
210 struct skb_frag_struct *skb_frags;
211 struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride);
215 skb_frags = ring->rx_info + (index << priv->log_rx_info);
216 for (nr = 0; nr < priv->num_frags; nr++) {
217 en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
218 dma = be64_to_cpu(rx_desc->data[nr].addr);
220 en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
221 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
223 put_page(skb_frags[nr].page);
227 static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
229 struct mlx4_en_rx_ring *ring;
234 for (buf_ind = 0; buf_ind < priv->prof->rx_ring_size; buf_ind++) {
235 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
236 ring = &priv->rx_ring[ring_ind];
238 if (mlx4_en_prepare_rx_desc(priv, ring,
239 ring->actual_size)) {
240 if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
241 en_err(priv, "Failed to allocate "
242 "enough rx buffers\n");
245 new_size = rounddown_pow_of_two(ring->actual_size);
246 en_warn(priv, "Only %d buffers allocated "
247 "reducing ring size to %d",
248 ring->actual_size, new_size);
259 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
260 ring = &priv->rx_ring[ring_ind];
261 while (ring->actual_size > new_size) {
264 mlx4_en_free_rx_desc(priv, ring, ring->actual_size);
266 ring->size_mask = ring->actual_size - 1;
272 static int mlx4_en_fill_rx_buf(struct net_device *dev,
273 struct mlx4_en_rx_ring *ring)
275 struct mlx4_en_priv *priv = netdev_priv(dev);
279 while ((u32) (ring->prod - ring->cons) < ring->actual_size) {
280 err = mlx4_en_prepare_rx_desc(priv, ring, ring->prod &
283 if (netif_msg_rx_err(priv))
284 en_warn(priv, "Failed preparing rx descriptor\n");
285 priv->port_stats.rx_alloc_failed++;
291 if ((u32) (ring->prod - ring->cons) == ring->actual_size)
297 static void mlx4_en_free_rx_buf(struct mlx4_en_priv *priv,
298 struct mlx4_en_rx_ring *ring)
302 en_dbg(DRV, priv, "Freeing Rx buf - cons:%d prod:%d\n",
303 ring->cons, ring->prod);
305 /* Unmap and free Rx buffers */
306 BUG_ON((u32) (ring->prod - ring->cons) > ring->actual_size);
307 while (ring->cons != ring->prod) {
308 index = ring->cons & ring->size_mask;
309 en_dbg(DRV, priv, "Processing descriptor:%d\n", index);
310 mlx4_en_free_rx_desc(priv, ring, index);
316 void mlx4_en_rx_refill(struct work_struct *work)
318 struct delayed_work *delay = to_delayed_work(work);
319 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
321 struct mlx4_en_dev *mdev = priv->mdev;
322 struct net_device *dev = priv->dev;
323 struct mlx4_en_rx_ring *ring;
327 mutex_lock(&mdev->state_lock);
328 if (!mdev->device_up || !priv->port_up)
331 /* We only get here if there are no receive buffers, so we can't race
332 * with Rx interrupts while filling buffers */
333 for (i = 0; i < priv->rx_ring_num; i++) {
334 ring = &priv->rx_ring[i];
335 if (ring->need_refill) {
336 if (mlx4_en_fill_rx_buf(dev, ring)) {
337 ring->need_refill = 0;
338 mlx4_en_update_rx_prod_db(ring);
344 queue_delayed_work(mdev->workqueue, &priv->refill_task, HZ);
347 mutex_unlock(&mdev->state_lock);
351 int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
352 struct mlx4_en_rx_ring *ring, u32 size, u16 stride)
354 struct mlx4_en_dev *mdev = priv->mdev;
358 /* Sanity check SRQ size before proceeding */
359 if (size >= mdev->dev->caps.max_srq_wqes)
365 ring->size_mask = size - 1;
366 ring->stride = stride;
367 ring->log_stride = ffs(ring->stride) - 1;
368 ring->buf_size = ring->size * ring->stride;
370 tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
371 sizeof(struct skb_frag_struct));
372 ring->rx_info = vmalloc(tmp);
373 if (!ring->rx_info) {
374 en_err(priv, "Failed allocating rx_info ring\n");
377 en_dbg(DRV, priv, "Allocated rx_info ring at addr:%p size:%d\n",
380 err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres,
381 ring->buf_size, 2 * PAGE_SIZE);
385 err = mlx4_en_map_buffer(&ring->wqres.buf);
387 en_err(priv, "Failed to map RX buffer\n");
390 ring->buf = ring->wqres.buf.direct.buf;
392 /* Configure lro mngr */
393 memset(&ring->lro, 0, sizeof(struct net_lro_mgr));
394 ring->lro.dev = priv->dev;
395 ring->lro.features = LRO_F_NAPI;
396 ring->lro.frag_align_pad = NET_IP_ALIGN;
397 ring->lro.ip_summed = CHECKSUM_UNNECESSARY;
398 ring->lro.ip_summed_aggr = CHECKSUM_UNNECESSARY;
399 ring->lro.max_desc = mdev->profile.num_lro;
400 ring->lro.max_aggr = MAX_SKB_FRAGS;
401 ring->lro.lro_arr = kzalloc(mdev->profile.num_lro *
402 sizeof(struct net_lro_desc),
404 if (!ring->lro.lro_arr) {
405 en_err(priv, "Failed to allocate lro array\n");
408 ring->lro.get_frag_header = mlx4_en_get_frag_header;
413 mlx4_en_unmap_buffer(&ring->wqres.buf);
415 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
417 vfree(ring->rx_info);
418 ring->rx_info = NULL;
422 int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
424 struct mlx4_en_dev *mdev = priv->mdev;
425 struct mlx4_wqe_srq_next_seg *next;
426 struct mlx4_en_rx_ring *ring;
430 int stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
431 DS_SIZE * priv->num_frags);
432 int max_gs = (stride - sizeof(struct mlx4_wqe_srq_next_seg)) / DS_SIZE;
434 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
435 ring = &priv->rx_ring[ring_ind];
439 ring->actual_size = 0;
440 ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
442 ring->stride = stride;
443 ring->log_stride = ffs(ring->stride) - 1;
444 ring->buf_size = ring->size * ring->stride;
446 memset(ring->buf, 0, ring->buf_size);
447 mlx4_en_update_rx_prod_db(ring);
449 /* Initailize all descriptors */
450 for (i = 0; i < ring->size; i++)
451 mlx4_en_init_rx_desc(priv, ring, i);
453 /* Initialize page allocators */
454 err = mlx4_en_init_allocator(priv, ring);
456 en_err(priv, "Failed initializing ring allocator\n");
461 /* Fill Rx buffers */
464 err = mlx4_en_fill_rx_buffers(priv);
468 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
469 ring = &priv->rx_ring[ring_ind];
471 mlx4_en_update_rx_prod_db(ring);
473 /* Configure SRQ representing the ring */
474 ring->srq.max = ring->actual_size;
475 ring->srq.max_gs = max_gs;
476 ring->srq.wqe_shift = ilog2(ring->stride);
478 for (i = 0; i < ring->srq.max; ++i) {
479 next = get_wqe(ring, i);
480 next->next_wqe_index =
481 cpu_to_be16((i + 1) & (ring->srq.max - 1));
484 err = mlx4_srq_alloc(mdev->dev, mdev->priv_pdn, &ring->wqres.mtt,
485 ring->wqres.db.dma, &ring->srq);
487 en_err(priv, "Failed to allocate srq\n");
491 ring->srq.event = mlx4_en_srq_event;
497 while (ring_ind >= 0) {
498 ring = &priv->rx_ring[ring_ind];
499 mlx4_srq_free(mdev->dev, &ring->srq);
504 for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
505 mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
507 ring_ind = priv->rx_ring_num - 1;
509 while (ring_ind >= 0) {
510 mlx4_en_destroy_allocator(priv, &priv->rx_ring[ring_ind]);
516 void mlx4_en_destroy_rx_ring(struct mlx4_en_priv *priv,
517 struct mlx4_en_rx_ring *ring)
519 struct mlx4_en_dev *mdev = priv->mdev;
521 kfree(ring->lro.lro_arr);
522 mlx4_en_unmap_buffer(&ring->wqres.buf);
523 mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
524 vfree(ring->rx_info);
525 ring->rx_info = NULL;
528 void mlx4_en_deactivate_rx_ring(struct mlx4_en_priv *priv,
529 struct mlx4_en_rx_ring *ring)
531 struct mlx4_en_dev *mdev = priv->mdev;
533 mlx4_srq_free(mdev->dev, &ring->srq);
534 mlx4_en_free_rx_buf(priv, ring);
535 mlx4_en_destroy_allocator(priv, ring);
539 /* Unmap a completed descriptor and free unused pages */
540 static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
541 struct mlx4_en_rx_desc *rx_desc,
542 struct skb_frag_struct *skb_frags,
543 struct skb_frag_struct *skb_frags_rx,
544 struct mlx4_en_rx_alloc *page_alloc,
547 struct mlx4_en_dev *mdev = priv->mdev;
548 struct mlx4_en_frag_info *frag_info;
552 /* Collect used fragments while replacing them in the HW descirptors */
553 for (nr = 0; nr < priv->num_frags; nr++) {
554 frag_info = &priv->frag_info[nr];
555 if (length <= frag_info->frag_prefix_size)
558 /* Save page reference in skb */
559 skb_frags_rx[nr].page = skb_frags[nr].page;
560 skb_frags_rx[nr].size = skb_frags[nr].size;
561 skb_frags_rx[nr].page_offset = skb_frags[nr].page_offset;
562 dma = be64_to_cpu(rx_desc->data[nr].addr);
564 /* Allocate a replacement page */
565 if (mlx4_en_alloc_frag(priv, rx_desc, skb_frags, page_alloc, nr))
569 pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
572 /* Adjust size of last fragment to match actual length */
573 skb_frags_rx[nr - 1].size = length -
574 priv->frag_info[nr - 1].frag_prefix_size;
578 /* Drop all accumulated fragments (which have already been replaced in
579 * the descriptor) of this packet; remaining fragments are reused... */
582 put_page(skb_frags_rx[nr].page);
588 static struct sk_buff *mlx4_en_rx_skb(struct mlx4_en_priv *priv,
589 struct mlx4_en_rx_desc *rx_desc,
590 struct skb_frag_struct *skb_frags,
591 struct mlx4_en_rx_alloc *page_alloc,
594 struct mlx4_en_dev *mdev = priv->mdev;
600 skb = dev_alloc_skb(SMALL_PACKET_SIZE + NET_IP_ALIGN);
602 en_dbg(RX_ERR, priv, "Failed allocating skb\n");
605 skb->dev = priv->dev;
606 skb_reserve(skb, NET_IP_ALIGN);
608 skb->truesize = length + sizeof(struct sk_buff);
610 /* Get pointer to first fragment so we could copy the headers into the
611 * (linear part of the) skb */
612 va = page_address(skb_frags[0].page) + skb_frags[0].page_offset;
614 if (length <= SMALL_PACKET_SIZE) {
615 /* We are copying all relevant data to the skb - temporarily
616 * synch buffers for the copy */
617 dma = be64_to_cpu(rx_desc->data[0].addr);
618 dma_sync_single_range_for_cpu(&mdev->pdev->dev, dma, 0,
619 length, DMA_FROM_DEVICE);
620 skb_copy_to_linear_data(skb, va, length);
621 dma_sync_single_range_for_device(&mdev->pdev->dev, dma, 0,
622 length, DMA_FROM_DEVICE);
626 /* Move relevant fragments to skb */
627 used_frags = mlx4_en_complete_rx_desc(priv, rx_desc, skb_frags,
628 skb_shinfo(skb)->frags,
630 if (unlikely(!used_frags)) {
634 skb_shinfo(skb)->nr_frags = used_frags;
636 /* Copy headers into the skb linear buffer */
637 memcpy(skb->data, va, HEADER_COPY_SIZE);
638 skb->tail += HEADER_COPY_SIZE;
640 /* Skip headers in first fragment */
641 skb_shinfo(skb)->frags[0].page_offset += HEADER_COPY_SIZE;
643 /* Adjust size of first fragment */
644 skb_shinfo(skb)->frags[0].size -= HEADER_COPY_SIZE;
645 skb->data_len = length - HEADER_COPY_SIZE;
650 static void mlx4_en_copy_desc(struct mlx4_en_priv *priv,
651 struct mlx4_en_rx_ring *ring,
652 int from, int to, int num)
654 struct skb_frag_struct *skb_frags_from;
655 struct skb_frag_struct *skb_frags_to;
656 struct mlx4_en_rx_desc *rx_desc_from;
657 struct mlx4_en_rx_desc *rx_desc_to;
658 int from_index, to_index;
661 for (i = 0; i < num; i++) {
662 from_index = (from + i) & ring->size_mask;
663 to_index = (to + i) & ring->size_mask;
664 skb_frags_from = ring->rx_info + (from_index << priv->log_rx_info);
665 skb_frags_to = ring->rx_info + (to_index << priv->log_rx_info);
666 rx_desc_from = ring->buf + (from_index << ring->log_stride);
667 rx_desc_to = ring->buf + (to_index << ring->log_stride);
669 for (nr = 0; nr < priv->num_frags; nr++) {
670 skb_frags_to[nr].page = skb_frags_from[nr].page;
671 skb_frags_to[nr].page_offset = skb_frags_from[nr].page_offset;
672 rx_desc_to->data[nr].addr = rx_desc_from->data[nr].addr;
678 int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
680 struct mlx4_en_priv *priv = netdev_priv(dev);
681 struct mlx4_cqe *cqe;
682 struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
683 struct skb_frag_struct *skb_frags;
684 struct skb_frag_struct lro_frags[MLX4_EN_MAX_RX_FRAGS];
685 struct mlx4_en_rx_desc *rx_desc;
696 /* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
697 * descriptor offset can be deduced from the CQE index instead of
698 * reading 'cqe->index' */
699 index = cq->mcq.cons_index & ring->size_mask;
700 cqe = &cq->buf[index];
702 /* Process all completed CQEs */
703 while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
704 cq->mcq.cons_index & cq->size)) {
706 skb_frags = ring->rx_info + (index << priv->log_rx_info);
707 rx_desc = ring->buf + (index << ring->log_stride);
710 * make sure we read the CQE after we read the ownership bit
714 /* Drop packet on bad receive or bad checksum */
715 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
716 MLX4_CQE_OPCODE_ERROR)) {
717 en_err(priv, "CQE completed in error - vendor "
718 "syndrom:%d syndrom:%d\n",
719 ((struct mlx4_err_cqe *) cqe)->vendor_err_syndrome,
720 ((struct mlx4_err_cqe *) cqe)->syndrome);
723 if (unlikely(cqe->badfcs_enc & MLX4_CQE_BAD_FCS)) {
724 en_dbg(RX_ERR, priv, "Accepted frame with bad FCS\n");
729 * Packet is OK - process it.
731 length = be32_to_cpu(cqe->byte_cnt);
732 ring->bytes += length;
735 if (likely(priv->rx_csum)) {
736 if ((cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPOK)) &&
737 (cqe->checksum == cpu_to_be16(0xffff))) {
738 priv->port_stats.rx_chksum_good++;
739 /* This packet is eligible for LRO if it is:
740 * - DIX Ethernet (type interpretation)
742 * - without IP options
743 * - not an IP fragment */
744 if (mlx4_en_can_lro(cqe->status) &&
745 dev->features & NETIF_F_LRO) {
747 nr = mlx4_en_complete_rx_desc(
749 skb_frags, lro_frags,
750 ring->page_alloc, length);
754 if (priv->vlgrp && (cqe->vlan_my_qpn &
755 cpu_to_be32(MLX4_CQE_VLAN_PRESENT_MASK))) {
756 lro_vlan_hwaccel_receive_frags(
757 &ring->lro, lro_frags,
760 be16_to_cpu(cqe->sl_vid),
763 lro_receive_frags(&ring->lro,
772 /* LRO not possible, complete processing here */
773 ip_summed = CHECKSUM_UNNECESSARY;
774 INC_PERF_COUNTER(priv->pstats.lro_misses);
776 ip_summed = CHECKSUM_NONE;
777 priv->port_stats.rx_chksum_none++;
780 ip_summed = CHECKSUM_NONE;
781 priv->port_stats.rx_chksum_none++;
784 skb = mlx4_en_rx_skb(priv, rx_desc, skb_frags,
785 ring->page_alloc, length);
787 priv->stats.rx_dropped++;
791 skb->ip_summed = ip_summed;
792 skb->protocol = eth_type_trans(skb, dev);
793 skb_record_rx_queue(skb, cq->ring);
795 /* Push it up the stack */
796 if (priv->vlgrp && (be32_to_cpu(cqe->vlan_my_qpn) &
797 MLX4_CQE_VLAN_PRESENT_MASK)) {
798 vlan_hwaccel_receive_skb(skb, priv->vlgrp,
799 be16_to_cpu(cqe->sl_vid));
801 netif_receive_skb(skb);
804 ++cq->mcq.cons_index;
805 index = (cq->mcq.cons_index) & ring->size_mask;
806 cqe = &cq->buf[index];
807 if (++polled == budget) {
808 /* We are here because we reached the NAPI budget -
809 * flush only pending LRO sessions */
810 lro_flush_all(&ring->lro);
815 /* If CQ is empty flush all LRO sessions unconditionally */
816 lro_flush_all(&ring->lro);
819 AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
820 mlx4_cq_set_ci(&cq->mcq);
821 wmb(); /* ensure HW sees CQ consumer before we post new buffers */
822 ring->cons = cq->mcq.cons_index;
823 ring->prod += polled; /* Polled descriptors were realocated in place */
824 if (unlikely(!ring->full)) {
825 mlx4_en_copy_desc(priv, ring, ring->cons - polled,
826 ring->prod - polled, polled);
827 mlx4_en_fill_rx_buf(dev, ring);
829 mlx4_en_update_rx_prod_db(ring);
834 void mlx4_en_rx_irq(struct mlx4_cq *mcq)
836 struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
837 struct mlx4_en_priv *priv = netdev_priv(cq->dev);
840 napi_schedule(&cq->napi);
842 mlx4_en_arm_cq(priv, cq);
845 /* Rx CQ polling - called by NAPI */
846 int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
848 struct mlx4_en_cq *cq = container_of(napi, struct mlx4_en_cq, napi);
849 struct net_device *dev = cq->dev;
850 struct mlx4_en_priv *priv = netdev_priv(dev);
853 done = mlx4_en_process_rx_cq(dev, cq, budget);
855 /* If we used up all the quota - we're probably not done yet... */
857 INC_PERF_COUNTER(priv->pstats.napi_quota);
861 mlx4_en_arm_cq(priv, cq);
867 /* Calculate the last offset position that accomodates a full fragment
868 * (assuming fagment size = stride-align) */
869 static int mlx4_en_last_alloc_offset(struct mlx4_en_priv *priv, u16 stride, u16 align)
871 u16 res = MLX4_EN_ALLOC_SIZE % stride;
872 u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align;
874 en_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d "
875 "res:%d offset:%d\n", stride, align, res, offset);
880 static int frag_sizes[] = {
887 void mlx4_en_calc_rx_buf(struct net_device *dev)
889 struct mlx4_en_priv *priv = netdev_priv(dev);
890 int eff_mtu = dev->mtu + ETH_HLEN + VLAN_HLEN + ETH_LLC_SNAP_SIZE;
894 while (buf_size < eff_mtu) {
895 priv->frag_info[i].frag_size =
896 (eff_mtu > buf_size + frag_sizes[i]) ?
897 frag_sizes[i] : eff_mtu - buf_size;
898 priv->frag_info[i].frag_prefix_size = buf_size;
900 priv->frag_info[i].frag_align = NET_IP_ALIGN;
901 priv->frag_info[i].frag_stride =
902 ALIGN(frag_sizes[i] + NET_IP_ALIGN, SMP_CACHE_BYTES);
904 priv->frag_info[i].frag_align = 0;
905 priv->frag_info[i].frag_stride =
906 ALIGN(frag_sizes[i], SMP_CACHE_BYTES);
908 priv->frag_info[i].last_offset = mlx4_en_last_alloc_offset(
909 priv, priv->frag_info[i].frag_stride,
910 priv->frag_info[i].frag_align);
911 buf_size += priv->frag_info[i].frag_size;
916 priv->rx_skb_size = eff_mtu;
917 priv->log_rx_info = ROUNDUP_LOG2(i * sizeof(struct skb_frag_struct));
919 en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
920 "num_frags:%d):\n", eff_mtu, priv->num_frags);
921 for (i = 0; i < priv->num_frags; i++) {
922 en_dbg(DRV, priv, " frag:%d - size:%d prefix:%d align:%d "
923 "stride:%d last_offset:%d\n", i,
924 priv->frag_info[i].frag_size,
925 priv->frag_info[i].frag_prefix_size,
926 priv->frag_info[i].frag_align,
927 priv->frag_info[i].frag_stride,
928 priv->frag_info[i].last_offset);
932 /* RSS related functions */
934 /* Calculate rss size and map each entry in rss table to rx ring */
935 void mlx4_en_set_default_rss_map(struct mlx4_en_priv *priv,
936 struct mlx4_en_rss_map *rss_map,
937 int num_entries, int num_rings)
941 rss_map->size = roundup_pow_of_two(num_entries);
942 en_dbg(DRV, priv, "Setting default RSS map of %d entires\n",
945 for (i = 0; i < rss_map->size; i++) {
946 rss_map->map[i] = i % num_rings;
947 en_dbg(DRV, priv, "Entry %d ---> ring %d\n", i, rss_map->map[i]);
951 static int mlx4_en_config_rss_qp(struct mlx4_en_priv *priv,
952 int qpn, int srqn, int cqn,
953 enum mlx4_qp_state *state,
956 struct mlx4_en_dev *mdev = priv->mdev;
957 struct mlx4_qp_context *context;
960 context = kmalloc(sizeof *context , GFP_KERNEL);
962 en_err(priv, "Failed to allocate qp context\n");
966 err = mlx4_qp_alloc(mdev->dev, qpn, qp);
968 en_err(priv, "Failed to allocate qp #%x\n", qpn);
971 qp->event = mlx4_en_sqp_event;
973 memset(context, 0, sizeof *context);
974 mlx4_en_fill_qp_context(priv, 0, 0, 0, 0, qpn, cqn, srqn, context);
976 err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, context, qp, state);
978 mlx4_qp_remove(mdev->dev, qp);
979 mlx4_qp_free(mdev->dev, qp);
986 /* Allocate rx qp's and configure them according to rss map */
987 int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
989 struct mlx4_en_dev *mdev = priv->mdev;
990 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
991 struct mlx4_qp_context context;
992 struct mlx4_en_rss_context *rss_context;
994 int rss_xor = mdev->profile.rss_xor;
995 u8 rss_mask = mdev->profile.rss_mask;
996 int i, srqn, qpn, cqn;
1000 en_dbg(DRV, priv, "Configuring rss steering\n");
1001 err = mlx4_qp_reserve_range(mdev->dev, rss_map->size,
1002 rss_map->size, &rss_map->base_qpn);
1004 en_err(priv, "Failed reserving %d qps\n", rss_map->size);
1008 for (i = 0; i < rss_map->size; i++) {
1009 cqn = priv->rx_ring[rss_map->map[i]].cqn;
1010 srqn = priv->rx_ring[rss_map->map[i]].srq.srqn;
1011 qpn = rss_map->base_qpn + i;
1012 err = mlx4_en_config_rss_qp(priv, qpn, srqn, cqn,
1021 /* Configure RSS indirection qp */
1022 err = mlx4_qp_reserve_range(mdev->dev, 1, 1, &priv->base_qpn);
1024 en_err(priv, "Failed to reserve range for RSS "
1025 "indirection qp\n");
1028 err = mlx4_qp_alloc(mdev->dev, priv->base_qpn, &rss_map->indir_qp);
1030 en_err(priv, "Failed to allocate RSS indirection QP\n");
1033 rss_map->indir_qp.event = mlx4_en_sqp_event;
1034 mlx4_en_fill_qp_context(priv, 0, 0, 0, 1, priv->base_qpn,
1035 priv->rx_ring[0].cqn, 0, &context);
1037 ptr = ((void *) &context) + 0x3c;
1038 rss_context = (struct mlx4_en_rss_context *) ptr;
1039 rss_context->base_qpn = cpu_to_be32(ilog2(rss_map->size) << 24 |
1040 (rss_map->base_qpn));
1041 rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
1042 rss_context->hash_fn = rss_xor & 0x3;
1043 rss_context->flags = rss_mask << 2;
1045 err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
1046 &rss_map->indir_qp, &rss_map->indir_state);
1053 mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
1054 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
1055 mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
1056 mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
1058 mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
1060 for (i = 0; i < good_qps; i++) {
1061 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
1062 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
1063 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
1064 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
1066 mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, rss_map->size);
1070 void mlx4_en_release_rss_steer(struct mlx4_en_priv *priv)
1072 struct mlx4_en_dev *mdev = priv->mdev;
1073 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
1076 mlx4_qp_modify(mdev->dev, NULL, rss_map->indir_state,
1077 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->indir_qp);
1078 mlx4_qp_remove(mdev->dev, &rss_map->indir_qp);
1079 mlx4_qp_free(mdev->dev, &rss_map->indir_qp);
1080 mlx4_qp_release_range(mdev->dev, priv->base_qpn, 1);
1082 for (i = 0; i < rss_map->size; i++) {
1083 mlx4_qp_modify(mdev->dev, NULL, rss_map->state[i],
1084 MLX4_QP_STATE_RST, NULL, 0, 0, &rss_map->qps[i]);
1085 mlx4_qp_remove(mdev->dev, &rss_map->qps[i]);
1086 mlx4_qp_free(mdev->dev, &rss_map->qps[i]);
1088 mlx4_qp_release_range(mdev->dev, rss_map->base_qpn, rss_map->size);