2 * include/asm-i386/bugs.h
4 * Copyright (C) 1994 Linus Torvalds
6 * Cyrix stuff, June 1998 by:
7 * - Rafael R. Reilova (moved everything from head.S),
8 * <rreilova@ececs.uc.edu>
9 * - Channing Corn (tests & fixes),
10 * - Andrew D. Balsa (code cleanup).
12 * Pentium III FXSR, SSE support
13 * Gareth Hughes <gareth@valinux.com>, May 2000
17 * This is included by init/main.c to check for architecture-dependent bugs.
20 * void check_bugs(void);
23 #include <linux/config.h>
24 #include <linux/init.h>
25 #include <asm/processor.h>
29 static int __init no_halt(char *s)
31 boot_cpu_data.hlt_works_ok = 0;
35 __setup("no-hlt", no_halt);
37 static int __init mca_pentium(char *s)
43 __setup("mca-pentium", mca_pentium);
45 static int __init no_387(char *s)
47 boot_cpu_data.hard_math = 0;
48 write_cr0(0xE | read_cr0());
52 __setup("no387", no_387);
54 static double __initdata x = 4195835.0;
55 static double __initdata y = 3145727.0;
58 * This used to check for exceptions..
59 * However, it turns out that to support that,
60 * the XMM trap handlers basically had to
61 * be buggy. So let's have a correct XMM trap
62 * handler, and forget about printing out
63 * some status at boot.
65 * We should really only care about bugs here
66 * anyway. Not features.
68 static void __init check_fpu(void)
70 if (!boot_cpu_data.hard_math) {
71 #ifndef CONFIG_MATH_EMULATION
72 printk(KERN_EMERG "No coprocessor found and no math emulation present.\n");
73 printk(KERN_EMERG "Giving up.\n");
79 /* Enable FXSR and company _before_ testing for FP problems. */
81 * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
83 if (offsetof(struct task_struct, thread.i387.fxsave) & 15) {
84 extern void __buggy_fxsr_alignment(void);
85 __buggy_fxsr_alignment();
88 printk(KERN_INFO "Enabling fast FPU save and restore... ");
89 set_in_cr4(X86_CR4_OSFXSR);
93 printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
94 set_in_cr4(X86_CR4_OSXMMEXCPT);
98 /* Test for the divl bug.. */
104 "fsubp %%st,%%st(1)\n\t"
108 : "=m" (*&boot_cpu_data.fdiv_bug)
109 : "m" (*&x), "m" (*&y));
110 if (boot_cpu_data.fdiv_bug)
111 printk("Hmm, FPU with FDIV bug.\n");
114 static void __init check_hlt(void)
116 printk(KERN_INFO "Checking 'hlt' instruction... ");
117 if (!boot_cpu_data.hlt_works_ok) {
118 printk("disabled\n");
129 * Most 386 processors have a bug where a POPAD can lock the
130 * machine even from user space.
133 static void __init check_popad(void)
135 #ifndef CONFIG_X86_POPAD_OK
136 int res, inp = (int) &res;
138 printk(KERN_INFO "Checking for popad bug... ");
139 __asm__ __volatile__(
140 "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
144 /* If this fails, it means that any user program may lock the CPU hard. Too bad. */
145 if (res != 12345678) printk( "Buggy.\n" );
146 else printk( "OK.\n" );
151 * Check whether we are able to run this kernel safely on SMP.
153 * - In order to run on a i386, we need to be compiled for i386
154 * (for due to lack of "invlpg" and working WP on a i386)
155 * - In order to run on anything without a TSC, we need to be
156 * compiled for a i486.
157 * - In order to support the local APIC on a buggy Pentium machine,
158 * we need to be compiled with CONFIG_X86_GOOD_APIC disabled,
159 * which happens implicitly if compiled for a Pentium or lower
160 * (unless an advanced selection of CPU features is used) as an
161 * otherwise config implies a properly working local APIC without
162 * the need to do extra reads from the APIC.
165 static void __init check_config(void)
168 * We'd better not be a i386 if we're configured to use some
169 * i486+ only features! (WP works in supervisor mode and the
170 * new "invlpg" and "bswap" instructions)
172 #if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP)
173 if (boot_cpu_data.x86 == 3)
174 panic("Kernel requires i486+ for 'invlpg' and other features");
178 * If we configured ourselves for a TSC, we'd better have one!
180 #ifdef CONFIG_X86_TSC
182 panic("Kernel compiled for Pentium+, requires TSC feature!");
186 * If we were told we had a good local APIC, check for buggy Pentia,
187 * i.e. all B steppings and the C2 stepping of P54C when using their
188 * integrated APIC (see 11AP erratum in "Pentium Processor
189 * Specification Update").
191 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC)
192 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL
194 && boot_cpu_data.x86 == 5
195 && boot_cpu_data.x86_model == 2
196 && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11))
197 panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!");
201 extern void alternative_instructions(void);
203 static void __init check_bugs(void)
205 identify_cpu(&boot_cpu_data);
208 print_cpu_info(&boot_cpu_data);
214 system_utsname.machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
215 alternative_instructions();