2 * Device Tree Source for AMCC Canyonlands (460EX)
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
14 model = "amcc,canyonlands";
15 compatible = "amcc,canyonlands";
16 dcr-parent = <&/cpus/cpu@0>;
31 model = "PowerPC,460EX";
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <20>;
36 d-cache-line-size = <20>;
37 i-cache-size = <8000>;
38 d-cache-size = <8000>;
40 dcr-access-method = "native";
45 device_type = "memory";
46 reg = <0 0 0>; /* Filled in by U-Boot */
49 UIC0: interrupt-controller0 {
50 compatible = "ibm,uic-460ex","ibm,uic";
56 #interrupt-cells = <2>;
59 UIC1: interrupt-controller1 {
60 compatible = "ibm,uic-460ex","ibm,uic";
66 #interrupt-cells = <2>;
67 interrupts = <1e 4 1f 4>; /* cascade */
68 interrupt-parent = <&UIC0>;
71 UIC2: interrupt-controller2 {
72 compatible = "ibm,uic-460ex","ibm,uic";
78 #interrupt-cells = <2>;
79 interrupts = <a 4 b 4>; /* cascade */
80 interrupt-parent = <&UIC0>;
83 UIC3: interrupt-controller3 {
84 compatible = "ibm,uic-460ex","ibm,uic";
90 #interrupt-cells = <2>;
91 interrupts = <10 4 11 4>; /* cascade */
92 interrupt-parent = <&UIC0>;
96 compatible = "ibm,sdr-460ex";
101 compatible = "ibm,cpr-460ex";
106 compatible = "ibm,plb-460ex", "ibm,plb4";
107 #address-cells = <2>;
110 clock-frequency = <0>; /* Filled in by U-Boot */
113 compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
118 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
122 #address-cells = <0>;
124 interrupt-parent = <&UIC2>;
125 interrupts = < /*TXEOB*/ 6 4
133 compatible = "ibm,opb-460ex", "ibm,opb";
134 #address-cells = <1>;
136 ranges = <b0000000 4 b0000000 50000000>;
137 clock-frequency = <0>; /* Filled in by U-Boot */
140 compatible = "ibm,ebc-460ex", "ibm,ebc";
142 #address-cells = <2>;
144 clock-frequency = <0>; /* Filled in by U-Boot */
146 interrupt-parent = <&UIC1>;
149 UART0: serial@ef600300 {
150 device_type = "serial";
151 compatible = "ns16550";
153 virtual-reg = <ef600300>;
154 clock-frequency = <0>; /* Filled in by U-Boot */
155 current-speed = <0>; /* Filled in by U-Boot */
156 interrupt-parent = <&UIC1>;
160 UART1: serial@ef600400 {
161 device_type = "serial";
162 compatible = "ns16550";
164 virtual-reg = <ef600400>;
165 clock-frequency = <0>; /* Filled in by U-Boot */
166 current-speed = <0>; /* Filled in by U-Boot */
167 interrupt-parent = <&UIC0>;
171 UART2: serial@ef600500 {
172 device_type = "serial";
173 compatible = "ns16550";
175 virtual-reg = <ef600500>;
176 clock-frequency = <0>; /* Filled in by U-Boot */
177 current-speed = <0>; /* Filled in by U-Boot */
178 interrupt-parent = <&UIC1>;
182 UART3: serial@ef600600 {
183 device_type = "serial";
184 compatible = "ns16550";
186 virtual-reg = <ef600600>;
187 clock-frequency = <0>; /* Filled in by U-Boot */
188 current-speed = <0>; /* Filled in by U-Boot */
189 interrupt-parent = <&UIC1>;
194 compatible = "ibm,iic-460ex", "ibm,iic";
196 interrupt-parent = <&UIC0>;
201 compatible = "ibm,iic-460ex", "ibm,iic";
203 interrupt-parent = <&UIC0>;
207 ZMII0: emac-zmii@ef600d00 {
208 compatible = "ibm,zmii-460ex", "ibm,zmii";
212 RGMII0: emac-rgmii@ef601500 {
213 compatible = "ibm,rgmii-460ex", "ibm,rgmii";
218 TAH0: emac-tah@ef601350 {
219 compatible = "ibm,tah-460ex", "ibm,tah";
223 TAH1: emac-tah@ef601450 {
224 compatible = "ibm,tah-460ex", "ibm,tah";
228 EMAC0: ethernet@ef600e00 {
229 device_type = "network";
230 compatible = "ibm,emac-460ex", "ibm,emac4";
231 interrupt-parent = <&EMAC0>;
233 #interrupt-cells = <1>;
234 #address-cells = <0>;
236 interrupt-map = </*Status*/ 0 &UIC2 10 4
237 /*Wake*/ 1 &UIC2 14 4>;
239 local-mac-address = [000000000000]; /* Filled in by U-Boot */
240 mal-device = <&MAL0>;
241 mal-tx-channel = <0>;
242 mal-rx-channel = <0>;
244 max-frame-size = <2328>;
245 rx-fifo-size = <1000>;
246 tx-fifo-size = <800>;
248 phy-map = <00000000>;
249 rgmii-device = <&RGMII0>;
251 tah-device = <&TAH0>;
253 has-inverted-stacr-oc;
254 has-new-stacr-staopc;
257 EMAC1: ethernet@ef600f00 {
258 device_type = "network";
259 compatible = "ibm,emac-460ex", "ibm,emac4";
260 interrupt-parent = <&EMAC1>;
262 #interrupt-cells = <1>;
263 #address-cells = <0>;
265 interrupt-map = </*Status*/ 0 &UIC2 11 4
266 /*Wake*/ 1 &UIC2 15 4>;
268 local-mac-address = [000000000000]; /* Filled in by U-Boot */
269 mal-device = <&MAL0>;
270 mal-tx-channel = <1>;
271 mal-rx-channel = <8>;
273 max-frame-size = <2328>;
274 rx-fifo-size = <1000>;
275 tx-fifo-size = <800>;
277 phy-map = <00000000>;
278 rgmii-device = <&RGMII0>;
280 tah-device = <&TAH1>;
282 has-inverted-stacr-oc;
283 has-new-stacr-staopc;
284 mdio-device = <&EMAC0>;
288 PCIX0: pci@c0ec00000 {
290 #interrupt-cells = <1>;
292 #address-cells = <3>;
293 compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";
295 large-inbound-windows;
297 reg = <c 0ec00000 8 /* Config space access */
298 0 0 0 /* no IACK cycles */
299 c 0ed00000 4 /* Special cycles */
300 c 0ec80000 100 /* Internal registers */
301 c 0ec80100 fc>; /* Internal messaging registers */
303 /* Outbound ranges, one memory and one IO,
304 * later cannot be changed
306 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
307 01000000 0 00000000 0000000c 08000000 0 00010000>;
309 /* Inbound 2GB range starting at 0 */
310 dma-ranges = <42000000 0 0 0 0 0 80000000>;
312 /* This drives busses 0 to 0x3f */
315 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
316 interrupt-map-mask = <0000 0 0 0>;
317 interrupt-map = < 0000 0 0 0 &UIC1 0 8 >;
320 PCIE0: pciex@d00000000 {
322 #interrupt-cells = <1>;
324 #address-cells = <3>;
325 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
327 port = <0>; /* port number */
328 reg = <d 00000000 20000000 /* Config space access */
329 c 08010000 00001000>; /* Registers */
333 /* Outbound ranges, one memory and one IO,
334 * later cannot be changed
336 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
337 01000000 0 00000000 0000000f 80000000 0 00010000>;
339 /* Inbound 2GB range starting at 0 */
340 dma-ranges = <42000000 0 0 0 0 0 80000000>;
342 /* This drives busses 40 to 0x7f */
345 /* Legacy interrupts (note the weird polarity, the bridge seems
346 * to invert PCIe legacy interrupts).
347 * We are de-swizzling here because the numbers are actually for
348 * port of the root complex virtual P2P bridge. But I want
349 * to avoid putting a node for it in the tree, so the numbers
350 * below are basically de-swizzled numbers.
351 * The real slot is on idsel 0, so the swizzling is 1:1
353 interrupt-map-mask = <0000 0 0 7>;
355 0000 0 0 1 &UIC3 c 4 /* swizzled int A */
356 0000 0 0 2 &UIC3 d 4 /* swizzled int B */
357 0000 0 0 3 &UIC3 e 4 /* swizzled int C */
358 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>;
361 PCIE1: pciex@d20000000 {
363 #interrupt-cells = <1>;
365 #address-cells = <3>;
366 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
368 port = <1>; /* port number */
369 reg = <d 20000000 20000000 /* Config space access */
370 c 08011000 00001000>; /* Registers */
374 /* Outbound ranges, one memory and one IO,
375 * later cannot be changed
377 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
378 01000000 0 00000000 0000000f 80010000 0 00010000>;
380 /* Inbound 2GB range starting at 0 */
381 dma-ranges = <42000000 0 0 0 0 0 80000000>;
383 /* This drives busses 80 to 0xbf */
386 /* Legacy interrupts (note the weird polarity, the bridge seems
387 * to invert PCIe legacy interrupts).
388 * We are de-swizzling here because the numbers are actually for
389 * port of the root complex virtual P2P bridge. But I want
390 * to avoid putting a node for it in the tree, so the numbers
391 * below are basically de-swizzled numbers.
392 * The real slot is on idsel 0, so the swizzling is 1:1
394 interrupt-map-mask = <0000 0 0 7>;
396 0000 0 0 1 &UIC3 10 4 /* swizzled int A */
397 0000 0 0 2 &UIC3 11 4 /* swizzled int B */
398 0000 0 0 3 &UIC3 12 4 /* swizzled int C */
399 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>;