2 * Device Tree Source for the Socrates board (MPC8544).
4 * Copyright (c) 2008 Emcraft Systems.
5 * Sergei Poselenov, <sposelenov@emcraft.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
16 model = "abb,socrates";
17 compatible = "abb,socrates";
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <0x8000>; // L1, 32K
39 i-cache-size = <0x8000>; // L1, 32K
40 timebase-frequency = <0>;
42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
48 device_type = "memory";
49 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
56 ranges = <0x00000000 0xe0000000 0x00100000>;
57 reg = <0xe0000000 0x00001000>; // CCSRBAR 1M
58 bus-frequency = <0>; // Filled in by U-Boot
59 compatible = "fsl,mpc8544-immr", "simple-bus";
61 memory-controller@2000 {
62 compatible = "fsl,mpc8544-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
68 L2: l2-cache-controller@20000 {
69 compatible = "fsl,mpc8544-l2-cache-controller";
70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>;
72 cache-size = <0x40000>; // L2, 256K
73 interrupt-parent = <&mpic>;
81 compatible = "fsl-i2c";
84 interrupt-parent = <&mpic>;
88 compatible = "winbond,w83782d";
92 compatible = "epson,rx8025";
95 interrupt-parent = <&mpic>;
98 compatible = "dallas,ds75";
102 compatible = "ti,tsc2003";
104 interrupt-parent = <&mpic>;
110 #address-cells = <1>;
113 compatible = "fsl-i2c";
114 reg = <0x3100 0x100>;
116 interrupt-parent = <&mpic>;
120 enet0: ethernet@24000 {
121 #address-cells = <1>;
124 device_type = "network";
126 compatible = "gianfar";
127 reg = <0x24000 0x1000>;
128 ranges = <0x0 0x24000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <29 2 30 2 34 2>;
131 interrupt-parent = <&mpic>;
132 phy-handle = <&phy0>;
133 tbi-handle = <&tbi0>;
134 phy-connection-type = "rgmii-id";
137 #address-cells = <1>;
139 compatible = "fsl,gianfar-mdio";
142 phy0: ethernet-phy@0 {
143 interrupt-parent = <&mpic>;
147 phy1: ethernet-phy@1 {
148 interrupt-parent = <&mpic>;
158 enet1: ethernet@26000 {
159 #address-cells = <1>;
162 device_type = "network";
164 compatible = "gianfar";
165 reg = <0x26000 0x1000>;
166 ranges = <0x0 0x26000 0x1000>;
167 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <31 2 32 2 33 2>;
169 interrupt-parent = <&mpic>;
170 phy-handle = <&phy1>;
171 tbi-handle = <&tbi1>;
172 phy-connection-type = "rgmii-id";
175 #address-cells = <1>;
177 compatible = "fsl,gianfar-tbi";
186 serial0: serial@4500 {
188 device_type = "serial";
189 compatible = "ns16550";
190 reg = <0x4500 0x100>;
191 clock-frequency = <0>;
193 interrupt-parent = <&mpic>;
196 serial1: serial@4600 {
198 device_type = "serial";
199 compatible = "ns16550";
200 reg = <0x4600 0x100>;
201 clock-frequency = <0>;
203 interrupt-parent = <&mpic>;
206 global-utilities@e0000 { //global utilities block
207 compatible = "fsl,mpc8548-guts";
208 reg = <0xe0000 0x1000>;
213 interrupt-controller;
214 #address-cells = <0>;
215 #interrupt-cells = <2>;
216 reg = <0x40000 0x40000>;
217 compatible = "chrp,open-pic";
218 device_type = "open-pic";
224 compatible = "fsl,mpc8544-localbus",
227 #address-cells = <2>;
229 reg = <0xe0005000 0x40>;
231 ranges = <0 0 0xfc000000 0x04000000
232 2 0 0xc8000000 0x04000000
233 3 0 0xc0000000 0x00100000
234 >; /* Overwritten by U-Boot */
237 compatible = "amd,s29gl256n", "cfi-flash";
239 reg = <0x0 0x000000 0x4000000>;
240 #address-cells = <1>;
244 reg = <0x0 0x1e0000>;
249 reg = <0x1e0000 0x20000>;
253 reg = <0x200000 0x200000>;
257 reg = <0x400000 0x3b80000>;
261 reg = <0x3f80000 0x40000>;
266 reg = <0x3fc0000 0x40000>;
272 compatible = "fujitsu,lime";
273 reg = <2 0x0 0x4000000>;
274 interrupt-parent = <&mpic>;
278 fpga_pic: fpga-pic@3,10 {
279 compatible = "abb,socrates-fpga-pic";
281 interrupt-controller;
282 /* IRQs 2, 10, 11, active low, level-sensitive */
283 interrupts = <2 1 10 1 11 1>;
284 interrupt-parent = <&mpic>;
285 #interrupt-cells = <3>;
289 compatible = "abb,socrates-spi";
291 interrupts = <8 4 0>; // number, type, routing
292 interrupt-parent = <&fpga_pic>;
296 compatible = "abb,socrates-nand";
299 #address-cells = <1>;
303 reg = <0x0 0x40000000>;
308 compatible = "philips,sja1000";
309 reg = <3 0x100 0x80>;
310 interrupts = <2 8 1>; // number, type, routing
311 interrupt-parent = <&fpga_pic>;
317 #interrupt-cells = <1>;
319 #address-cells = <3>;
320 compatible = "fsl,mpc8540-pci";
322 reg = <0xe0008000 0x1000>;
323 clock-frequency = <66666666>;
325 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
328 0x8800 0x0 0x0 1 &mpic 5 1
330 0x9000 0x0 0x0 1 &mpic 4 1>;
331 interrupt-parent = <&mpic>;
333 bus-range = <0x0 0x0>;
334 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
335 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;