[SCSI] 3w-9xxx: eliminate missed map_single path
[linux-2.6] / drivers / ide / ide-iops.c
1 /*
2  * linux/drivers/ide/ide-iops.c Version 0.37    Mar 05, 2003
3  *
4  *  Copyright (C) 2000-2002     Andre Hedrick <andre@linux-ide.org>
5  *  Copyright (C) 2003          Red Hat <alan@redhat.com>
6  *
7  */
8
9 #include <linux/module.h>
10 #include <linux/types.h>
11 #include <linux/string.h>
12 #include <linux/kernel.h>
13 #include <linux/timer.h>
14 #include <linux/mm.h>
15 #include <linux/interrupt.h>
16 #include <linux/major.h>
17 #include <linux/errno.h>
18 #include <linux/genhd.h>
19 #include <linux/blkpg.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/delay.h>
23 #include <linux/hdreg.h>
24 #include <linux/ide.h>
25 #include <linux/bitops.h>
26 #include <linux/nmi.h>
27
28 #include <asm/byteorder.h>
29 #include <asm/irq.h>
30 #include <asm/uaccess.h>
31 #include <asm/io.h>
32
33 /*
34  *      Conventional PIO operations for ATA devices
35  */
36
37 static u8 ide_inb (unsigned long port)
38 {
39         return (u8) inb(port);
40 }
41
42 static u16 ide_inw (unsigned long port)
43 {
44         return (u16) inw(port);
45 }
46
47 static void ide_insw (unsigned long port, void *addr, u32 count)
48 {
49         insw(port, addr, count);
50 }
51
52 static void ide_insl (unsigned long port, void *addr, u32 count)
53 {
54         insl(port, addr, count);
55 }
56
57 static void ide_outb (u8 val, unsigned long port)
58 {
59         outb(val, port);
60 }
61
62 static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port)
63 {
64         outb(addr, port);
65 }
66
67 static void ide_outw (u16 val, unsigned long port)
68 {
69         outw(val, port);
70 }
71
72 static void ide_outsw (unsigned long port, void *addr, u32 count)
73 {
74         outsw(port, addr, count);
75 }
76
77 static void ide_outsl (unsigned long port, void *addr, u32 count)
78 {
79         outsl(port, addr, count);
80 }
81
82 void default_hwif_iops (ide_hwif_t *hwif)
83 {
84         hwif->OUTB      = ide_outb;
85         hwif->OUTBSYNC  = ide_outbsync;
86         hwif->OUTW      = ide_outw;
87         hwif->OUTSW     = ide_outsw;
88         hwif->OUTSL     = ide_outsl;
89         hwif->INB       = ide_inb;
90         hwif->INW       = ide_inw;
91         hwif->INSW      = ide_insw;
92         hwif->INSL      = ide_insl;
93 }
94
95 /*
96  *      MMIO operations, typically used for SATA controllers
97  */
98
99 static u8 ide_mm_inb (unsigned long port)
100 {
101         return (u8) readb((void __iomem *) port);
102 }
103
104 static u16 ide_mm_inw (unsigned long port)
105 {
106         return (u16) readw((void __iomem *) port);
107 }
108
109 static void ide_mm_insw (unsigned long port, void *addr, u32 count)
110 {
111         __ide_mm_insw((void __iomem *) port, addr, count);
112 }
113
114 static void ide_mm_insl (unsigned long port, void *addr, u32 count)
115 {
116         __ide_mm_insl((void __iomem *) port, addr, count);
117 }
118
119 static void ide_mm_outb (u8 value, unsigned long port)
120 {
121         writeb(value, (void __iomem *) port);
122 }
123
124 static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port)
125 {
126         writeb(value, (void __iomem *) port);
127 }
128
129 static void ide_mm_outw (u16 value, unsigned long port)
130 {
131         writew(value, (void __iomem *) port);
132 }
133
134 static void ide_mm_outsw (unsigned long port, void *addr, u32 count)
135 {
136         __ide_mm_outsw((void __iomem *) port, addr, count);
137 }
138
139 static void ide_mm_outsl (unsigned long port, void *addr, u32 count)
140 {
141         __ide_mm_outsl((void __iomem *) port, addr, count);
142 }
143
144 void default_hwif_mmiops (ide_hwif_t *hwif)
145 {
146         hwif->OUTB      = ide_mm_outb;
147         /* Most systems will need to override OUTBSYNC, alas however
148            this one is controller specific! */
149         hwif->OUTBSYNC  = ide_mm_outbsync;
150         hwif->OUTW      = ide_mm_outw;
151         hwif->OUTSW     = ide_mm_outsw;
152         hwif->OUTSL     = ide_mm_outsl;
153         hwif->INB       = ide_mm_inb;
154         hwif->INW       = ide_mm_inw;
155         hwif->INSW      = ide_mm_insw;
156         hwif->INSL      = ide_mm_insl;
157 }
158
159 EXPORT_SYMBOL(default_hwif_mmiops);
160
161 u32 ide_read_24 (ide_drive_t *drive)
162 {
163         u8 hcyl = HWIF(drive)->INB(IDE_HCYL_REG);
164         u8 lcyl = HWIF(drive)->INB(IDE_LCYL_REG);
165         u8 sect = HWIF(drive)->INB(IDE_SECTOR_REG);
166         return (hcyl<<16)|(lcyl<<8)|sect;
167 }
168
169 void SELECT_DRIVE (ide_drive_t *drive)
170 {
171         if (HWIF(drive)->selectproc)
172                 HWIF(drive)->selectproc(drive);
173         HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG);
174 }
175
176 EXPORT_SYMBOL(SELECT_DRIVE);
177
178 void SELECT_INTERRUPT (ide_drive_t *drive)
179 {
180         if (HWIF(drive)->intrproc)
181                 HWIF(drive)->intrproc(drive);
182         else
183                 HWIF(drive)->OUTB(drive->ctl|2, IDE_CONTROL_REG);
184 }
185
186 void SELECT_MASK (ide_drive_t *drive, int mask)
187 {
188         if (HWIF(drive)->maskproc)
189                 HWIF(drive)->maskproc(drive, mask);
190 }
191
192 void QUIRK_LIST (ide_drive_t *drive)
193 {
194         if (HWIF(drive)->quirkproc)
195                 drive->quirk_list = HWIF(drive)->quirkproc(drive);
196 }
197
198 /*
199  * Some localbus EIDE interfaces require a special access sequence
200  * when using 32-bit I/O instructions to transfer data.  We call this
201  * the "vlb_sync" sequence, which consists of three successive reads
202  * of the sector count register location, with interrupts disabled
203  * to ensure that the reads all happen together.
204  */
205 static void ata_vlb_sync(ide_drive_t *drive, unsigned long port)
206 {
207         (void) HWIF(drive)->INB(port);
208         (void) HWIF(drive)->INB(port);
209         (void) HWIF(drive)->INB(port);
210 }
211
212 /*
213  * This is used for most PIO data transfers *from* the IDE interface
214  */
215 static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount)
216 {
217         ide_hwif_t *hwif        = HWIF(drive);
218         u8 io_32bit             = drive->io_32bit;
219
220         if (io_32bit) {
221                 if (io_32bit & 2) {
222                         unsigned long flags;
223                         local_irq_save(flags);
224                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
225                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
226                         local_irq_restore(flags);
227                 } else
228                         hwif->INSL(IDE_DATA_REG, buffer, wcount);
229         } else {
230                 hwif->INSW(IDE_DATA_REG, buffer, wcount<<1);
231         }
232 }
233
234 /*
235  * This is used for most PIO data transfers *to* the IDE interface
236  */
237 static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount)
238 {
239         ide_hwif_t *hwif        = HWIF(drive);
240         u8 io_32bit             = drive->io_32bit;
241
242         if (io_32bit) {
243                 if (io_32bit & 2) {
244                         unsigned long flags;
245                         local_irq_save(flags);
246                         ata_vlb_sync(drive, IDE_NSECTOR_REG);
247                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
248                         local_irq_restore(flags);
249                 } else
250                         hwif->OUTSL(IDE_DATA_REG, buffer, wcount);
251         } else {
252                 hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1);
253         }
254 }
255
256 /*
257  * The following routines are mainly used by the ATAPI drivers.
258  *
259  * These routines will round up any request for an odd number of bytes,
260  * so if an odd bytecount is specified, be sure that there's at least one
261  * extra byte allocated for the buffer.
262  */
263
264 static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
265 {
266         ide_hwif_t *hwif = HWIF(drive);
267
268         ++bytecount;
269 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
270         if (MACH_IS_ATARI || MACH_IS_Q40) {
271                 /* Atari has a byte-swapped IDE interface */
272                 insw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
273                 return;
274         }
275 #endif /* CONFIG_ATARI || CONFIG_Q40 */
276         hwif->ata_input_data(drive, buffer, bytecount / 4);
277         if ((bytecount & 0x03) >= 2)
278                 hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1);
279 }
280
281 static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount)
282 {
283         ide_hwif_t *hwif = HWIF(drive);
284
285         ++bytecount;
286 #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
287         if (MACH_IS_ATARI || MACH_IS_Q40) {
288                 /* Atari has a byte-swapped IDE interface */
289                 outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2);
290                 return;
291         }
292 #endif /* CONFIG_ATARI || CONFIG_Q40 */
293         hwif->ata_output_data(drive, buffer, bytecount / 4);
294         if ((bytecount & 0x03) >= 2)
295                 hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1);
296 }
297
298 void default_hwif_transport(ide_hwif_t *hwif)
299 {
300         hwif->ata_input_data            = ata_input_data;
301         hwif->ata_output_data           = ata_output_data;
302         hwif->atapi_input_bytes         = atapi_input_bytes;
303         hwif->atapi_output_bytes        = atapi_output_bytes;
304 }
305
306 /*
307  * Beginning of Taskfile OPCODE Library and feature sets.
308  */
309 void ide_fix_driveid (struct hd_driveid *id)
310 {
311 #ifndef __LITTLE_ENDIAN
312 # ifdef __BIG_ENDIAN
313         int i;
314         u16 *stringcast;
315
316         id->config         = __le16_to_cpu(id->config);
317         id->cyls           = __le16_to_cpu(id->cyls);
318         id->reserved2      = __le16_to_cpu(id->reserved2);
319         id->heads          = __le16_to_cpu(id->heads);
320         id->track_bytes    = __le16_to_cpu(id->track_bytes);
321         id->sector_bytes   = __le16_to_cpu(id->sector_bytes);
322         id->sectors        = __le16_to_cpu(id->sectors);
323         id->vendor0        = __le16_to_cpu(id->vendor0);
324         id->vendor1        = __le16_to_cpu(id->vendor1);
325         id->vendor2        = __le16_to_cpu(id->vendor2);
326         stringcast = (u16 *)&id->serial_no[0];
327         for (i = 0; i < (20/2); i++)
328                 stringcast[i] = __le16_to_cpu(stringcast[i]);
329         id->buf_type       = __le16_to_cpu(id->buf_type);
330         id->buf_size       = __le16_to_cpu(id->buf_size);
331         id->ecc_bytes      = __le16_to_cpu(id->ecc_bytes);
332         stringcast = (u16 *)&id->fw_rev[0];
333         for (i = 0; i < (8/2); i++)
334                 stringcast[i] = __le16_to_cpu(stringcast[i]);
335         stringcast = (u16 *)&id->model[0];
336         for (i = 0; i < (40/2); i++)
337                 stringcast[i] = __le16_to_cpu(stringcast[i]);
338         id->dword_io       = __le16_to_cpu(id->dword_io);
339         id->reserved50     = __le16_to_cpu(id->reserved50);
340         id->field_valid    = __le16_to_cpu(id->field_valid);
341         id->cur_cyls       = __le16_to_cpu(id->cur_cyls);
342         id->cur_heads      = __le16_to_cpu(id->cur_heads);
343         id->cur_sectors    = __le16_to_cpu(id->cur_sectors);
344         id->cur_capacity0  = __le16_to_cpu(id->cur_capacity0);
345         id->cur_capacity1  = __le16_to_cpu(id->cur_capacity1);
346         id->lba_capacity   = __le32_to_cpu(id->lba_capacity);
347         id->dma_1word      = __le16_to_cpu(id->dma_1word);
348         id->dma_mword      = __le16_to_cpu(id->dma_mword);
349         id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes);
350         id->eide_dma_min   = __le16_to_cpu(id->eide_dma_min);
351         id->eide_dma_time  = __le16_to_cpu(id->eide_dma_time);
352         id->eide_pio       = __le16_to_cpu(id->eide_pio);
353         id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy);
354         for (i = 0; i < 2; ++i)
355                 id->words69_70[i] = __le16_to_cpu(id->words69_70[i]);
356         for (i = 0; i < 4; ++i)
357                 id->words71_74[i] = __le16_to_cpu(id->words71_74[i]);
358         id->queue_depth    = __le16_to_cpu(id->queue_depth);
359         for (i = 0; i < 4; ++i)
360                 id->words76_79[i] = __le16_to_cpu(id->words76_79[i]);
361         id->major_rev_num  = __le16_to_cpu(id->major_rev_num);
362         id->minor_rev_num  = __le16_to_cpu(id->minor_rev_num);
363         id->command_set_1  = __le16_to_cpu(id->command_set_1);
364         id->command_set_2  = __le16_to_cpu(id->command_set_2);
365         id->cfsse          = __le16_to_cpu(id->cfsse);
366         id->cfs_enable_1   = __le16_to_cpu(id->cfs_enable_1);
367         id->cfs_enable_2   = __le16_to_cpu(id->cfs_enable_2);
368         id->csf_default    = __le16_to_cpu(id->csf_default);
369         id->dma_ultra      = __le16_to_cpu(id->dma_ultra);
370         id->trseuc         = __le16_to_cpu(id->trseuc);
371         id->trsEuc         = __le16_to_cpu(id->trsEuc);
372         id->CurAPMvalues   = __le16_to_cpu(id->CurAPMvalues);
373         id->mprc           = __le16_to_cpu(id->mprc);
374         id->hw_config      = __le16_to_cpu(id->hw_config);
375         id->acoustic       = __le16_to_cpu(id->acoustic);
376         id->msrqs          = __le16_to_cpu(id->msrqs);
377         id->sxfert         = __le16_to_cpu(id->sxfert);
378         id->sal            = __le16_to_cpu(id->sal);
379         id->spg            = __le32_to_cpu(id->spg);
380         id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2);
381         for (i = 0; i < 22; i++)
382                 id->words104_125[i]   = __le16_to_cpu(id->words104_125[i]);
383         id->last_lun       = __le16_to_cpu(id->last_lun);
384         id->word127        = __le16_to_cpu(id->word127);
385         id->dlf            = __le16_to_cpu(id->dlf);
386         id->csfo           = __le16_to_cpu(id->csfo);
387         for (i = 0; i < 26; i++)
388                 id->words130_155[i] = __le16_to_cpu(id->words130_155[i]);
389         id->word156        = __le16_to_cpu(id->word156);
390         for (i = 0; i < 3; i++)
391                 id->words157_159[i] = __le16_to_cpu(id->words157_159[i]);
392         id->cfa_power      = __le16_to_cpu(id->cfa_power);
393         for (i = 0; i < 14; i++)
394                 id->words161_175[i] = __le16_to_cpu(id->words161_175[i]);
395         for (i = 0; i < 31; i++)
396                 id->words176_205[i] = __le16_to_cpu(id->words176_205[i]);
397         for (i = 0; i < 48; i++)
398                 id->words206_254[i] = __le16_to_cpu(id->words206_254[i]);
399         id->integrity_word  = __le16_to_cpu(id->integrity_word);
400 # else
401 #  error "Please fix <asm/byteorder.h>"
402 # endif
403 #endif
404 }
405
406 /* FIXME: exported for use by the USB storage (isd200.c) code only */
407 EXPORT_SYMBOL(ide_fix_driveid);
408
409 void ide_fixstring (u8 *s, const int bytecount, const int byteswap)
410 {
411         u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */
412
413         if (byteswap) {
414                 /* convert from big-endian to host byte order */
415                 for (p = end ; p != s;) {
416                         unsigned short *pp = (unsigned short *) (p -= 2);
417                         *pp = ntohs(*pp);
418                 }
419         }
420         /* strip leading blanks */
421         while (s != end && *s == ' ')
422                 ++s;
423         /* compress internal blanks and strip trailing blanks */
424         while (s != end && *s) {
425                 if (*s++ != ' ' || (s != end && *s && *s != ' '))
426                         *p++ = *(s-1);
427         }
428         /* wipe out trailing garbage */
429         while (p != end)
430                 *p++ = '\0';
431 }
432
433 EXPORT_SYMBOL(ide_fixstring);
434
435 /*
436  * Needed for PCI irq sharing
437  */
438 int drive_is_ready (ide_drive_t *drive)
439 {
440         ide_hwif_t *hwif        = HWIF(drive);
441         u8 stat                 = 0;
442
443         if (drive->waiting_for_dma)
444                 return hwif->ide_dma_test_irq(drive);
445
446 #if 0
447         /* need to guarantee 400ns since last command was issued */
448         udelay(1);
449 #endif
450
451 #ifdef CONFIG_IDEPCI_SHARE_IRQ
452         /*
453          * We do a passive status test under shared PCI interrupts on
454          * cards that truly share the ATA side interrupt, but may also share
455          * an interrupt with another pci card/device.  We make no assumptions
456          * about possible isa-pnp and pci-pnp issues yet.
457          */
458         if (IDE_CONTROL_REG)
459                 stat = hwif->INB(IDE_ALTSTATUS_REG);
460         else
461 #endif /* CONFIG_IDEPCI_SHARE_IRQ */
462                 /* Note: this may clear a pending IRQ!! */
463                 stat = hwif->INB(IDE_STATUS_REG);
464
465         if (stat & BUSY_STAT)
466                 /* drive busy:  definitely not interrupting */
467                 return 0;
468
469         /* drive ready: *might* be interrupting */
470         return 1;
471 }
472
473 EXPORT_SYMBOL(drive_is_ready);
474
475 /*
476  * Global for All, and taken from ide-pmac.c. Can be called
477  * with spinlock held & IRQs disabled, so don't schedule !
478  */
479 int wait_for_ready (ide_drive_t *drive, int timeout)
480 {
481         ide_hwif_t *hwif        = HWIF(drive);
482         u8 stat                 = 0;
483
484         while(--timeout) {
485                 stat = hwif->INB(IDE_STATUS_REG);
486                 if (!(stat & BUSY_STAT)) {
487                         if (drive->ready_stat == 0)
488                                 break;
489                         else if ((stat & drive->ready_stat)||(stat & ERR_STAT))
490                                 break;
491                 }
492                 mdelay(1);
493         }
494         if ((stat & ERR_STAT) || timeout <= 0) {
495                 if (stat & ERR_STAT) {
496                         printk(KERN_ERR "%s: wait_for_ready, "
497                                 "error status: %x\n", drive->name, stat);
498                 }
499                 return 1;
500         }
501         return 0;
502 }
503
504 /*
505  * This routine busy-waits for the drive status to be not "busy".
506  * It then checks the status for all of the "good" bits and none
507  * of the "bad" bits, and if all is okay it returns 0.  All other
508  * cases return 1 after invoking ide_error() -- caller should just return.
509  *
510  * This routine should get fixed to not hog the cpu during extra long waits..
511  * That could be done by busy-waiting for the first jiffy or two, and then
512  * setting a timer to wake up at half second intervals thereafter,
513  * until timeout is achieved, before timing out.
514  */
515 int ide_wait_stat (ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout)
516 {
517         ide_hwif_t *hwif = HWIF(drive);
518         u8 stat;
519         int i;
520         unsigned long flags;
521  
522         /* bail early if we've exceeded max_failures */
523         if (drive->max_failures && (drive->failures > drive->max_failures)) {
524                 *startstop = ide_stopped;
525                 return 1;
526         }
527
528         udelay(1);      /* spec allows drive 400ns to assert "BUSY" */
529         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
530                 local_irq_set(flags);
531                 timeout += jiffies;
532                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
533                         if (time_after(jiffies, timeout)) {
534                                 /*
535                                  * One last read after the timeout in case
536                                  * heavy interrupt load made us not make any
537                                  * progress during the timeout..
538                                  */
539                                 stat = hwif->INB(IDE_STATUS_REG);
540                                 if (!(stat & BUSY_STAT))
541                                         break;
542
543                                 local_irq_restore(flags);
544                                 *startstop = ide_error(drive, "status timeout", stat);
545                                 return 1;
546                         }
547                 }
548                 local_irq_restore(flags);
549         }
550         /*
551          * Allow status to settle, then read it again.
552          * A few rare drives vastly violate the 400ns spec here,
553          * so we'll wait up to 10usec for a "good" status
554          * rather than expensively fail things immediately.
555          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
556          */
557         for (i = 0; i < 10; i++) {
558                 udelay(1);
559                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), good, bad))
560                         return 0;
561         }
562         *startstop = ide_error(drive, "status error", stat);
563         return 1;
564 }
565
566 EXPORT_SYMBOL(ide_wait_stat);
567
568 /*
569  *  All hosts that use the 80c ribbon must use!
570  *  The name is derived from upper byte of word 93 and the 80c ribbon.
571  */
572 u8 eighty_ninty_three (ide_drive_t *drive)
573 {
574         ide_hwif_t *hwif = drive->hwif;
575         struct hd_driveid *id = drive->id;
576
577         if (hwif->udma_four == 0)
578                 goto no_80w;
579
580         /* Check for SATA but only if we are ATA5 or higher */
581         if (id->hw_config == 0 && (id->major_rev_num & 0x7FE0))
582                 return 1;
583
584         /*
585          * FIXME:
586          * - change master/slave IDENTIFY order
587          * - force bit13 (80c cable present) check
588          *   (unless the slave device is pre-ATA3)
589          */
590 #ifndef CONFIG_IDEDMA_IVB
591         if (id->hw_config & 0x4000)
592 #else
593         if (id->hw_config & 0x6000)
594 #endif
595                 return 1;
596
597 no_80w:
598         if (drive->udma33_warned == 1)
599                 return 0;
600
601         printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, "
602                             "limiting max speed to UDMA33\n",
603                             drive->name, hwif->udma_four ? "drive" : "host");
604
605         drive->udma33_warned = 1;
606
607         return 0;
608 }
609
610 int ide_ata66_check (ide_drive_t *drive, ide_task_t *args)
611 {
612         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
613             (args->tfRegister[IDE_SECTOR_OFFSET] > XFER_UDMA_2) &&
614             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER)) {
615                 if (eighty_ninty_three(drive) == 0) {
616                         printk(KERN_WARNING "%s: UDMA speeds >UDMA33 cannot "
617                                             "be set\n", drive->name);
618                         return 1;
619                 }
620         }
621
622         return 0;
623 }
624
625 /*
626  * Backside of HDIO_DRIVE_CMD call of SETFEATURES_XFER.
627  * 1 : Safe to update drive->id DMA registers.
628  * 0 : OOPs not allowed.
629  */
630 int set_transfer (ide_drive_t *drive, ide_task_t *args)
631 {
632         if ((args->tfRegister[IDE_COMMAND_OFFSET] == WIN_SETFEATURES) &&
633             (args->tfRegister[IDE_SECTOR_OFFSET] >= XFER_SW_DMA_0) &&
634             (args->tfRegister[IDE_FEATURE_OFFSET] == SETFEATURES_XFER) &&
635             (drive->id->dma_ultra ||
636              drive->id->dma_mword ||
637              drive->id->dma_1word))
638                 return 1;
639
640         return 0;
641 }
642
643 #ifdef CONFIG_BLK_DEV_IDEDMA
644 static u8 ide_auto_reduce_xfer (ide_drive_t *drive)
645 {
646         if (!drive->crc_count)
647                 return drive->current_speed;
648         drive->crc_count = 0;
649
650         switch(drive->current_speed) {
651                 case XFER_UDMA_7:       return XFER_UDMA_6;
652                 case XFER_UDMA_6:       return XFER_UDMA_5;
653                 case XFER_UDMA_5:       return XFER_UDMA_4;
654                 case XFER_UDMA_4:       return XFER_UDMA_3;
655                 case XFER_UDMA_3:       return XFER_UDMA_2;
656                 case XFER_UDMA_2:       return XFER_UDMA_1;
657                 case XFER_UDMA_1:       return XFER_UDMA_0;
658                         /*
659                          * OOPS we do not goto non Ultra DMA modes
660                          * without iCRC's available we force
661                          * the system to PIO and make the user
662                          * invoke the ATA-1 ATA-2 DMA modes.
663                          */
664                 case XFER_UDMA_0:
665                 default:                return XFER_PIO_4;
666         }
667 }
668 #endif /* CONFIG_BLK_DEV_IDEDMA */
669
670 /*
671  * Update the 
672  */
673 int ide_driveid_update (ide_drive_t *drive)
674 {
675         ide_hwif_t *hwif        = HWIF(drive);
676         struct hd_driveid *id;
677 #if 0
678         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
679         if (!id)
680                 return 0;
681
682         taskfile_lib_get_identify(drive, (char *)&id);
683
684         ide_fix_driveid(id);
685         if (id) {
686                 drive->id->dma_ultra = id->dma_ultra;
687                 drive->id->dma_mword = id->dma_mword;
688                 drive->id->dma_1word = id->dma_1word;
689                 /* anything more ? */
690                 kfree(id);
691         }
692         return 1;
693 #else
694         /*
695          * Re-read drive->id for possible DMA mode
696          * change (copied from ide-probe.c)
697          */
698         unsigned long timeout, flags;
699
700         SELECT_MASK(drive, 1);
701         if (IDE_CONTROL_REG)
702                 hwif->OUTB(drive->ctl,IDE_CONTROL_REG);
703         msleep(50);
704         hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG);
705         timeout = jiffies + WAIT_WORSTCASE;
706         do {
707                 if (time_after(jiffies, timeout)) {
708                         SELECT_MASK(drive, 0);
709                         return 0;       /* drive timed-out */
710                 }
711                 msleep(50);     /* give drive a breather */
712         } while (hwif->INB(IDE_ALTSTATUS_REG) & BUSY_STAT);
713         msleep(50);     /* wait for IRQ and DRQ_STAT */
714         if (!OK_STAT(hwif->INB(IDE_STATUS_REG),DRQ_STAT,BAD_R_STAT)) {
715                 SELECT_MASK(drive, 0);
716                 printk("%s: CHECK for good STATUS\n", drive->name);
717                 return 0;
718         }
719         local_irq_save(flags);
720         SELECT_MASK(drive, 0);
721         id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC);
722         if (!id) {
723                 local_irq_restore(flags);
724                 return 0;
725         }
726         ata_input_data(drive, id, SECTOR_WORDS);
727         (void) hwif->INB(IDE_STATUS_REG);       /* clear drive IRQ */
728         local_irq_enable();
729         local_irq_restore(flags);
730         ide_fix_driveid(id);
731         if (id) {
732                 drive->id->dma_ultra = id->dma_ultra;
733                 drive->id->dma_mword = id->dma_mword;
734                 drive->id->dma_1word = id->dma_1word;
735                 /* anything more ? */
736                 kfree(id);
737         }
738
739         return 1;
740 #endif
741 }
742
743 /*
744  * Similar to ide_wait_stat(), except it never calls ide_error internally.
745  * This is a kludge to handle the new ide_config_drive_speed() function,
746  * and should not otherwise be used anywhere.  Eventually, the tuneproc's
747  * should be updated to return ide_startstop_t, in which case we can get
748  * rid of this abomination again.  :)   -ml
749  *
750  * It is gone..........
751  *
752  * const char *msg == consider adding for verbose errors.
753  */
754 int ide_config_drive_speed (ide_drive_t *drive, u8 speed)
755 {
756         ide_hwif_t *hwif        = HWIF(drive);
757         int     i, error        = 1;
758         u8 stat;
759
760 //      while (HWGROUP(drive)->busy)
761 //              msleep(50);
762
763 #ifdef CONFIG_BLK_DEV_IDEDMA
764         if (hwif->ide_dma_check)         /* check if host supports DMA */
765                 hwif->dma_host_off(drive);
766 #endif
767
768         /*
769          * Don't use ide_wait_cmd here - it will
770          * attempt to set_geometry and recalibrate,
771          * but for some reason these don't work at
772          * this point (lost interrupt).
773          */
774         /*
775          * Select the drive, and issue the SETFEATURES command
776          */
777         disable_irq_nosync(hwif->irq);
778         
779         /*
780          *      FIXME: we race against the running IRQ here if
781          *      this is called from non IRQ context. If we use
782          *      disable_irq() we hang on the error path. Work
783          *      is needed.
784          */
785          
786         udelay(1);
787         SELECT_DRIVE(drive);
788         SELECT_MASK(drive, 0);
789         udelay(1);
790         if (IDE_CONTROL_REG)
791                 hwif->OUTB(drive->ctl | 2, IDE_CONTROL_REG);
792         hwif->OUTB(speed, IDE_NSECTOR_REG);
793         hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG);
794         hwif->OUTB(WIN_SETFEATURES, IDE_COMMAND_REG);
795         if ((IDE_CONTROL_REG) && (drive->quirk_list == 2))
796                 hwif->OUTB(drive->ctl, IDE_CONTROL_REG);
797         udelay(1);
798         /*
799          * Wait for drive to become non-BUSY
800          */
801         if ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
802                 unsigned long flags, timeout;
803                 local_irq_set(flags);
804                 timeout = jiffies + WAIT_CMD;
805                 while ((stat = hwif->INB(IDE_STATUS_REG)) & BUSY_STAT) {
806                         if (time_after(jiffies, timeout))
807                                 break;
808                 }
809                 local_irq_restore(flags);
810         }
811
812         /*
813          * Allow status to settle, then read it again.
814          * A few rare drives vastly violate the 400ns spec here,
815          * so we'll wait up to 10usec for a "good" status
816          * rather than expensively fail things immediately.
817          * This fix courtesy of Matthew Faupel & Niccolo Rigacci.
818          */
819         for (i = 0; i < 10; i++) {
820                 udelay(1);
821                 if (OK_STAT((stat = hwif->INB(IDE_STATUS_REG)), DRIVE_READY, BUSY_STAT|DRQ_STAT|ERR_STAT)) {
822                         error = 0;
823                         break;
824                 }
825         }
826
827         SELECT_MASK(drive, 0);
828
829         enable_irq(hwif->irq);
830
831         if (error) {
832                 (void) ide_dump_status(drive, "set_drive_speed_status", stat);
833                 return error;
834         }
835
836         drive->id->dma_ultra &= ~0xFF00;
837         drive->id->dma_mword &= ~0x0F00;
838         drive->id->dma_1word &= ~0x0F00;
839
840 #ifdef CONFIG_BLK_DEV_IDEDMA
841         if (speed >= XFER_SW_DMA_0)
842                 hwif->dma_host_on(drive);
843         else if (hwif->ide_dma_check)   /* check if host supports DMA */
844                 hwif->dma_off_quietly(drive);
845 #endif
846
847         switch(speed) {
848                 case XFER_UDMA_7:   drive->id->dma_ultra |= 0x8080; break;
849                 case XFER_UDMA_6:   drive->id->dma_ultra |= 0x4040; break;
850                 case XFER_UDMA_5:   drive->id->dma_ultra |= 0x2020; break;
851                 case XFER_UDMA_4:   drive->id->dma_ultra |= 0x1010; break;
852                 case XFER_UDMA_3:   drive->id->dma_ultra |= 0x0808; break;
853                 case XFER_UDMA_2:   drive->id->dma_ultra |= 0x0404; break;
854                 case XFER_UDMA_1:   drive->id->dma_ultra |= 0x0202; break;
855                 case XFER_UDMA_0:   drive->id->dma_ultra |= 0x0101; break;
856                 case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break;
857                 case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break;
858                 case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break;
859                 case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break;
860                 case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break;
861                 case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break;
862                 default: break;
863         }
864         if (!drive->init_speed)
865                 drive->init_speed = speed;
866         drive->current_speed = speed;
867         return error;
868 }
869
870 EXPORT_SYMBOL(ide_config_drive_speed);
871
872
873 /*
874  * This should get invoked any time we exit the driver to
875  * wait for an interrupt response from a drive.  handler() points
876  * at the appropriate code to handle the next interrupt, and a
877  * timer is started to prevent us from waiting forever in case
878  * something goes wrong (see the ide_timer_expiry() handler later on).
879  *
880  * See also ide_execute_command
881  */
882 static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
883                       unsigned int timeout, ide_expiry_t *expiry)
884 {
885         ide_hwgroup_t *hwgroup = HWGROUP(drive);
886
887         if (hwgroup->handler != NULL) {
888                 printk(KERN_CRIT "%s: ide_set_handler: handler not null; "
889                         "old=%p, new=%p\n",
890                         drive->name, hwgroup->handler, handler);
891         }
892         hwgroup->handler        = handler;
893         hwgroup->expiry         = expiry;
894         hwgroup->timer.expires  = jiffies + timeout;
895         hwgroup->req_gen_timer = hwgroup->req_gen;
896         add_timer(&hwgroup->timer);
897 }
898
899 void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler,
900                       unsigned int timeout, ide_expiry_t *expiry)
901 {
902         unsigned long flags;
903         spin_lock_irqsave(&ide_lock, flags);
904         __ide_set_handler(drive, handler, timeout, expiry);
905         spin_unlock_irqrestore(&ide_lock, flags);
906 }
907
908 EXPORT_SYMBOL(ide_set_handler);
909  
910 /**
911  *      ide_execute_command     -       execute an IDE command
912  *      @drive: IDE drive to issue the command against
913  *      @command: command byte to write
914  *      @handler: handler for next phase
915  *      @timeout: timeout for command
916  *      @expiry:  handler to run on timeout
917  *
918  *      Helper function to issue an IDE command. This handles the
919  *      atomicity requirements, command timing and ensures that the 
920  *      handler and IRQ setup do not race. All IDE command kick off
921  *      should go via this function or do equivalent locking.
922  */
923  
924 void ide_execute_command(ide_drive_t *drive, task_ioreg_t cmd, ide_handler_t *handler, unsigned timeout, ide_expiry_t *expiry)
925 {
926         unsigned long flags;
927         ide_hwgroup_t *hwgroup = HWGROUP(drive);
928         ide_hwif_t *hwif = HWIF(drive);
929         
930         spin_lock_irqsave(&ide_lock, flags);
931         
932         BUG_ON(hwgroup->handler);
933         hwgroup->handler        = handler;
934         hwgroup->expiry         = expiry;
935         hwgroup->timer.expires  = jiffies + timeout;
936         hwgroup->req_gen_timer = hwgroup->req_gen;
937         add_timer(&hwgroup->timer);
938         hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG);
939         /* Drive takes 400nS to respond, we must avoid the IRQ being
940            serviced before that. 
941            
942            FIXME: we could skip this delay with care on non shared
943            devices 
944         */
945         ndelay(400);
946         spin_unlock_irqrestore(&ide_lock, flags);
947 }
948
949 EXPORT_SYMBOL(ide_execute_command);
950
951
952 /* needed below */
953 static ide_startstop_t do_reset1 (ide_drive_t *, int);
954
955 /*
956  * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms
957  * during an atapi drive reset operation. If the drive has not yet responded,
958  * and we have not yet hit our maximum waiting time, then the timer is restarted
959  * for another 50ms.
960  */
961 static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive)
962 {
963         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
964         ide_hwif_t *hwif        = HWIF(drive);
965         u8 stat;
966
967         SELECT_DRIVE(drive);
968         udelay (10);
969
970         if (OK_STAT(stat = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
971                 printk("%s: ATAPI reset complete\n", drive->name);
972         } else {
973                 if (time_before(jiffies, hwgroup->poll_timeout)) {
974                         BUG_ON(HWGROUP(drive)->handler != NULL);
975                         ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
976                         /* continue polling */
977                         return ide_started;
978                 }
979                 /* end of polling */
980                 hwgroup->polling = 0;
981                 printk("%s: ATAPI reset timed-out, status=0x%02x\n",
982                                 drive->name, stat);
983                 /* do it the old fashioned way */
984                 return do_reset1(drive, 1);
985         }
986         /* done polling */
987         hwgroup->polling = 0;
988         hwgroup->resetting = 0;
989         return ide_stopped;
990 }
991
992 /*
993  * reset_pollfunc() gets invoked to poll the interface for completion every 50ms
994  * during an ide reset operation. If the drives have not yet responded,
995  * and we have not yet hit our maximum waiting time, then the timer is restarted
996  * for another 50ms.
997  */
998 static ide_startstop_t reset_pollfunc (ide_drive_t *drive)
999 {
1000         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
1001         ide_hwif_t *hwif        = HWIF(drive);
1002         u8 tmp;
1003
1004         if (hwif->reset_poll != NULL) {
1005                 if (hwif->reset_poll(drive)) {
1006                         printk(KERN_ERR "%s: host reset_poll failure for %s.\n",
1007                                 hwif->name, drive->name);
1008                         return ide_stopped;
1009                 }
1010         }
1011
1012         if (!OK_STAT(tmp = hwif->INB(IDE_STATUS_REG), 0, BUSY_STAT)) {
1013                 if (time_before(jiffies, hwgroup->poll_timeout)) {
1014                         BUG_ON(HWGROUP(drive)->handler != NULL);
1015                         ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1016                         /* continue polling */
1017                         return ide_started;
1018                 }
1019                 printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp);
1020                 drive->failures++;
1021         } else  {
1022                 printk("%s: reset: ", hwif->name);
1023                 if ((tmp = hwif->INB(IDE_ERROR_REG)) == 1) {
1024                         printk("success\n");
1025                         drive->failures = 0;
1026                 } else {
1027                         drive->failures++;
1028                         printk("master: ");
1029                         switch (tmp & 0x7f) {
1030                                 case 1: printk("passed");
1031                                         break;
1032                                 case 2: printk("formatter device error");
1033                                         break;
1034                                 case 3: printk("sector buffer error");
1035                                         break;
1036                                 case 4: printk("ECC circuitry error");
1037                                         break;
1038                                 case 5: printk("controlling MPU error");
1039                                         break;
1040                                 default:printk("error (0x%02x?)", tmp);
1041                         }
1042                         if (tmp & 0x80)
1043                                 printk("; slave: failed");
1044                         printk("\n");
1045                 }
1046         }
1047         hwgroup->polling = 0;   /* done polling */
1048         hwgroup->resetting = 0; /* done reset attempt */
1049         return ide_stopped;
1050 }
1051
1052 static void check_dma_crc(ide_drive_t *drive)
1053 {
1054 #ifdef CONFIG_BLK_DEV_IDEDMA
1055         if (drive->crc_count) {
1056                 drive->hwif->dma_off_quietly(drive);
1057                 ide_set_xfer_rate(drive, ide_auto_reduce_xfer(drive));
1058                 if (drive->current_speed >= XFER_SW_DMA_0)
1059                         (void) HWIF(drive)->ide_dma_on(drive);
1060         } else
1061                 ide_dma_off(drive);
1062 #endif
1063 }
1064
1065 static void ide_disk_pre_reset(ide_drive_t *drive)
1066 {
1067         int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1;
1068
1069         drive->special.all = 0;
1070         drive->special.b.set_geometry = legacy;
1071         drive->special.b.recalibrate  = legacy;
1072         if (OK_TO_RESET_CONTROLLER)
1073                 drive->mult_count = 0;
1074         if (!drive->keep_settings && !drive->using_dma)
1075                 drive->mult_req = 0;
1076         if (drive->mult_req != drive->mult_count)
1077                 drive->special.b.set_multmode = 1;
1078 }
1079
1080 static void pre_reset(ide_drive_t *drive)
1081 {
1082         if (drive->media == ide_disk)
1083                 ide_disk_pre_reset(drive);
1084         else
1085                 drive->post_reset = 1;
1086
1087         if (!drive->keep_settings) {
1088                 if (drive->using_dma) {
1089                         check_dma_crc(drive);
1090                 } else {
1091                         drive->unmask = 0;
1092                         drive->io_32bit = 0;
1093                 }
1094                 return;
1095         }
1096         if (drive->using_dma)
1097                 check_dma_crc(drive);
1098
1099         if (HWIF(drive)->pre_reset != NULL)
1100                 HWIF(drive)->pre_reset(drive);
1101
1102         if (drive->current_speed != 0xff)
1103                 drive->desired_speed = drive->current_speed;
1104         drive->current_speed = 0xff;
1105 }
1106
1107 /*
1108  * do_reset1() attempts to recover a confused drive by resetting it.
1109  * Unfortunately, resetting a disk drive actually resets all devices on
1110  * the same interface, so it can really be thought of as resetting the
1111  * interface rather than resetting the drive.
1112  *
1113  * ATAPI devices have their own reset mechanism which allows them to be
1114  * individually reset without clobbering other devices on the same interface.
1115  *
1116  * Unfortunately, the IDE interface does not generate an interrupt to let
1117  * us know when the reset operation has finished, so we must poll for this.
1118  * Equally poor, though, is the fact that this may a very long time to complete,
1119  * (up to 30 seconds worstcase).  So, instead of busy-waiting here for it,
1120  * we set a timer to poll at 50ms intervals.
1121  */
1122 static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi)
1123 {
1124         unsigned int unit;
1125         unsigned long flags;
1126         ide_hwif_t *hwif;
1127         ide_hwgroup_t *hwgroup;
1128         
1129         spin_lock_irqsave(&ide_lock, flags);
1130         hwif = HWIF(drive);
1131         hwgroup = HWGROUP(drive);
1132
1133         /* We must not reset with running handlers */
1134         BUG_ON(hwgroup->handler != NULL);
1135
1136         /* For an ATAPI device, first try an ATAPI SRST. */
1137         if (drive->media != ide_disk && !do_not_try_atapi) {
1138                 hwgroup->resetting = 1;
1139                 pre_reset(drive);
1140                 SELECT_DRIVE(drive);
1141                 udelay (20);
1142                 hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG);
1143                 ndelay(400);
1144                 hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1145                 hwgroup->polling = 1;
1146                 __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL);
1147                 spin_unlock_irqrestore(&ide_lock, flags);
1148                 return ide_started;
1149         }
1150
1151         /*
1152          * First, reset any device state data we were maintaining
1153          * for any of the drives on this interface.
1154          */
1155         for (unit = 0; unit < MAX_DRIVES; ++unit)
1156                 pre_reset(&hwif->drives[unit]);
1157
1158 #if OK_TO_RESET_CONTROLLER
1159         if (!IDE_CONTROL_REG) {
1160                 spin_unlock_irqrestore(&ide_lock, flags);
1161                 return ide_stopped;
1162         }
1163
1164         hwgroup->resetting = 1;
1165         /*
1166          * Note that we also set nIEN while resetting the device,
1167          * to mask unwanted interrupts from the interface during the reset.
1168          * However, due to the design of PC hardware, this will cause an
1169          * immediate interrupt due to the edge transition it produces.
1170          * This single interrupt gives us a "fast poll" for drives that
1171          * recover from reset very quickly, saving us the first 50ms wait time.
1172          */
1173         /* set SRST and nIEN */
1174         hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG);
1175         /* more than enough time */
1176         udelay(10);
1177         if (drive->quirk_list == 2) {
1178                 /* clear SRST and nIEN */
1179                 hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG);
1180         } else {
1181                 /* clear SRST, leave nIEN */
1182                 hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG);
1183         }
1184         /* more than enough time */
1185         udelay(10);
1186         hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE;
1187         hwgroup->polling = 1;
1188         __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL);
1189
1190         /*
1191          * Some weird controller like resetting themselves to a strange
1192          * state when the disks are reset this way. At least, the Winbond
1193          * 553 documentation says that
1194          */
1195         if (hwif->resetproc != NULL) {
1196                 hwif->resetproc(drive);
1197         }
1198         
1199 #endif  /* OK_TO_RESET_CONTROLLER */
1200
1201         spin_unlock_irqrestore(&ide_lock, flags);
1202         return ide_started;
1203 }
1204
1205 /*
1206  * ide_do_reset() is the entry point to the drive/interface reset code.
1207  */
1208
1209 ide_startstop_t ide_do_reset (ide_drive_t *drive)
1210 {
1211         return do_reset1(drive, 0);
1212 }
1213
1214 EXPORT_SYMBOL(ide_do_reset);
1215
1216 /*
1217  * ide_wait_not_busy() waits for the currently selected device on the hwif
1218  * to report a non-busy status, see comments in probe_hwif().
1219  */
1220 int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout)
1221 {
1222         u8 stat = 0;
1223
1224         while(timeout--) {
1225                 /*
1226                  * Turn this into a schedule() sleep once I'm sure
1227                  * about locking issues (2.5 work ?).
1228                  */
1229                 mdelay(1);
1230                 stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]);
1231                 if ((stat & BUSY_STAT) == 0)
1232                         return 0;
1233                 /*
1234                  * Assume a value of 0xff means nothing is connected to
1235                  * the interface and it doesn't implement the pull-down
1236                  * resistor on D7.
1237                  */
1238                 if (stat == 0xff)
1239                         return -ENODEV;
1240                 touch_softlockup_watchdog();
1241                 touch_nmi_watchdog();
1242         }
1243         return -EBUSY;
1244 }
1245
1246 EXPORT_SYMBOL_GPL(ide_wait_not_busy);
1247