git.oblomov.eu Git - linux-2.6/blob - arch/arm/mach-at91/at91sam9263_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9263_devices.c
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/i2c-gpio.h>
  18
  19 #include <linux/fb.h>
  20 #include <video/atmel_lcdc.h>
  21
  22 #include <mach/board.h>
  23 #include <mach/gpio.h>
  24 #include <mach/at91sam9263.h>
  25 #include <mach/at91sam9263_matrix.h>
  26 #include <mach/at91sam9_smc.h>
  27
  28 #include "generic.h"
  29
  30
  31 /* --------------------------------------------------------------------
  32  *  USB Host
  33  * -------------------------------------------------------------------- */
  34
  35 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  36 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  37 static struct at91_usbh_data usbh_data;
  38
  39 static struct resource usbh_resources[] = {
  40         [0] = {
  41                 .start  = AT91SAM9263_UHP_BASE,
  42                 .end    = AT91SAM9263_UHP_BASE + SZ_1M - 1,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = {
  46                 .start  = AT91SAM9263_ID_UHP,
  47                 .end    = AT91SAM9263_ID_UHP,
  48                 .flags  = IORESOURCE_IRQ,
  49         },
  50 };
  51
  52 static struct platform_device at91_usbh_device = {
  53         .name           = "at91_ohci",
  54         .id             = -1,
  55         .dev            = {
  56                                 .dma_mask               = &ohci_dmamask,
  57                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  58                                 .platform_data          = &usbh_data,
  59         },
  60         .resource       = usbh_resources,
  61         .num_resources  = ARRAY_SIZE(usbh_resources),
  62 };
  63
  64 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  65 {
  66         int i;
  67
  68         if (!data)
  69                 return;
  70
  71         /* Enable VBus control for UHP ports */
  72         for (i = 0; i < data->ports; i++) {
  73                 if (data->vbus_pin[i])
  74                         at91_set_gpio_output(data->vbus_pin[i], 0);
  75         }
  76
  77         usbh_data = *data;
  78         platform_device_register(&at91_usbh_device);
  79 }
  80 #else
  81 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  82 #endif
  83
  84
  85 /* --------------------------------------------------------------------
  86  *  USB Device (Gadget)
  87  * -------------------------------------------------------------------- */
  88
  89 #ifdef CONFIG_USB_GADGET_AT91
  90 static struct at91_udc_data udc_data;
  91
  92 static struct resource udc_resources[] = {
  93         [0] = {
  94                 .start  = AT91SAM9263_BASE_UDP,
  95                 .end    = AT91SAM9263_BASE_UDP + SZ_16K - 1,
  96                 .flags  = IORESOURCE_MEM,
  97         },
  98         [1] = {
  99                 .start  = AT91SAM9263_ID_UDP,
 100                 .end    = AT91SAM9263_ID_UDP,
 101                 .flags  = IORESOURCE_IRQ,
 102         },
 103 };
 104
 105 static struct platform_device at91_udc_device = {
 106         .name           = "at91_udc",
 107         .id             = -1,
 108         .dev            = {
 109                                 .platform_data          = &udc_data,
 110         },
 111         .resource       = udc_resources,
 112         .num_resources  = ARRAY_SIZE(udc_resources),
 113 };
 114
 115 void __init at91_add_device_udc(struct at91_udc_data *data)
 116 {
 117         if (!data)
 118                 return;
 119
 120         if (data->vbus_pin) {
 121                 at91_set_gpio_input(data->vbus_pin, 0);
 122                 at91_set_deglitch(data->vbus_pin, 1);
 123         }
 124
 125         /* Pullup pin is handled internally by USB device peripheral */
 126
 127         udc_data = *data;
 128         platform_device_register(&at91_udc_device);
 129 }
 130 #else
 131 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 132 #endif
 133
 134
 135 /* --------------------------------------------------------------------
 136  *  Ethernet
 137  * -------------------------------------------------------------------- */
 138
 139 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 140 static u64 eth_dmamask = DMA_BIT_MASK(32);
 141 static struct at91_eth_data eth_data;
 142
 143 static struct resource eth_resources[] = {
 144         [0] = {
 145                 .start  = AT91SAM9263_BASE_EMAC,
 146                 .end    = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
 147                 .flags  = IORESOURCE_MEM,
 148         },
 149         [1] = {
 150                 .start  = AT91SAM9263_ID_EMAC,
 151                 .end    = AT91SAM9263_ID_EMAC,
 152                 .flags  = IORESOURCE_IRQ,
 153         },
 154 };
 155
 156 static struct platform_device at91sam9263_eth_device = {
 157         .name           = "macb",
 158         .id             = -1,
 159         .dev            = {
 160                                 .dma_mask               = &eth_dmamask,
 161                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 162                                 .platform_data          = &eth_data,
 163         },
 164         .resource       = eth_resources,
 165         .num_resources  = ARRAY_SIZE(eth_resources),
 166 };
 167
 168 void __init at91_add_device_eth(struct at91_eth_data *data)
 169 {
 170         if (!data)
 171                 return;
 172
 173         if (data->phy_irq_pin) {
 174                 at91_set_gpio_input(data->phy_irq_pin, 0);
 175                 at91_set_deglitch(data->phy_irq_pin, 1);
 176         }
 177
 178         /* Pins used for MII and RMII */
 179         at91_set_A_periph(AT91_PIN_PE21, 0);    /* ETXCK_EREFCK */
 180         at91_set_B_periph(AT91_PIN_PC25, 0);    /* ERXDV */
 181         at91_set_A_periph(AT91_PIN_PE25, 0);    /* ERX0 */
 182         at91_set_A_periph(AT91_PIN_PE26, 0);    /* ERX1 */
 183         at91_set_A_periph(AT91_PIN_PE27, 0);    /* ERXER */
 184         at91_set_A_periph(AT91_PIN_PE28, 0);    /* ETXEN */
 185         at91_set_A_periph(AT91_PIN_PE23, 0);    /* ETX0 */
 186         at91_set_A_periph(AT91_PIN_PE24, 0);    /* ETX1 */
 187         at91_set_A_periph(AT91_PIN_PE30, 0);    /* EMDIO */
 188         at91_set_A_periph(AT91_PIN_PE29, 0);    /* EMDC */
 189
 190         if (!data->is_rmii) {
 191                 at91_set_A_periph(AT91_PIN_PE22, 0);    /* ECRS */
 192                 at91_set_B_periph(AT91_PIN_PC26, 0);    /* ECOL */
 193                 at91_set_B_periph(AT91_PIN_PC22, 0);    /* ERX2 */
 194                 at91_set_B_periph(AT91_PIN_PC23, 0);    /* ERX3 */
 195                 at91_set_B_periph(AT91_PIN_PC27, 0);    /* ERXCK */
 196                 at91_set_B_periph(AT91_PIN_PC20, 0);    /* ETX2 */
 197                 at91_set_B_periph(AT91_PIN_PC21, 0);    /* ETX3 */
 198                 at91_set_B_periph(AT91_PIN_PC24, 0);    /* ETXER */
 199         }
 200
 201         eth_data = *data;
 202         platform_device_register(&at91sam9263_eth_device);
 203 }
 204 #else
 205 void __init at91_add_device_eth(struct at91_eth_data *data) {}
 206 #endif
 207
 208
 209 /* --------------------------------------------------------------------
 210  *  MMC / SD
 211  * -------------------------------------------------------------------- */
 212
 213 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 214 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 215 static struct at91_mmc_data mmc0_data, mmc1_data;
 216
 217 static struct resource mmc0_resources[] = {
 218         [0] = {
 219                 .start  = AT91SAM9263_BASE_MCI0,
 220                 .end    = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
 221                 .flags  = IORESOURCE_MEM,
 222         },
 223         [1] = {
 224                 .start  = AT91SAM9263_ID_MCI0,
 225                 .end    = AT91SAM9263_ID_MCI0,
 226                 .flags  = IORESOURCE_IRQ,
 227         },
 228 };
 229
 230 static struct platform_device at91sam9263_mmc0_device = {
 231         .name           = "at91_mci",
 232         .id             = 0,
 233         .dev            = {
 234                                 .dma_mask               = &mmc_dmamask,
 235                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 236                                 .platform_data          = &mmc0_data,
 237         },
 238         .resource       = mmc0_resources,
 239         .num_resources  = ARRAY_SIZE(mmc0_resources),
 240 };
 241
 242 static struct resource mmc1_resources[] = {
 243         [0] = {
 244                 .start  = AT91SAM9263_BASE_MCI1,
 245                 .end    = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
 246                 .flags  = IORESOURCE_MEM,
 247         },
 248         [1] = {
 249                 .start  = AT91SAM9263_ID_MCI1,
 250                 .end    = AT91SAM9263_ID_MCI1,
 251                 .flags  = IORESOURCE_IRQ,
 252         },
 253 };
 254
 255 static struct platform_device at91sam9263_mmc1_device = {
 256         .name           = "at91_mci",
 257         .id             = 1,
 258         .dev            = {
 259                                 .dma_mask               = &mmc_dmamask,
 260                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 261                                 .platform_data          = &mmc1_data,
 262         },
 263         .resource       = mmc1_resources,
 264         .num_resources  = ARRAY_SIZE(mmc1_resources),
 265 };
 266
 267 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 268 {
 269         if (!data)
 270                 return;
 271
 272         /* input/irq */
 273         if (data->det_pin) {
 274                 at91_set_gpio_input(data->det_pin, 1);
 275                 at91_set_deglitch(data->det_pin, 1);
 276         }
 277         if (data->wp_pin)
 278                 at91_set_gpio_input(data->wp_pin, 1);
 279         if (data->vcc_pin)
 280                 at91_set_gpio_output(data->vcc_pin, 0);
 281
 282         if (mmc_id == 0) {              /* MCI0 */
 283                 /* CLK */
 284                 at91_set_A_periph(AT91_PIN_PA12, 0);
 285
 286                 if (data->slot_b) {
 287                         /* CMD */
 288                         at91_set_A_periph(AT91_PIN_PA16, 1);
 289
 290                         /* DAT0, maybe DAT1..DAT3 */
 291                         at91_set_A_periph(AT91_PIN_PA17, 1);
 292                         if (data->wire4) {
 293                                 at91_set_A_periph(AT91_PIN_PA18, 1);
 294                                 at91_set_A_periph(AT91_PIN_PA19, 1);
 295                                 at91_set_A_periph(AT91_PIN_PA20, 1);
 296                         }
 297                 } else {
 298                         /* CMD */
 299                         at91_set_A_periph(AT91_PIN_PA1, 1);
 300
 301                         /* DAT0, maybe DAT1..DAT3 */
 302                         at91_set_A_periph(AT91_PIN_PA0, 1);
 303                         if (data->wire4) {
 304                                 at91_set_A_periph(AT91_PIN_PA3, 1);
 305                                 at91_set_A_periph(AT91_PIN_PA4, 1);
 306                                 at91_set_A_periph(AT91_PIN_PA5, 1);
 307                         }
 308                 }
 309
 310                 mmc0_data = *data;
 311                 at91_clock_associate("mci0_clk", &at91sam9263_mmc0_device.dev, "mci_clk");
 312                 platform_device_register(&at91sam9263_mmc0_device);
 313         } else {                        /* MCI1 */
 314                 /* CLK */
 315                 at91_set_A_periph(AT91_PIN_PA6, 0);
 316
 317                 if (data->slot_b) {
 318                         /* CMD */
 319                         at91_set_A_periph(AT91_PIN_PA21, 1);
 320
 321                         /* DAT0, maybe DAT1..DAT3 */
 322                         at91_set_A_periph(AT91_PIN_PA22, 1);
 323                         if (data->wire4) {
 324                                 at91_set_A_periph(AT91_PIN_PA23, 1);
 325                                 at91_set_A_periph(AT91_PIN_PA24, 1);
 326                                 at91_set_A_periph(AT91_PIN_PA25, 1);
 327                         }
 328                 } else {
 329                         /* CMD */
 330                         at91_set_A_periph(AT91_PIN_PA7, 1);
 331
 332                         /* DAT0, maybe DAT1..DAT3 */
 333                         at91_set_A_periph(AT91_PIN_PA8, 1);
 334                         if (data->wire4) {
 335                                 at91_set_A_periph(AT91_PIN_PA9, 1);
 336                                 at91_set_A_periph(AT91_PIN_PA10, 1);
 337                                 at91_set_A_periph(AT91_PIN_PA11, 1);
 338                         }
 339                 }
 340
 341                 mmc1_data = *data;
 342                 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
 343                 platform_device_register(&at91sam9263_mmc1_device);
 344         }
 345 }
 346 #else
 347 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 348 #endif
 349
 350
 351 /* --------------------------------------------------------------------
 352  *  NAND / SmartMedia
 353  * -------------------------------------------------------------------- */
 354
 355 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 356 static struct atmel_nand_data nand_data;
 357
 358 #define NAND_BASE       AT91_CHIPSELECT_3
 359
 360 static struct resource nand_resources[] = {
 361         [0] = {
 362                 .start  = NAND_BASE,
 363                 .end    = NAND_BASE + SZ_256M - 1,
 364                 .flags  = IORESOURCE_MEM,
 365         },
 366         [1] = {
 367                 .start  = AT91_BASE_SYS + AT91_ECC0,
 368                 .end    = AT91_BASE_SYS + AT91_ECC0 + SZ_512 - 1,
 369                 .flags  = IORESOURCE_MEM,
 370         }
 371 };
 372
 373 static struct platform_device at91sam9263_nand_device = {
 374         .name           = "atmel_nand",
 375         .id             = -1,
 376         .dev            = {
 377                                 .platform_data  = &nand_data,
 378         },
 379         .resource       = nand_resources,
 380         .num_resources  = ARRAY_SIZE(nand_resources),
 381 };
 382
 383 void __init at91_add_device_nand(struct atmel_nand_data *data)
 384 {
 385         unsigned long csa;
 386
 387         if (!data)
 388                 return;
 389
 390         csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
 391         at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
 392
 393         /* enable pin */
 394         if (data->enable_pin)
 395                 at91_set_gpio_output(data->enable_pin, 1);
 396
 397         /* ready/busy pin */
 398         if (data->rdy_pin)
 399                 at91_set_gpio_input(data->rdy_pin, 1);
 400
 401         /* card detect pin */
 402         if (data->det_pin)
 403                 at91_set_gpio_input(data->det_pin, 1);
 404
 405         nand_data = *data;
 406         platform_device_register(&at91sam9263_nand_device);
 407 }
 408 #else
 409 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 410 #endif
 411
 412
 413 /* --------------------------------------------------------------------
 414  *  TWI (i2c)
 415  * -------------------------------------------------------------------- */
 416
 417 /*
 418  * Prefer the GPIO code since the TWI controller isn't robust
 419  * (gets overruns and underruns under load) and can only issue
 420  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 421  */
 422 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 423
 424 static struct i2c_gpio_platform_data pdata = {
 425         .sda_pin                = AT91_PIN_PB4,
 426         .sda_is_open_drain      = 1,
 427         .scl_pin                = AT91_PIN_PB5,
 428         .scl_is_open_drain      = 1,
 429         .udelay                 = 2,            /* ~100 kHz */
 430 };
 431
 432 static struct platform_device at91sam9263_twi_device = {
 433         .name                   = "i2c-gpio",
 434         .id                     = -1,
 435         .dev.platform_data      = &pdata,
 436 };
 437
 438 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 439 {
 440         at91_set_GPIO_periph(AT91_PIN_PB4, 1);          /* TWD (SDA) */
 441         at91_set_multi_drive(AT91_PIN_PB4, 1);
 442
 443         at91_set_GPIO_periph(AT91_PIN_PB5, 1);          /* TWCK (SCL) */
 444         at91_set_multi_drive(AT91_PIN_PB5, 1);
 445
 446         i2c_register_board_info(0, devices, nr_devices);
 447         platform_device_register(&at91sam9263_twi_device);
 448 }
 449
 450 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 451
 452 static struct resource twi_resources[] = {
 453         [0] = {
 454                 .start  = AT91SAM9263_BASE_TWI,
 455                 .end    = AT91SAM9263_BASE_TWI + SZ_16K - 1,
 456                 .flags  = IORESOURCE_MEM,
 457         },
 458         [1] = {
 459                 .start  = AT91SAM9263_ID_TWI,
 460                 .end    = AT91SAM9263_ID_TWI,
 461                 .flags  = IORESOURCE_IRQ,
 462         },
 463 };
 464
 465 static struct platform_device at91sam9263_twi_device = {
 466         .name           = "at91_i2c",
 467         .id             = -1,
 468         .resource       = twi_resources,
 469         .num_resources  = ARRAY_SIZE(twi_resources),
 470 };
 471
 472 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 473 {
 474         /* pins used for TWI interface */
 475         at91_set_A_periph(AT91_PIN_PB4, 0);             /* TWD */
 476         at91_set_multi_drive(AT91_PIN_PB4, 1);
 477
 478         at91_set_A_periph(AT91_PIN_PB5, 0);             /* TWCK */
 479         at91_set_multi_drive(AT91_PIN_PB5, 1);
 480
 481         i2c_register_board_info(0, devices, nr_devices);
 482         platform_device_register(&at91sam9263_twi_device);
 483 }
 484 #else
 485 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 486 #endif
 487
 488
 489 /* --------------------------------------------------------------------
 490  *  SPI
 491  * -------------------------------------------------------------------- */
 492
 493 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 494 static u64 spi_dmamask = DMA_BIT_MASK(32);
 495
 496 static struct resource spi0_resources[] = {
 497         [0] = {
 498                 .start  = AT91SAM9263_BASE_SPI0,
 499                 .end    = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
 500                 .flags  = IORESOURCE_MEM,
 501         },
 502         [1] = {
 503                 .start  = AT91SAM9263_ID_SPI0,
 504                 .end    = AT91SAM9263_ID_SPI0,
 505                 .flags  = IORESOURCE_IRQ,
 506         },
 507 };
 508
 509 static struct platform_device at91sam9263_spi0_device = {
 510         .name           = "atmel_spi",
 511         .id             = 0,
 512         .dev            = {
 513                                 .dma_mask               = &spi_dmamask,
 514                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 515         },
 516         .resource       = spi0_resources,
 517         .num_resources  = ARRAY_SIZE(spi0_resources),
 518 };
 519
 520 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
 521
 522 static struct resource spi1_resources[] = {
 523         [0] = {
 524                 .start  = AT91SAM9263_BASE_SPI1,
 525                 .end    = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
 526                 .flags  = IORESOURCE_MEM,
 527         },
 528         [1] = {
 529                 .start  = AT91SAM9263_ID_SPI1,
 530                 .end    = AT91SAM9263_ID_SPI1,
 531                 .flags  = IORESOURCE_IRQ,
 532         },
 533 };
 534
 535 static struct platform_device at91sam9263_spi1_device = {
 536         .name           = "atmel_spi",
 537         .id             = 1,
 538         .dev            = {
 539                                 .dma_mask               = &spi_dmamask,
 540                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 541         },
 542         .resource       = spi1_resources,
 543         .num_resources  = ARRAY_SIZE(spi1_resources),
 544 };
 545
 546 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
 547
 548 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 549 {
 550         int i;
 551         unsigned long cs_pin;
 552         short enable_spi0 = 0;
 553         short enable_spi1 = 0;
 554
 555         /* Choose SPI chip-selects */
 556         for (i = 0; i < nr_devices; i++) {
 557                 if (devices[i].controller_data)
 558                         cs_pin = (unsigned long) devices[i].controller_data;
 559                 else if (devices[i].bus_num == 0)
 560                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 561                 else
 562                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 563
 564                 if (devices[i].bus_num == 0)
 565                         enable_spi0 = 1;
 566                 else
 567                         enable_spi1 = 1;
 568
 569                 /* enable chip-select pin */
 570                 at91_set_gpio_output(cs_pin, 1);
 571
 572                 /* pass chip-select pin to driver */
 573                 devices[i].controller_data = (void *) cs_pin;
 574         }
 575
 576         spi_register_board_info(devices, nr_devices);
 577
 578         /* Configure SPI bus(es) */
 579         if (enable_spi0) {
 580                 at91_set_B_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 581                 at91_set_B_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 582                 at91_set_B_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 583
 584                 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
 585                 platform_device_register(&at91sam9263_spi0_device);
 586         }
 587         if (enable_spi1) {
 588                 at91_set_A_periph(AT91_PIN_PB12, 0);    /* SPI1_MISO */
 589                 at91_set_A_periph(AT91_PIN_PB13, 0);    /* SPI1_MOSI */
 590                 at91_set_A_periph(AT91_PIN_PB14, 0);    /* SPI1_SPCK */
 591
 592                 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
 593                 platform_device_register(&at91sam9263_spi1_device);
 594         }
 595 }
 596 #else
 597 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 598 #endif
 599
 600
 601 /* --------------------------------------------------------------------
 602  *  AC97
 603  * -------------------------------------------------------------------- */
 604
 605 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
 606 static u64 ac97_dmamask = DMA_BIT_MASK(32);
 607 static struct atmel_ac97_data ac97_data;
 608
 609 static struct resource ac97_resources[] = {
 610         [0] = {
 611                 .start  = AT91SAM9263_BASE_AC97C,
 612                 .end    = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
 613                 .flags  = IORESOURCE_MEM,
 614         },
 615         [1] = {
 616                 .start  = AT91SAM9263_ID_AC97C,
 617                 .end    = AT91SAM9263_ID_AC97C,
 618                 .flags  = IORESOURCE_IRQ,
 619         },
 620 };
 621
 622 static struct platform_device at91sam9263_ac97_device = {
 623         .name           = "ac97c",
 624         .id             = 1,
 625         .dev            = {
 626                                 .dma_mask               = &ac97_dmamask,
 627                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 628                                 .platform_data          = &ac97_data,
 629         },
 630         .resource       = ac97_resources,
 631         .num_resources  = ARRAY_SIZE(ac97_resources),
 632 };
 633
 634 void __init at91_add_device_ac97(struct atmel_ac97_data *data)
 635 {
 636         if (!data)
 637                 return;
 638
 639         at91_set_A_periph(AT91_PIN_PB0, 0);     /* AC97FS */
 640         at91_set_A_periph(AT91_PIN_PB1, 0);     /* AC97CK */
 641         at91_set_A_periph(AT91_PIN_PB2, 0);     /* AC97TX */
 642         at91_set_A_periph(AT91_PIN_PB3, 0);     /* AC97RX */
 643
 644         /* reset */
 645         if (data->reset_pin)
 646                 at91_set_gpio_output(data->reset_pin, 0);
 647
 648         ac97_data = *ek_data;
 649         platform_device_register(&at91sam9263_ac97_device);
 650 }
 651 #else
 652 void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
 653 #endif
 654
 655
 656 /* --------------------------------------------------------------------
 657  *  LCD Controller
 658  * -------------------------------------------------------------------- */
 659
 660 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 661 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 662 static struct atmel_lcdfb_info lcdc_data;
 663
 664 static struct resource lcdc_resources[] = {
 665         [0] = {
 666                 .start  = AT91SAM9263_LCDC_BASE,
 667                 .end    = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
 668                 .flags  = IORESOURCE_MEM,
 669         },
 670         [1] = {
 671                 .start  = AT91SAM9263_ID_LCDC,
 672                 .end    = AT91SAM9263_ID_LCDC,
 673                 .flags  = IORESOURCE_IRQ,
 674         },
 675 };
 676
 677 static struct platform_device at91_lcdc_device = {
 678         .name           = "atmel_lcdfb",
 679         .id             = 0,
 680         .dev            = {
 681                                 .dma_mask               = &lcdc_dmamask,
 682                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 683                                 .platform_data          = &lcdc_data,
 684         },
 685         .resource       = lcdc_resources,
 686         .num_resources  = ARRAY_SIZE(lcdc_resources),
 687 };
 688
 689 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 690 {
 691         if (!data)
 692                 return;
 693
 694         at91_set_A_periph(AT91_PIN_PC1, 0);     /* LCDHSYNC */
 695         at91_set_A_periph(AT91_PIN_PC2, 0);     /* LCDDOTCK */
 696         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDDEN */
 697         at91_set_B_periph(AT91_PIN_PB9, 0);     /* LCDCC */
 698         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDD2 */
 699         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDD3 */
 700         at91_set_A_periph(AT91_PIN_PC8, 0);     /* LCDD4 */
 701         at91_set_A_periph(AT91_PIN_PC9, 0);     /* LCDD5 */
 702         at91_set_A_periph(AT91_PIN_PC10, 0);    /* LCDD6 */
 703         at91_set_A_periph(AT91_PIN_PC11, 0);    /* LCDD7 */
 704         at91_set_A_periph(AT91_PIN_PC14, 0);    /* LCDD10 */
 705         at91_set_A_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 706         at91_set_A_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 707         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD13 */
 708         at91_set_A_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 709         at91_set_A_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 710         at91_set_A_periph(AT91_PIN_PC22, 0);    /* LCDD18 */
 711         at91_set_A_periph(AT91_PIN_PC23, 0);    /* LCDD19 */
 712         at91_set_A_periph(AT91_PIN_PC24, 0);    /* LCDD20 */
 713         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD21 */
 714         at91_set_A_periph(AT91_PIN_PC26, 0);    /* LCDD22 */
 715         at91_set_A_periph(AT91_PIN_PC27, 0);    /* LCDD23 */
 716
 717         lcdc_data = *data;
 718         platform_device_register(&at91_lcdc_device);
 719 }
 720 #else
 721 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 722 #endif
 723
 724
 725 /* --------------------------------------------------------------------
 726  *  Image Sensor Interface
 727  * -------------------------------------------------------------------- */
 728
 729 #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE)
 730
 731 struct resource isi_resources[] = {
 732         [0] = {
 733                 .start  = AT91SAM9263_BASE_ISI,
 734                 .end    = AT91SAM9263_BASE_ISI + SZ_16K - 1,
 735                 .flags  = IORESOURCE_MEM,
 736         },
 737         [1] = {
 738                 .start  = AT91SAM9263_ID_ISI,
 739                 .end    = AT91SAM9263_ID_ISI,
 740                 .flags  = IORESOURCE_IRQ,
 741         },
 742 };
 743
 744 static struct platform_device at91sam9263_isi_device = {
 745         .name           = "at91_isi",
 746         .id             = -1,
 747         .resource       = isi_resources,
 748         .num_resources  = ARRAY_SIZE(isi_resources),
 749 };
 750
 751 void __init at91_add_device_isi(void)
 752 {
 753         at91_set_A_periph(AT91_PIN_PE0, 0);     /* ISI_D0 */
 754         at91_set_A_periph(AT91_PIN_PE1, 0);     /* ISI_D1 */
 755         at91_set_A_periph(AT91_PIN_PE2, 0);     /* ISI_D2 */
 756         at91_set_A_periph(AT91_PIN_PE3, 0);     /* ISI_D3 */
 757         at91_set_A_periph(AT91_PIN_PE4, 0);     /* ISI_D4 */
 758         at91_set_A_periph(AT91_PIN_PE5, 0);     /* ISI_D5 */
 759         at91_set_A_periph(AT91_PIN_PE6, 0);     /* ISI_D6 */
 760         at91_set_A_periph(AT91_PIN_PE7, 0);     /* ISI_D7 */
 761         at91_set_A_periph(AT91_PIN_PE8, 0);     /* ISI_PCK */
 762         at91_set_A_periph(AT91_PIN_PE9, 0);     /* ISI_HSYNC */
 763         at91_set_A_periph(AT91_PIN_PE10, 0);    /* ISI_VSYNC */
 764         at91_set_B_periph(AT91_PIN_PE11, 0);    /* ISI_MCK (PCK3) */
 765         at91_set_B_periph(AT91_PIN_PE12, 0);    /* ISI_PD8 */
 766         at91_set_B_periph(AT91_PIN_PE13, 0);    /* ISI_PD9 */
 767         at91_set_B_periph(AT91_PIN_PE14, 0);    /* ISI_PD10 */
 768         at91_set_B_periph(AT91_PIN_PE15, 0);    /* ISI_PD11 */
 769 }
 770 #else
 771 void __init at91_add_device_isi(void) {}
 772 #endif
 773
 774
 775 /* --------------------------------------------------------------------
 776  *  Timer/Counter block
 777  * -------------------------------------------------------------------- */
 778
 779 #ifdef CONFIG_ATMEL_TCLIB
 780
 781 static struct resource tcb_resources[] = {
 782         [0] = {
 783                 .start  = AT91SAM9263_BASE_TCB0,
 784                 .end    = AT91SAM9263_BASE_TCB0 + SZ_16K - 1,
 785                 .flags  = IORESOURCE_MEM,
 786         },
 787         [1] = {
 788                 .start  = AT91SAM9263_ID_TCB,
 789                 .end    = AT91SAM9263_ID_TCB,
 790                 .flags  = IORESOURCE_IRQ,
 791         },
 792 };
 793
 794 static struct platform_device at91sam9263_tcb_device = {
 795         .name           = "atmel_tcb",
 796         .id             = 0,
 797         .resource       = tcb_resources,
 798         .num_resources  = ARRAY_SIZE(tcb_resources),
 799 };
 800
 801 static void __init at91_add_device_tc(void)
 802 {
 803         /* this chip has one clock and irq for all three TC channels */
 804         at91_clock_associate("tcb_clk", &at91sam9263_tcb_device.dev, "t0_clk");
 805         platform_device_register(&at91sam9263_tcb_device);
 806 }
 807 #else
 808 static void __init at91_add_device_tc(void) { }
 809 #endif
 810
 811
 812 /* --------------------------------------------------------------------
 813  *  RTT
 814  * -------------------------------------------------------------------- */
 815
 816 static struct resource rtt0_resources[] = {
 817         {
 818                 .start  = AT91_BASE_SYS + AT91_RTT0,
 819                 .end    = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1,
 820                 .flags  = IORESOURCE_MEM,
 821         }
 822 };
 823
 824 static struct platform_device at91sam9263_rtt0_device = {
 825         .name           = "at91_rtt",
 826         .id             = 0,
 827         .resource       = rtt0_resources,
 828         .num_resources  = ARRAY_SIZE(rtt0_resources),
 829 };
 830
 831 static struct resource rtt1_resources[] = {
 832         {
 833                 .start  = AT91_BASE_SYS + AT91_RTT1,
 834                 .end    = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1,
 835                 .flags  = IORESOURCE_MEM,
 836         }
 837 };
 838
 839 static struct platform_device at91sam9263_rtt1_device = {
 840         .name           = "at91_rtt",
 841         .id             = 1,
 842         .resource       = rtt1_resources,
 843         .num_resources  = ARRAY_SIZE(rtt1_resources),
 844 };
 845
 846 static void __init at91_add_device_rtt(void)
 847 {
 848         platform_device_register(&at91sam9263_rtt0_device);
 849         platform_device_register(&at91sam9263_rtt1_device);
 850 }
 851
 852
 853 /* --------------------------------------------------------------------
 854  *  Watchdog
 855  * -------------------------------------------------------------------- */
 856
 857 #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE)
 858 static struct platform_device at91sam9263_wdt_device = {
 859         .name           = "at91_wdt",
 860         .id             = -1,
 861         .num_resources  = 0,
 862 };
 863
 864 static void __init at91_add_device_watchdog(void)
 865 {
 866         platform_device_register(&at91sam9263_wdt_device);
 867 }
 868 #else
 869 static void __init at91_add_device_watchdog(void) {}
 870 #endif
 871
 872
 873 /* --------------------------------------------------------------------
 874  *  PWM
 875  * --------------------------------------------------------------------*/
 876
 877 #if defined(CONFIG_ATMEL_PWM)
 878 static u32 pwm_mask;
 879
 880 static struct resource pwm_resources[] = {
 881         [0] = {
 882                 .start  = AT91SAM9263_BASE_PWMC,
 883                 .end    = AT91SAM9263_BASE_PWMC + SZ_16K - 1,
 884                 .flags  = IORESOURCE_MEM,
 885         },
 886         [1] = {
 887                 .start  = AT91SAM9263_ID_PWMC,
 888                 .end    = AT91SAM9263_ID_PWMC,
 889                 .flags  = IORESOURCE_IRQ,
 890         },
 891 };
 892
 893 static struct platform_device at91sam9263_pwm0_device = {
 894         .name   = "atmel_pwm",
 895         .id     = -1,
 896         .dev    = {
 897                 .platform_data          = &pwm_mask,
 898         },
 899         .resource       = pwm_resources,
 900         .num_resources  = ARRAY_SIZE(pwm_resources),
 901 };
 902
 903 void __init at91_add_device_pwm(u32 mask)
 904 {
 905         if (mask & (1 << AT91_PWM0))
 906                 at91_set_B_periph(AT91_PIN_PB7, 1);     /* enable PWM0 */
 907
 908         if (mask & (1 << AT91_PWM1))
 909                 at91_set_B_periph(AT91_PIN_PB8, 1);     /* enable PWM1 */
 910
 911         if (mask & (1 << AT91_PWM2))
 912                 at91_set_B_periph(AT91_PIN_PC29, 1);    /* enable PWM2 */
 913
 914         if (mask & (1 << AT91_PWM3))
 915                 at91_set_B_periph(AT91_PIN_PB29, 1);    /* enable PWM3 */
 916
 917         pwm_mask = mask;
 918
 919         platform_device_register(&at91sam9263_pwm0_device);
 920 }
 921 #else
 922 void __init at91_add_device_pwm(u32 mask) {}
 923 #endif
 924
 925
 926 /* --------------------------------------------------------------------
 927  *  SSC -- Synchronous Serial Controller
 928  * -------------------------------------------------------------------- */
 929
 930 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 931 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 932
 933 static struct resource ssc0_resources[] = {
 934         [0] = {
 935                 .start  = AT91SAM9263_BASE_SSC0,
 936                 .end    = AT91SAM9263_BASE_SSC0 + SZ_16K - 1,
 937                 .flags  = IORESOURCE_MEM,
 938         },
 939         [1] = {
 940                 .start  = AT91SAM9263_ID_SSC0,
 941                 .end    = AT91SAM9263_ID_SSC0,
 942                 .flags  = IORESOURCE_IRQ,
 943         },
 944 };
 945
 946 static struct platform_device at91sam9263_ssc0_device = {
 947         .name   = "ssc",
 948         .id     = 0,
 949         .dev    = {
 950                 .dma_mask               = &ssc0_dmamask,
 951                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 952         },
 953         .resource       = ssc0_resources,
 954         .num_resources  = ARRAY_SIZE(ssc0_resources),
 955 };
 956
 957 static inline void configure_ssc0_pins(unsigned pins)
 958 {
 959         if (pins & ATMEL_SSC_TF)
 960                 at91_set_B_periph(AT91_PIN_PB0, 1);
 961         if (pins & ATMEL_SSC_TK)
 962                 at91_set_B_periph(AT91_PIN_PB1, 1);
 963         if (pins & ATMEL_SSC_TD)
 964                 at91_set_B_periph(AT91_PIN_PB2, 1);
 965         if (pins & ATMEL_SSC_RD)
 966                 at91_set_B_periph(AT91_PIN_PB3, 1);
 967         if (pins & ATMEL_SSC_RK)
 968                 at91_set_B_periph(AT91_PIN_PB4, 1);
 969         if (pins & ATMEL_SSC_RF)
 970                 at91_set_B_periph(AT91_PIN_PB5, 1);
 971 }
 972
 973 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 974
 975 static struct resource ssc1_resources[] = {
 976         [0] = {
 977                 .start  = AT91SAM9263_BASE_SSC1,
 978                 .end    = AT91SAM9263_BASE_SSC1 + SZ_16K - 1,
 979                 .flags  = IORESOURCE_MEM,
 980         },
 981         [1] = {
 982                 .start  = AT91SAM9263_ID_SSC1,
 983                 .end    = AT91SAM9263_ID_SSC1,
 984                 .flags  = IORESOURCE_IRQ,
 985         },
 986 };
 987
 988 static struct platform_device at91sam9263_ssc1_device = {
 989         .name   = "ssc",
 990         .id     = 1,
 991         .dev    = {
 992                 .dma_mask               = &ssc1_dmamask,
 993                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 994         },
 995         .resource       = ssc1_resources,
 996         .num_resources  = ARRAY_SIZE(ssc1_resources),
 997 };
 998
 999 static inline void configure_ssc1_pins(unsigned pins)
1000 {
1001         if (pins & ATMEL_SSC_TF)
1002                 at91_set_A_periph(AT91_PIN_PB6, 1);
1003         if (pins & ATMEL_SSC_TK)
1004                 at91_set_A_periph(AT91_PIN_PB7, 1);
1005         if (pins & ATMEL_SSC_TD)
1006                 at91_set_A_periph(AT91_PIN_PB8, 1);
1007         if (pins & ATMEL_SSC_RD)
1008                 at91_set_A_periph(AT91_PIN_PB9, 1);
1009         if (pins & ATMEL_SSC_RK)
1010                 at91_set_A_periph(AT91_PIN_PB10, 1);
1011         if (pins & ATMEL_SSC_RF)
1012                 at91_set_A_periph(AT91_PIN_PB11, 1);
1013 }
1014
1015 /*
1016  * SSC controllers are accessed through library code, instead of any
1017  * kind of all-singing/all-dancing driver.  For example one could be
1018  * used by a particular I2S audio codec's driver, while another one
1019  * on the same system might be used by a custom data capture driver.
1020  */
1021 void __init at91_add_device_ssc(unsigned id, unsigned pins)
1022 {
1023         struct platform_device *pdev;
1024
1025         /*
1026          * NOTE: caller is responsible for passing information matching
1027          * "pins" to whatever will be using each particular controller.
1028          */
1029         switch (id) {
1030         case AT91SAM9263_ID_SSC0:
1031                 pdev = &at91sam9263_ssc0_device;
1032                 configure_ssc0_pins(pins);
1033                 at91_clock_associate("ssc0_clk", &pdev->dev, "pclk");
1034                 break;
1035         case AT91SAM9263_ID_SSC1:
1036                 pdev = &at91sam9263_ssc1_device;
1037                 configure_ssc1_pins(pins);
1038                 at91_clock_associate("ssc1_clk", &pdev->dev, "pclk");
1039                 break;
1040         default:
1041                 return;
1042         }
1043
1044         platform_device_register(pdev);
1045 }
1046
1047 #else
1048 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
1049 #endif
1050
1051
1052 /* --------------------------------------------------------------------
1053  *  UART
1054  * -------------------------------------------------------------------- */
1055
1056 #if defined(CONFIG_SERIAL_ATMEL)
1057
1058 static struct resource dbgu_resources[] = {
1059         [0] = {
1060                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
1061                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
1062                 .flags  = IORESOURCE_MEM,
1063         },
1064         [1] = {
1065                 .start  = AT91_ID_SYS,
1066                 .end    = AT91_ID_SYS,
1067                 .flags  = IORESOURCE_IRQ,
1068         },
1069 };
1070
1071 static struct atmel_uart_data dbgu_data = {
1072         .use_dma_tx     = 0,
1073         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
1074         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
1075 };
1076
1077 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
1078
1079 static struct platform_device at91sam9263_dbgu_device = {
1080         .name           = "atmel_usart",
1081         .id             = 0,
1082         .dev            = {
1083                                 .dma_mask               = &dbgu_dmamask,
1084                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1085                                 .platform_data          = &dbgu_data,
1086         },
1087         .resource       = dbgu_resources,
1088         .num_resources  = ARRAY_SIZE(dbgu_resources),
1089 };
1090
1091 static inline void configure_dbgu_pins(void)
1092 {
1093         at91_set_A_periph(AT91_PIN_PC30, 0);            /* DRXD */
1094         at91_set_A_periph(AT91_PIN_PC31, 1);            /* DTXD */
1095 }
1096
1097 static struct resource uart0_resources[] = {
1098         [0] = {
1099                 .start  = AT91SAM9263_BASE_US0,
1100                 .end    = AT91SAM9263_BASE_US0 + SZ_16K - 1,
1101                 .flags  = IORESOURCE_MEM,
1102         },
1103         [1] = {
1104                 .start  = AT91SAM9263_ID_US0,
1105                 .end    = AT91SAM9263_ID_US0,
1106                 .flags  = IORESOURCE_IRQ,
1107         },
1108 };
1109
1110 static struct atmel_uart_data uart0_data = {
1111         .use_dma_tx     = 1,
1112         .use_dma_rx     = 1,
1113 };
1114
1115 static u64 uart0_dmamask = DMA_BIT_MASK(32);
1116
1117 static struct platform_device at91sam9263_uart0_device = {
1118         .name           = "atmel_usart",
1119         .id             = 1,
1120         .dev            = {
1121                                 .dma_mask               = &uart0_dmamask,
1122                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1123                                 .platform_data          = &uart0_data,
1124         },
1125         .resource       = uart0_resources,
1126         .num_resources  = ARRAY_SIZE(uart0_resources),
1127 };
1128
1129 static inline void configure_usart0_pins(unsigned pins)
1130 {
1131         at91_set_A_periph(AT91_PIN_PA26, 1);            /* TXD0 */
1132         at91_set_A_periph(AT91_PIN_PA27, 0);            /* RXD0 */
1133
1134         if (pins & ATMEL_UART_RTS)
1135                 at91_set_A_periph(AT91_PIN_PA28, 0);    /* RTS0 */
1136         if (pins & ATMEL_UART_CTS)
1137                 at91_set_A_periph(AT91_PIN_PA29, 0);    /* CTS0 */
1138 }
1139
1140 static struct resource uart1_resources[] = {
1141         [0] = {
1142                 .start  = AT91SAM9263_BASE_US1,
1143                 .end    = AT91SAM9263_BASE_US1 + SZ_16K - 1,
1144                 .flags  = IORESOURCE_MEM,
1145         },
1146         [1] = {
1147                 .start  = AT91SAM9263_ID_US1,
1148                 .end    = AT91SAM9263_ID_US1,
1149                 .flags  = IORESOURCE_IRQ,
1150         },
1151 };
1152
1153 static struct atmel_uart_data uart1_data = {
1154         .use_dma_tx     = 1,
1155         .use_dma_rx     = 1,
1156 };
1157
1158 static u64 uart1_dmamask = DMA_BIT_MASK(32);
1159
1160 static struct platform_device at91sam9263_uart1_device = {
1161         .name           = "atmel_usart",
1162         .id             = 2,
1163         .dev            = {
1164                                 .dma_mask               = &uart1_dmamask,
1165                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1166                                 .platform_data          = &uart1_data,
1167         },
1168         .resource       = uart1_resources,
1169         .num_resources  = ARRAY_SIZE(uart1_resources),
1170 };
1171
1172 static inline void configure_usart1_pins(unsigned pins)
1173 {
1174         at91_set_A_periph(AT91_PIN_PD0, 1);             /* TXD1 */
1175         at91_set_A_periph(AT91_PIN_PD1, 0);             /* RXD1 */
1176
1177         if (pins & ATMEL_UART_RTS)
1178                 at91_set_B_periph(AT91_PIN_PD7, 0);     /* RTS1 */
1179         if (pins & ATMEL_UART_CTS)
1180                 at91_set_B_periph(AT91_PIN_PD8, 0);     /* CTS1 */
1181 }
1182
1183 static struct resource uart2_resources[] = {
1184         [0] = {
1185                 .start  = AT91SAM9263_BASE_US2,
1186                 .end    = AT91SAM9263_BASE_US2 + SZ_16K - 1,
1187                 .flags  = IORESOURCE_MEM,
1188         },
1189         [1] = {
1190                 .start  = AT91SAM9263_ID_US2,
1191                 .end    = AT91SAM9263_ID_US2,
1192                 .flags  = IORESOURCE_IRQ,
1193         },
1194 };
1195
1196 static struct atmel_uart_data uart2_data = {
1197         .use_dma_tx     = 1,
1198         .use_dma_rx     = 1,
1199 };
1200
1201 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1202
1203 static struct platform_device at91sam9263_uart2_device = {
1204         .name           = "atmel_usart",
1205         .id             = 3,
1206         .dev            = {
1207                                 .dma_mask               = &uart2_dmamask,
1208                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1209                                 .platform_data          = &uart2_data,
1210         },
1211         .resource       = uart2_resources,
1212         .num_resources  = ARRAY_SIZE(uart2_resources),
1213 };
1214
1215 static inline void configure_usart2_pins(unsigned pins)
1216 {
1217         at91_set_A_periph(AT91_PIN_PD2, 1);             /* TXD2 */
1218         at91_set_A_periph(AT91_PIN_PD3, 0);             /* RXD2 */
1219
1220         if (pins & ATMEL_UART_RTS)
1221                 at91_set_B_periph(AT91_PIN_PD5, 0);     /* RTS2 */
1222         if (pins & ATMEL_UART_CTS)
1223                 at91_set_B_periph(AT91_PIN_PD6, 0);     /* CTS2 */
1224 }
1225
1226 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1227 struct platform_device *atmel_default_console_device;   /* the serial console device */
1228
1229 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1230 {
1231         struct platform_device *pdev;
1232
1233         switch (id) {
1234                 case 0:         /* DBGU */
1235                         pdev = &at91sam9263_dbgu_device;
1236                         configure_dbgu_pins();
1237                         at91_clock_associate("mck", &pdev->dev, "usart");
1238                         break;
1239                 case AT91SAM9263_ID_US0:
1240                         pdev = &at91sam9263_uart0_device;
1241                         configure_usart0_pins(pins);
1242                         at91_clock_associate("usart0_clk", &pdev->dev, "usart");
1243                         break;
1244                 case AT91SAM9263_ID_US1:
1245                         pdev = &at91sam9263_uart1_device;
1246                         configure_usart1_pins(pins);
1247                         at91_clock_associate("usart1_clk", &pdev->dev, "usart");
1248                         break;
1249                 case AT91SAM9263_ID_US2:
1250                         pdev = &at91sam9263_uart2_device;
1251                         configure_usart2_pins(pins);
1252                         at91_clock_associate("usart2_clk", &pdev->dev, "usart");
1253                         break;
1254                 default:
1255                         return;
1256         }
1257         pdev->id = portnr;              /* update to mapped ID */
1258
1259         if (portnr < ATMEL_MAX_UART)
1260                 at91_uarts[portnr] = pdev;
1261 }
1262
1263 void __init at91_set_serial_console(unsigned portnr)
1264 {
1265         if (portnr < ATMEL_MAX_UART)
1266                 atmel_default_console_device = at91_uarts[portnr];
1267 }
1268
1269 void __init at91_add_device_serial(void)
1270 {
1271         int i;
1272
1273         for (i = 0; i < ATMEL_MAX_UART; i++) {
1274                 if (at91_uarts[i])
1275                         platform_device_register(at91_uarts[i]);
1276         }
1277
1278         if (!atmel_default_console_device)
1279                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1280 }
1281 #else
1282 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1283 void __init at91_set_serial_console(unsigned portnr) {}
1284 void __init at91_add_device_serial(void) {}
1285 #endif
1286
1287
1288 /* -------------------------------------------------------------------- */
1289 /*
1290  * These devices are always present and don't need any board-specific
1291  * setup.
1292  */
1293 static int __init at91_add_standard_devices(void)
1294 {
1295         at91_add_device_rtt();
1296         at91_add_device_watchdog();
1297         at91_add_device_tc();
1298         return 0;
1299 }
1300
1301 arch_initcall(at91_add_standard_devices);