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   1 /*
   2  *  linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
   3  *
   4  *  Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/clk.h>
  14 #include <linux/mmc/host.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/irq.h>
  17 #include <linux/io.h>
  18
  19 #include <asm/dma.h>
  20
  21 #include <mach/regs-sdi.h>
  22 #include <mach/regs-gpio.h>
  23
  24 #include <asm/plat-s3c24xx/mci.h>
  25
  26 #include "s3cmci.h"
  27
  28 #define DRIVER_NAME "s3c-mci"
  29
  30 enum dbg_channels {
  31         dbg_err   = (1 << 0),
  32         dbg_debug = (1 << 1),
  33         dbg_info  = (1 << 2),
  34         dbg_irq   = (1 << 3),
  35         dbg_sg    = (1 << 4),
  36         dbg_dma   = (1 << 5),
  37         dbg_pio   = (1 << 6),
  38         dbg_fail  = (1 << 7),
  39         dbg_conf  = (1 << 8),
  40 };
  41
  42 static const int dbgmap_err   = dbg_err | dbg_fail;
  43 static const int dbgmap_info  = dbg_info | dbg_conf;
  44 static const int dbgmap_debug = dbg_debug;
  45
  46 #define dbg(host, channels, args...)              \
  47         do {                                      \
  48         if (dbgmap_err & channels)                \
  49                 dev_err(&host->pdev->dev, args);  \
  50         else if (dbgmap_info & channels)          \
  51                 dev_info(&host->pdev->dev, args); \
  52         else if (dbgmap_debug & channels)         \
  53                 dev_dbg(&host->pdev->dev, args);  \
  54         } while (0)
  55
  56 #define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
  57
  58 static struct s3c2410_dma_client s3cmci_dma_client = {
  59         .name           = "s3c-mci",
  60 };
  61
  62 static void finalize_request(struct s3cmci_host *host);
  63 static void s3cmci_send_request(struct mmc_host *mmc);
  64 static void s3cmci_reset(struct s3cmci_host *host);
  65
  66 #ifdef CONFIG_MMC_DEBUG
  67
  68 static void dbg_dumpregs(struct s3cmci_host *host, char *prefix)
  69 {
  70         u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
  71         u32 datcon, datcnt, datsta, fsta, imask;
  72
  73         con     = readl(host->base + S3C2410_SDICON);
  74         pre     = readl(host->base + S3C2410_SDIPRE);
  75         cmdarg  = readl(host->base + S3C2410_SDICMDARG);
  76         cmdcon  = readl(host->base + S3C2410_SDICMDCON);
  77         cmdsta  = readl(host->base + S3C2410_SDICMDSTAT);
  78         r0      = readl(host->base + S3C2410_SDIRSP0);
  79         r1      = readl(host->base + S3C2410_SDIRSP1);
  80         r2      = readl(host->base + S3C2410_SDIRSP2);
  81         r3      = readl(host->base + S3C2410_SDIRSP3);
  82         timer   = readl(host->base + S3C2410_SDITIMER);
  83         bsize   = readl(host->base + S3C2410_SDIBSIZE);
  84         datcon  = readl(host->base + S3C2410_SDIDCON);
  85         datcnt  = readl(host->base + S3C2410_SDIDCNT);
  86         datsta  = readl(host->base + S3C2410_SDIDSTA);
  87         fsta    = readl(host->base + S3C2410_SDIFSTA);
  88         imask   = readl(host->base + host->sdiimsk);
  89
  90         dbg(host, dbg_debug, "%s  CON:[%08x]  PRE:[%08x]  TMR:[%08x]\n",
  91                                 prefix, con, pre, timer);
  92
  93         dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n",
  94                                 prefix, cmdcon, cmdarg, cmdsta);
  95
  96         dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]"
  97                                " DSTA:[%08x] DCNT:[%08x]\n",
  98                                 prefix, datcon, fsta, datsta, datcnt);
  99
 100         dbg(host, dbg_debug, "%s   R0:[%08x]   R1:[%08x]"
 101                                "   R2:[%08x]   R3:[%08x]\n",
 102                                 prefix, r0, r1, r2, r3);
 103 }
 104
 105 static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
 106                            int stop)
 107 {
 108         snprintf(host->dbgmsg_cmd, 300,
 109                  "#%u%s op:%i arg:0x%08x flags:0x08%x retries:%u",
 110                  host->ccnt, (stop ? " (STOP)" : ""),
 111                  cmd->opcode, cmd->arg, cmd->flags, cmd->retries);
 112
 113         if (cmd->data) {
 114                 snprintf(host->dbgmsg_dat, 300,
 115                          "#%u bsize:%u blocks:%u bytes:%u",
 116                          host->dcnt, cmd->data->blksz,
 117                          cmd->data->blocks,
 118                          cmd->data->blocks * cmd->data->blksz);
 119         } else {
 120                 host->dbgmsg_dat[0] = '\0';
 121         }
 122 }
 123
 124 static void dbg_dumpcmd(struct s3cmci_host *host, struct mmc_command *cmd,
 125                         int fail)
 126 {
 127         unsigned int dbglvl = fail ? dbg_fail : dbg_debug;
 128
 129         if (!cmd)
 130                 return;
 131
 132         if (cmd->error == 0) {
 133                 dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n",
 134                         host->dbgmsg_cmd, cmd->resp[0]);
 135         } else {
 136                 dbg(host, dbglvl, "CMD[ERR %i] %s Status:%s\n",
 137                         cmd->error, host->dbgmsg_cmd, host->status);
 138         }
 139
 140         if (!cmd->data)
 141                 return;
 142
 143         if (cmd->data->error == 0) {
 144                 dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat);
 145         } else {
 146                 dbg(host, dbglvl, "DAT[ERR %i] %s DCNT:0x%08x\n",
 147                         cmd->data->error, host->dbgmsg_dat,
 148                         readl(host->base + S3C2410_SDIDCNT));
 149         }
 150 }
 151 #else
 152 static void dbg_dumpcmd(struct s3cmci_host *host,
 153                         struct mmc_command *cmd, int fail) { }
 154
 155 static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
 156                            int stop) { }
 157
 158 static void dbg_dumpregs(struct s3cmci_host *host, char *prefix) { }
 159
 160 #endif /* CONFIG_MMC_DEBUG */
 161
 162 static inline u32 enable_imask(struct s3cmci_host *host, u32 imask)
 163 {
 164         u32 newmask;
 165
 166         newmask = readl(host->base + host->sdiimsk);
 167         newmask |= imask;
 168
 169         writel(newmask, host->base + host->sdiimsk);
 170
 171         return newmask;
 172 }
 173
 174 static inline u32 disable_imask(struct s3cmci_host *host, u32 imask)
 175 {
 176         u32 newmask;
 177
 178         newmask = readl(host->base + host->sdiimsk);
 179         newmask &= ~imask;
 180
 181         writel(newmask, host->base + host->sdiimsk);
 182
 183         return newmask;
 184 }
 185
 186 static inline void clear_imask(struct s3cmci_host *host)
 187 {
 188         writel(0, host->base + host->sdiimsk);
 189 }
 190
 191 static inline int get_data_buffer(struct s3cmci_host *host,
 192                                   u32 *words, u32 **pointer)
 193 {
 194         struct scatterlist *sg;
 195
 196         if (host->pio_active == XFER_NONE)
 197                 return -EINVAL;
 198
 199         if ((!host->mrq) || (!host->mrq->data))
 200                 return -EINVAL;
 201
 202         if (host->pio_sgptr >= host->mrq->data->sg_len) {
 203                 dbg(host, dbg_debug, "no more buffers (%i/%i)\n",
 204                       host->pio_sgptr, host->mrq->data->sg_len);
 205                 return -EBUSY;
 206         }
 207         sg = &host->mrq->data->sg[host->pio_sgptr];
 208
 209         *words = sg->length >> 2;
 210         *pointer = sg_virt(sg);
 211
 212         host->pio_sgptr++;
 213
 214         dbg(host, dbg_sg, "new buffer (%i/%i)\n",
 215             host->pio_sgptr, host->mrq->data->sg_len);
 216
 217         return 0;
 218 }
 219
 220 static inline u32 fifo_count(struct s3cmci_host *host)
 221 {
 222         u32 fifostat = readl(host->base + S3C2410_SDIFSTA);
 223
 224         fifostat &= S3C2410_SDIFSTA_COUNTMASK;
 225         return fifostat >> 2;
 226 }
 227
 228 static inline u32 fifo_free(struct s3cmci_host *host)
 229 {
 230         u32 fifostat = readl(host->base + S3C2410_SDIFSTA);
 231
 232         fifostat &= S3C2410_SDIFSTA_COUNTMASK;
 233         return (63 - fifostat) >> 2;
 234 }
 235
 236 static void do_pio_read(struct s3cmci_host *host)
 237 {
 238         int res;
 239         u32 fifo;
 240         void __iomem *from_ptr;
 241
 242         /* write real prescaler to host, it might be set slow to fix */
 243         writel(host->prescaler, host->base + S3C2410_SDIPRE);
 244
 245         from_ptr = host->base + host->sdidata;
 246
 247         while ((fifo = fifo_count(host))) {
 248                 if (!host->pio_words) {
 249                         res = get_data_buffer(host, &host->pio_words,
 250                                               &host->pio_ptr);
 251                         if (res) {
 252                                 host->pio_active = XFER_NONE;
 253                                 host->complete_what = COMPLETION_FINALIZE;
 254
 255                                 dbg(host, dbg_pio, "pio_read(): "
 256                                     "complete (no more data).\n");
 257                                 return;
 258                         }
 259
 260                         dbg(host, dbg_pio,
 261                             "pio_read(): new target: [%i]@[%p]\n",
 262                             host->pio_words, host->pio_ptr);
 263                 }
 264
 265                 dbg(host, dbg_pio,
 266                     "pio_read(): fifo:[%02i] buffer:[%03i] dcnt:[%08X]\n",
 267                     fifo, host->pio_words,
 268                     readl(host->base + S3C2410_SDIDCNT));
 269
 270                 if (fifo > host->pio_words)
 271                         fifo = host->pio_words;
 272
 273                 host->pio_words -= fifo;
 274                 host->pio_count += fifo;
 275
 276                 while (fifo--)
 277                         *(host->pio_ptr++) = readl(from_ptr);
 278         }
 279
 280         if (!host->pio_words) {
 281                 res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
 282                 if (res) {
 283                         dbg(host, dbg_pio,
 284                             "pio_read(): complete (no more buffers).\n");
 285                         host->pio_active = XFER_NONE;
 286                         host->complete_what = COMPLETION_FINALIZE;
 287
 288                         return;
 289                 }
 290         }
 291
 292         enable_imask(host,
 293                      S3C2410_SDIIMSK_RXFIFOHALF | S3C2410_SDIIMSK_RXFIFOLAST);
 294 }
 295
 296 static void do_pio_write(struct s3cmci_host *host)
 297 {
 298         void __iomem *to_ptr;
 299         int res;
 300         u32 fifo;
 301
 302         to_ptr = host->base + host->sdidata;
 303
 304         while ((fifo = fifo_free(host))) {
 305                 if (!host->pio_words) {
 306                         res = get_data_buffer(host, &host->pio_words,
 307                                                         &host->pio_ptr);
 308                         if (res) {
 309                                 dbg(host, dbg_pio,
 310                                     "pio_write(): complete (no more data).\n");
 311                                 host->pio_active = XFER_NONE;
 312
 313                                 return;
 314                         }
 315
 316                         dbg(host, dbg_pio,
 317                             "pio_write(): new source: [%i]@[%p]\n",
 318                             host->pio_words, host->pio_ptr);
 319
 320                 }
 321
 322                 if (fifo > host->pio_words)
 323                         fifo = host->pio_words;
 324
 325                 host->pio_words -= fifo;
 326                 host->pio_count += fifo;
 327
 328                 while (fifo--)
 329                         writel(*(host->pio_ptr++), to_ptr);
 330         }
 331
 332         enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
 333 }
 334
 335 static void pio_tasklet(unsigned long data)
 336 {
 337         struct s3cmci_host *host = (struct s3cmci_host *) data;
 338
 339
 340         disable_irq(host->irq);
 341
 342         if (host->pio_active == XFER_WRITE)
 343                 do_pio_write(host);
 344
 345         if (host->pio_active == XFER_READ)
 346                 do_pio_read(host);
 347
 348         if (host->complete_what == COMPLETION_FINALIZE) {
 349                 clear_imask(host);
 350                 if (host->pio_active != XFER_NONE) {
 351                         dbg(host, dbg_err, "unfinished %s "
 352                             "- pio_count:[%u] pio_words:[%u]\n",
 353                             (host->pio_active == XFER_READ) ? "read" : "write",
 354                             host->pio_count, host->pio_words);
 355
 356                         if (host->mrq->data)
 357                                 host->mrq->data->error = -EINVAL;
 358                 }
 359
 360                 finalize_request(host);
 361         } else
 362                 enable_irq(host->irq);
 363 }
 364
 365 /*
 366  * ISR for SDI Interface IRQ
 367  * Communication between driver and ISR works as follows:
 368  *   host->mrq                  points to current request
 369  *   host->complete_what        Indicates when the request is considered done
 370  *     COMPLETION_CMDSENT         when the command was sent
 371  *     COMPLETION_RSPFIN          when a response was received
 372  *     COMPLETION_XFERFINISH      when the data transfer is finished
 373  *     COMPLETION_XFERFINISH_RSPFIN both of the above.
 374  *   host->complete_request     is the completion-object the driver waits for
 375  *
 376  * 1) Driver sets up host->mrq and host->complete_what
 377  * 2) Driver prepares the transfer
 378  * 3) Driver enables interrupts
 379  * 4) Driver starts transfer
 380  * 5) Driver waits for host->complete_rquest
 381  * 6) ISR checks for request status (errors and success)
 382  * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error
 383  * 7) ISR completes host->complete_request
 384  * 8) ISR disables interrupts
 385  * 9) Driver wakes up and takes care of the request
 386  *
 387  * Note: "->error"-fields are expected to be set to 0 before the request
 388  *       was issued by mmc.c - therefore they are only set, when an error
 389  *       contition comes up
 390  */
 391
 392 static irqreturn_t s3cmci_irq(int irq, void *dev_id)
 393 {
 394         struct s3cmci_host *host = dev_id;
 395         struct mmc_command *cmd;
 396         u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt, mci_imsk;
 397         u32 mci_cclear, mci_dclear;
 398         unsigned long iflags;
 399
 400         spin_lock_irqsave(&host->complete_lock, iflags);
 401
 402         mci_csta = readl(host->base + S3C2410_SDICMDSTAT);
 403         mci_dsta = readl(host->base + S3C2410_SDIDSTA);
 404         mci_dcnt = readl(host->base + S3C2410_SDIDCNT);
 405         mci_fsta = readl(host->base + S3C2410_SDIFSTA);
 406         mci_imsk = readl(host->base + host->sdiimsk);
 407         mci_cclear = 0;
 408         mci_dclear = 0;
 409
 410         if ((host->complete_what == COMPLETION_NONE) ||
 411             (host->complete_what == COMPLETION_FINALIZE)) {
 412                 host->status = "nothing to complete";
 413                 clear_imask(host);
 414                 goto irq_out;
 415         }
 416
 417         if (!host->mrq) {
 418                 host->status = "no active mrq";
 419                 clear_imask(host);
 420                 goto irq_out;
 421         }
 422
 423         cmd = host->cmd_is_stop ? host->mrq->stop : host->mrq->cmd;
 424
 425         if (!cmd) {
 426                 host->status = "no active cmd";
 427                 clear_imask(host);
 428                 goto irq_out;
 429         }
 430
 431         if (!host->dodma) {
 432                 if ((host->pio_active == XFER_WRITE) &&
 433                     (mci_fsta & S3C2410_SDIFSTA_TFDET)) {
 434
 435                         disable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
 436                         tasklet_schedule(&host->pio_tasklet);
 437                         host->status = "pio tx";
 438                 }
 439
 440                 if ((host->pio_active == XFER_READ) &&
 441                     (mci_fsta & S3C2410_SDIFSTA_RFDET)) {
 442
 443                         disable_imask(host,
 444                                       S3C2410_SDIIMSK_RXFIFOHALF |
 445                                       S3C2410_SDIIMSK_RXFIFOLAST);
 446
 447                         tasklet_schedule(&host->pio_tasklet);
 448                         host->status = "pio rx";
 449                 }
 450         }
 451
 452         if (mci_csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
 453                 dbg(host, dbg_err, "CMDSTAT: error CMDTIMEOUT\n");
 454                 cmd->error = -ETIMEDOUT;
 455                 host->status = "error: command timeout";
 456                 goto fail_transfer;
 457         }
 458
 459         if (mci_csta & S3C2410_SDICMDSTAT_CMDSENT) {
 460                 if (host->complete_what == COMPLETION_CMDSENT) {
 461                         host->status = "ok: command sent";
 462                         goto close_transfer;
 463                 }
 464
 465                 mci_cclear |= S3C2410_SDICMDSTAT_CMDSENT;
 466         }
 467
 468         if (mci_csta & S3C2410_SDICMDSTAT_CRCFAIL) {
 469                 if (cmd->flags & MMC_RSP_CRC) {
 470                         if (host->mrq->cmd->flags & MMC_RSP_136) {
 471                                 dbg(host, dbg_irq,
 472                                     "fixup: ignore CRC fail with long rsp\n");
 473                         } else {
 474                                 /* note, we used to fail the transfer
 475                                  * here, but it seems that this is just
 476                                  * the hardware getting it wrong.
 477                                  *
 478                                  * cmd->error = -EILSEQ;
 479                                  * host->status = "error: bad command crc";
 480                                  * goto fail_transfer;
 481                                 */
 482                         }
 483                 }
 484
 485                 mci_cclear |= S3C2410_SDICMDSTAT_CRCFAIL;
 486         }
 487
 488         if (mci_csta & S3C2410_SDICMDSTAT_RSPFIN) {
 489                 if (host->complete_what == COMPLETION_RSPFIN) {
 490                         host->status = "ok: command response received";
 491                         goto close_transfer;
 492                 }
 493
 494                 if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
 495                         host->complete_what = COMPLETION_XFERFINISH;
 496
 497                 mci_cclear |= S3C2410_SDICMDSTAT_RSPFIN;
 498         }
 499
 500         /* errors handled after this point are only relevant
 501            when a data transfer is in progress */
 502
 503         if (!cmd->data)
 504                 goto clear_status_bits;
 505
 506         /* Check for FIFO failure */
 507         if (host->is2440) {
 508                 if (mci_fsta & S3C2440_SDIFSTA_FIFOFAIL) {
 509                         dbg(host, dbg_err, "FIFO failure\n");
 510                         host->mrq->data->error = -EILSEQ;
 511                         host->status = "error: 2440 fifo failure";
 512                         goto fail_transfer;
 513                 }
 514         } else {
 515                 if (mci_dsta & S3C2410_SDIDSTA_FIFOFAIL) {
 516                         dbg(host, dbg_err, "FIFO failure\n");
 517                         cmd->data->error = -EILSEQ;
 518                         host->status = "error:  fifo failure";
 519                         goto fail_transfer;
 520                 }
 521         }
 522
 523         if (mci_dsta & S3C2410_SDIDSTA_RXCRCFAIL) {
 524                 dbg(host, dbg_err, "bad data crc (outgoing)\n");
 525                 cmd->data->error = -EILSEQ;
 526                 host->status = "error: bad data crc (outgoing)";
 527                 goto fail_transfer;
 528         }
 529
 530         if (mci_dsta & S3C2410_SDIDSTA_CRCFAIL) {
 531                 dbg(host, dbg_err, "bad data crc (incoming)\n");
 532                 cmd->data->error = -EILSEQ;
 533                 host->status = "error: bad data crc (incoming)";
 534                 goto fail_transfer;
 535         }
 536
 537         if (mci_dsta & S3C2410_SDIDSTA_DATATIMEOUT) {
 538                 dbg(host, dbg_err, "data timeout\n");
 539                 cmd->data->error = -ETIMEDOUT;
 540                 host->status = "error: data timeout";
 541                 goto fail_transfer;
 542         }
 543
 544         if (mci_dsta & S3C2410_SDIDSTA_XFERFINISH) {
 545                 if (host->complete_what == COMPLETION_XFERFINISH) {
 546                         host->status = "ok: data transfer completed";
 547                         goto close_transfer;
 548                 }
 549
 550                 if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
 551                         host->complete_what = COMPLETION_RSPFIN;
 552
 553                 mci_dclear |= S3C2410_SDIDSTA_XFERFINISH;
 554         }
 555
 556 clear_status_bits:
 557         writel(mci_cclear, host->base + S3C2410_SDICMDSTAT);
 558         writel(mci_dclear, host->base + S3C2410_SDIDSTA);
 559
 560         goto irq_out;
 561
 562 fail_transfer:
 563         host->pio_active = XFER_NONE;
 564
 565 close_transfer:
 566         host->complete_what = COMPLETION_FINALIZE;
 567
 568         clear_imask(host);
 569         tasklet_schedule(&host->pio_tasklet);
 570
 571         goto irq_out;
 572
 573 irq_out:
 574         dbg(host, dbg_irq,
 575             "csta:0x%08x dsta:0x%08x fsta:0x%08x dcnt:0x%08x status:%s.\n",
 576             mci_csta, mci_dsta, mci_fsta, mci_dcnt, host->status);
 577
 578         spin_unlock_irqrestore(&host->complete_lock, iflags);
 579         return IRQ_HANDLED;
 580
 581 }
 582
 583 /*
 584  * ISR for the CardDetect Pin
 585 */
 586
 587 static irqreturn_t s3cmci_irq_cd(int irq, void *dev_id)
 588 {
 589         struct s3cmci_host *host = (struct s3cmci_host *)dev_id;
 590
 591         dbg(host, dbg_irq, "card detect\n");
 592
 593         mmc_detect_change(host->mmc, msecs_to_jiffies(500));
 594
 595         return IRQ_HANDLED;
 596 }
 597
 598 static void s3cmci_dma_done_callback(struct s3c2410_dma_chan *dma_ch,
 599                                      void *buf_id, int size,
 600                                      enum s3c2410_dma_buffresult result)
 601 {
 602         struct s3cmci_host *host = buf_id;
 603         unsigned long iflags;
 604         u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt;
 605
 606         mci_csta = readl(host->base + S3C2410_SDICMDSTAT);
 607         mci_dsta = readl(host->base + S3C2410_SDIDSTA);
 608         mci_fsta = readl(host->base + S3C2410_SDIFSTA);
 609         mci_dcnt = readl(host->base + S3C2410_SDIDCNT);
 610
 611         BUG_ON(!host->mrq);
 612         BUG_ON(!host->mrq->data);
 613         BUG_ON(!host->dmatogo);
 614
 615         spin_lock_irqsave(&host->complete_lock, iflags);
 616
 617         if (result != S3C2410_RES_OK) {
 618                 dbg(host, dbg_fail, "DMA FAILED: csta=0x%08x dsta=0x%08x "
 619                         "fsta=0x%08x dcnt:0x%08x result:0x%08x toGo:%u\n",
 620                         mci_csta, mci_dsta, mci_fsta,
 621                         mci_dcnt, result, host->dmatogo);
 622
 623                 goto fail_request;
 624         }
 625
 626         host->dmatogo--;
 627         if (host->dmatogo) {
 628                 dbg(host, dbg_dma, "DMA DONE  Size:%i DSTA:[%08x] "
 629                         "DCNT:[%08x] toGo:%u\n",
 630                         size, mci_dsta, mci_dcnt, host->dmatogo);
 631
 632                 goto out;
 633         }
 634
 635         dbg(host, dbg_dma, "DMA FINISHED Size:%i DSTA:%08x DCNT:%08x\n",
 636                 size, mci_dsta, mci_dcnt);
 637
 638         host->complete_what = COMPLETION_FINALIZE;
 639
 640 out:
 641         tasklet_schedule(&host->pio_tasklet);
 642         spin_unlock_irqrestore(&host->complete_lock, iflags);
 643         return;
 644
 645 fail_request:
 646         host->mrq->data->error = -EINVAL;
 647         host->complete_what = COMPLETION_FINALIZE;
 648         writel(0, host->base + host->sdiimsk);
 649         goto out;
 650
 651 }
 652
 653 static void finalize_request(struct s3cmci_host *host)
 654 {
 655         struct mmc_request *mrq = host->mrq;
 656         struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
 657         int debug_as_failure = 0;
 658
 659         if (host->complete_what != COMPLETION_FINALIZE)
 660                 return;
 661
 662         if (!mrq)
 663                 return;
 664
 665         if (cmd->data && (cmd->error == 0) &&
 666             (cmd->data->error == 0)) {
 667                 if (host->dodma && (!host->dma_complete)) {
 668                         dbg(host, dbg_dma, "DMA Missing!\n");
 669                         return;
 670                 }
 671         }
 672
 673         /* Read response from controller. */
 674         cmd->resp[0] = readl(host->base + S3C2410_SDIRSP0);
 675         cmd->resp[1] = readl(host->base + S3C2410_SDIRSP1);
 676         cmd->resp[2] = readl(host->base + S3C2410_SDIRSP2);
 677         cmd->resp[3] = readl(host->base + S3C2410_SDIRSP3);
 678
 679         writel(host->prescaler, host->base + S3C2410_SDIPRE);
 680
 681         if (cmd->error)
 682                 debug_as_failure = 1;
 683
 684         if (cmd->data && cmd->data->error)
 685                 debug_as_failure = 1;
 686
 687         dbg_dumpcmd(host, cmd, debug_as_failure);
 688
 689         /* Cleanup controller */
 690         writel(0, host->base + S3C2410_SDICMDARG);
 691         writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
 692         writel(0, host->base + S3C2410_SDICMDCON);
 693         writel(0, host->base + host->sdiimsk);
 694
 695         if (cmd->data && cmd->error)
 696                 cmd->data->error = cmd->error;
 697
 698         if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) {
 699                 host->cmd_is_stop = 1;
 700                 s3cmci_send_request(host->mmc);
 701                 return;
 702         }
 703
 704         /* If we have no data transfer we are finished here */
 705         if (!mrq->data)
 706                 goto request_done;
 707
 708         /* Calulate the amout of bytes transfer if there was no error */
 709         if (mrq->data->error == 0) {
 710                 mrq->data->bytes_xfered =
 711                         (mrq->data->blocks * mrq->data->blksz);
 712         } else {
 713                 mrq->data->bytes_xfered = 0;
 714         }
 715
 716         /* If we had an error while transfering data we flush the
 717          * DMA channel and the fifo to clear out any garbage. */
 718         if (mrq->data->error != 0) {
 719                 if (host->dodma)
 720                         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
 721
 722                 if (host->is2440) {
 723                         /* Clear failure register and reset fifo. */
 724                         writel(S3C2440_SDIFSTA_FIFORESET |
 725                                S3C2440_SDIFSTA_FIFOFAIL,
 726                                host->base + S3C2410_SDIFSTA);
 727                 } else {
 728                         u32 mci_con;
 729
 730                         /* reset fifo */
 731                         mci_con = readl(host->base + S3C2410_SDICON);
 732                         mci_con |= S3C2410_SDICON_FIFORESET;
 733
 734                         writel(mci_con, host->base + S3C2410_SDICON);
 735                 }
 736         }
 737
 738 request_done:
 739         host->complete_what = COMPLETION_NONE;
 740         host->mrq = NULL;
 741         mmc_request_done(host->mmc, mrq);
 742 }
 743
 744 static void s3cmci_dma_setup(struct s3cmci_host *host,
 745                              enum s3c2410_dmasrc source)
 746 {
 747         static enum s3c2410_dmasrc last_source = -1;
 748         static int setup_ok;
 749
 750         if (last_source == source)
 751                 return;
 752
 753         last_source = source;
 754
 755         s3c2410_dma_devconfig(host->dma, source, 3,
 756                               host->mem->start + host->sdidata);
 757
 758         if (!setup_ok) {
 759                 s3c2410_dma_config(host->dma, 4,
 760                         (S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI));
 761                 s3c2410_dma_set_buffdone_fn(host->dma,
 762                                             s3cmci_dma_done_callback);
 763                 s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART);
 764                 setup_ok = 1;
 765         }
 766 }
 767
 768 static void s3cmci_send_command(struct s3cmci_host *host,
 769                                         struct mmc_command *cmd)
 770 {
 771         u32 ccon, imsk;
 772
 773         imsk  = S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_CMDTIMEOUT |
 774                 S3C2410_SDIIMSK_RESPONSEND | S3C2410_SDIIMSK_CMDSENT |
 775                 S3C2410_SDIIMSK_RESPONSECRC;
 776
 777         enable_imask(host, imsk);
 778
 779         if (cmd->data)
 780                 host->complete_what = COMPLETION_XFERFINISH_RSPFIN;
 781         else if (cmd->flags & MMC_RSP_PRESENT)
 782                 host->complete_what = COMPLETION_RSPFIN;
 783         else
 784                 host->complete_what = COMPLETION_CMDSENT;
 785
 786         writel(cmd->arg, host->base + S3C2410_SDICMDARG);
 787
 788         ccon  = cmd->opcode & S3C2410_SDICMDCON_INDEX;
 789         ccon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART;
 790
 791         if (cmd->flags & MMC_RSP_PRESENT)
 792                 ccon |= S3C2410_SDICMDCON_WAITRSP;
 793
 794         if (cmd->flags & MMC_RSP_136)
 795                 ccon |= S3C2410_SDICMDCON_LONGRSP;
 796
 797         writel(ccon, host->base + S3C2410_SDICMDCON);
 798 }
 799
 800 static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data)
 801 {
 802         u32 dcon, imsk, stoptries = 3;
 803
 804         /* write DCON register */
 805
 806         if (!data) {
 807                 writel(0, host->base + S3C2410_SDIDCON);
 808                 return 0;
 809         }
 810
 811         if ((data->blksz & 3) != 0) {
 812                 /* We cannot deal with unaligned blocks with more than
 813                  * one block being transfered. */
 814
 815                 if (data->blocks > 1)
 816                         return -EINVAL;
 817
 818                 /* No support yet for non-word block transfers. */
 819                 return -EINVAL;
 820         }
 821
 822         while (readl(host->base + S3C2410_SDIDSTA) &
 823                (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) {
 824
 825                 dbg(host, dbg_err,
 826                     "mci_setup_data() transfer stillin progress.\n");
 827
 828                 writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
 829                 s3cmci_reset(host);
 830
 831                 if ((stoptries--) == 0) {
 832                         dbg_dumpregs(host, "DRF");
 833                         return -EINVAL;
 834                 }
 835         }
 836
 837         dcon  = data->blocks & S3C2410_SDIDCON_BLKNUM_MASK;
 838
 839         if (host->dodma)
 840                 dcon |= S3C2410_SDIDCON_DMAEN;
 841
 842         if (host->bus_width == MMC_BUS_WIDTH_4)
 843                 dcon |= S3C2410_SDIDCON_WIDEBUS;
 844
 845         if (!(data->flags & MMC_DATA_STREAM))
 846                 dcon |= S3C2410_SDIDCON_BLOCKMODE;
 847
 848         if (data->flags & MMC_DATA_WRITE) {
 849                 dcon |= S3C2410_SDIDCON_TXAFTERRESP;
 850                 dcon |= S3C2410_SDIDCON_XFER_TXSTART;
 851         }
 852
 853         if (data->flags & MMC_DATA_READ) {
 854                 dcon |= S3C2410_SDIDCON_RXAFTERCMD;
 855                 dcon |= S3C2410_SDIDCON_XFER_RXSTART;
 856         }
 857
 858         if (host->is2440) {
 859                 dcon |= S3C2440_SDIDCON_DS_WORD;
 860                 dcon |= S3C2440_SDIDCON_DATSTART;
 861         }
 862
 863         writel(dcon, host->base + S3C2410_SDIDCON);
 864
 865         /* write BSIZE register */
 866
 867         writel(data->blksz, host->base + S3C2410_SDIBSIZE);
 868
 869         /* add to IMASK register */
 870         imsk = S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
 871                S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
 872
 873         enable_imask(host, imsk);
 874
 875         /* write TIMER register */
 876
 877         if (host->is2440) {
 878                 writel(0x007FFFFF, host->base + S3C2410_SDITIMER);
 879         } else {
 880                 writel(0x0000FFFF, host->base + S3C2410_SDITIMER);
 881
 882                 /* FIX: set slow clock to prevent timeouts on read */
 883                 if (data->flags & MMC_DATA_READ)
 884                         writel(0xFF, host->base + S3C2410_SDIPRE);
 885         }
 886
 887         return 0;
 888 }
 889
 890 #define BOTH_DIR (MMC_DATA_WRITE | MMC_DATA_READ)
 891
 892 static int s3cmci_prepare_pio(struct s3cmci_host *host, struct mmc_data *data)
 893 {
 894         int rw = (data->flags & MMC_DATA_WRITE) ? 1 : 0;
 895
 896         BUG_ON((data->flags & BOTH_DIR) == BOTH_DIR);
 897
 898         host->pio_sgptr = 0;
 899         host->pio_words = 0;
 900         host->pio_count = 0;
 901         host->pio_active = rw ? XFER_WRITE : XFER_READ;
 902
 903         if (rw) {
 904                 do_pio_write(host);
 905                 enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
 906         } else {
 907                 enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF
 908                              | S3C2410_SDIIMSK_RXFIFOLAST);
 909         }
 910
 911         return 0;
 912 }
 913
 914 static int s3cmci_prepare_dma(struct s3cmci_host *host, struct mmc_data *data)
 915 {
 916         int dma_len, i;
 917         int rw = (data->flags & MMC_DATA_WRITE) ? 1 : 0;
 918
 919         BUG_ON((data->flags & BOTH_DIR) == BOTH_DIR);
 920
 921         s3cmci_dma_setup(host, rw ? S3C2410_DMASRC_MEM : S3C2410_DMASRC_HW);
 922         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
 923
 924         dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
 925                              (rw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 926
 927         if (dma_len == 0)
 928                 return -ENOMEM;
 929
 930         host->dma_complete = 0;
 931         host->dmatogo = dma_len;
 932
 933         for (i = 0; i < dma_len; i++) {
 934                 int res;
 935
 936                 dbg(host, dbg_dma, "enqueue %i:%u@%u\n", i,
 937                         sg_dma_address(&data->sg[i]),
 938                         sg_dma_len(&data->sg[i]));
 939
 940                 res = s3c2410_dma_enqueue(host->dma, (void *) host,
 941                                           sg_dma_address(&data->sg[i]),
 942                                           sg_dma_len(&data->sg[i]));
 943
 944                 if (res) {
 945                         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
 946                         return -EBUSY;
 947                 }
 948         }
 949
 950         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_START);
 951
 952         return 0;
 953 }
 954
 955 static void s3cmci_send_request(struct mmc_host *mmc)
 956 {
 957         struct s3cmci_host *host = mmc_priv(mmc);
 958         struct mmc_request *mrq = host->mrq;
 959         struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
 960
 961         host->ccnt++;
 962         prepare_dbgmsg(host, cmd, host->cmd_is_stop);
 963
 964         /* Clear command, data and fifo status registers
 965            Fifo clear only necessary on 2440, but doesn't hurt on 2410
 966         */
 967         writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT);
 968         writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA);
 969         writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA);
 970
 971         if (cmd->data) {
 972                 int res = s3cmci_setup_data(host, cmd->data);
 973
 974                 host->dcnt++;
 975
 976                 if (res) {
 977                         dbg(host, dbg_err, "setup data error %d\n", res);
 978                         cmd->error = res;
 979                         cmd->data->error = res;
 980
 981                         mmc_request_done(mmc, mrq);
 982                         return;
 983                 }
 984
 985                 if (host->dodma)
 986                         res = s3cmci_prepare_dma(host, cmd->data);
 987                 else
 988                         res = s3cmci_prepare_pio(host, cmd->data);
 989
 990                 if (res) {
 991                         dbg(host, dbg_err, "data prepare error %d\n", res);
 992                         cmd->error = res;
 993                         cmd->data->error = res;
 994
 995                         mmc_request_done(mmc, mrq);
 996                         return;
 997                 }
 998         }
 999
1000         /* Send command */
1001         s3cmci_send_command(host, cmd);
1002
1003         /* Enable Interrupt */
1004         enable_irq(host->irq);
1005 }
1006
1007 static int s3cmci_card_present(struct mmc_host *mmc)
1008 {
1009         struct s3cmci_host *host = mmc_priv(mmc);
1010         struct s3c24xx_mci_pdata *pdata = host->pdata;
1011         int ret;
1012
1013         if (pdata->gpio_detect == 0)
1014                 return -ENOSYS;
1015
1016         ret = s3c2410_gpio_getpin(pdata->gpio_detect) ? 0 : 1;
1017         return ret ^ pdata->detect_invert;
1018 }
1019
1020 static void s3cmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1021 {
1022         struct s3cmci_host *host = mmc_priv(mmc);
1023
1024         host->status = "mmc request";
1025         host->cmd_is_stop = 0;
1026         host->mrq = mrq;
1027
1028         if (s3cmci_card_present(mmc) == 0) {
1029                 dbg(host, dbg_err, "%s: no medium present\n", __func__);
1030                 host->mrq->cmd->error = -ENOMEDIUM;
1031                 mmc_request_done(mmc, mrq);
1032         } else
1033                 s3cmci_send_request(mmc);
1034 }
1035
1036 static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1037 {
1038         struct s3cmci_host *host = mmc_priv(mmc);
1039         u32 mci_psc, mci_con;
1040
1041         /* Set the power state */
1042
1043         mci_con = readl(host->base + S3C2410_SDICON);
1044
1045         switch (ios->power_mode) {
1046         case MMC_POWER_ON:
1047         case MMC_POWER_UP:
1048                 s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_SDCLK);
1049                 s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_SDCMD);
1050                 s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_SDDAT0);
1051                 s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
1052                 s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_SDDAT2);
1053                 s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_SDDAT3);
1054
1055                 if (host->pdata->set_power)
1056                         host->pdata->set_power(ios->power_mode, ios->vdd);
1057
1058                 if (!host->is2440)
1059                         mci_con |= S3C2410_SDICON_FIFORESET;
1060
1061                 break;
1062
1063         case MMC_POWER_OFF:
1064         default:
1065                 s3c2410_gpio_setpin(S3C2410_GPE5, 0);
1066                 s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_OUTP);
1067
1068                 if (host->is2440)
1069                         mci_con |= S3C2440_SDICON_SDRESET;
1070
1071                 if (host->pdata->set_power)
1072                         host->pdata->set_power(ios->power_mode, ios->vdd);
1073
1074                 break;
1075         }
1076
1077         /* Set clock */
1078         for (mci_psc = 0; mci_psc < 255; mci_psc++) {
1079                 host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1));
1080
1081                 if (host->real_rate <= ios->clock)
1082                         break;
1083         }
1084
1085         if (mci_psc > 255)
1086                 mci_psc = 255;
1087
1088         host->prescaler = mci_psc;
1089         writel(host->prescaler, host->base + S3C2410_SDIPRE);
1090
1091         /* If requested clock is 0, real_rate will be 0, too */
1092         if (ios->clock == 0)
1093                 host->real_rate = 0;
1094
1095         /* Set CLOCK_ENABLE */
1096         if (ios->clock)
1097                 mci_con |= S3C2410_SDICON_CLOCKTYPE;
1098         else
1099                 mci_con &= ~S3C2410_SDICON_CLOCKTYPE;
1100
1101         writel(mci_con, host->base + S3C2410_SDICON);
1102
1103         if ((ios->power_mode == MMC_POWER_ON) ||
1104             (ios->power_mode == MMC_POWER_UP)) {
1105                 dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n",
1106                         host->real_rate/1000, ios->clock/1000);
1107         } else {
1108                 dbg(host, dbg_conf, "powered down.\n");
1109         }
1110
1111         host->bus_width = ios->bus_width;
1112 }
1113
1114 static void s3cmci_reset(struct s3cmci_host *host)
1115 {
1116         u32 con = readl(host->base + S3C2410_SDICON);
1117
1118         con |= S3C2440_SDICON_SDRESET;
1119         writel(con, host->base + S3C2410_SDICON);
1120 }
1121
1122 static int s3cmci_get_ro(struct mmc_host *mmc)
1123 {
1124         struct s3cmci_host *host = mmc_priv(mmc);
1125         struct s3c24xx_mci_pdata *pdata = host->pdata;
1126         int ret;
1127
1128         if (pdata->gpio_wprotect == 0)
1129                 return 0;
1130
1131         ret = s3c2410_gpio_getpin(pdata->gpio_wprotect);
1132
1133         if (pdata->wprotect_invert)
1134                 ret = !ret;
1135
1136         return ret;
1137 }
1138
1139 static struct mmc_host_ops s3cmci_ops = {
1140         .request        = s3cmci_request,
1141         .set_ios        = s3cmci_set_ios,
1142         .get_ro         = s3cmci_get_ro,
1143         .get_cd         = s3cmci_card_present,
1144 };
1145
1146 static struct s3c24xx_mci_pdata s3cmci_def_pdata = {
1147         /* This is currently here to avoid a number of if (host->pdata)
1148          * checks. Any zero fields to ensure reaonable defaults are picked. */
1149 };
1150
1151 static int __devinit s3cmci_probe(struct platform_device *pdev, int is2440)
1152 {
1153         struct s3cmci_host *host;
1154         struct mmc_host *mmc;
1155         int ret;
1156
1157         mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
1158         if (!mmc) {
1159                 ret = -ENOMEM;
1160                 goto probe_out;
1161         }
1162
1163         host = mmc_priv(mmc);
1164         host->mmc       = mmc;
1165         host->pdev      = pdev;
1166         host->is2440    = is2440;
1167
1168         host->pdata = pdev->dev.platform_data;
1169         if (!host->pdata) {
1170                 pdev->dev.platform_data = &s3cmci_def_pdata;
1171                 host->pdata = &s3cmci_def_pdata;
1172         }
1173
1174         spin_lock_init(&host->complete_lock);
1175         tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
1176
1177         if (is2440) {
1178                 host->sdiimsk   = S3C2440_SDIIMSK;
1179                 host->sdidata   = S3C2440_SDIDATA;
1180                 host->clk_div   = 1;
1181         } else {
1182                 host->sdiimsk   = S3C2410_SDIIMSK;
1183                 host->sdidata   = S3C2410_SDIDATA;
1184                 host->clk_div   = 2;
1185         }
1186
1187         host->dodma             = 0;
1188         host->complete_what     = COMPLETION_NONE;
1189         host->pio_active        = XFER_NONE;
1190
1191         host->dma               = S3CMCI_DMA;
1192
1193         host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1194         if (!host->mem) {
1195                 dev_err(&pdev->dev,
1196                         "failed to get io memory region resouce.\n");
1197
1198                 ret = -ENOENT;
1199                 goto probe_free_host;
1200         }
1201
1202         host->mem = request_mem_region(host->mem->start,
1203                                        RESSIZE(host->mem), pdev->name);
1204
1205         if (!host->mem) {
1206                 dev_err(&pdev->dev, "failed to request io memory region.\n");
1207                 ret = -ENOENT;
1208                 goto probe_free_host;
1209         }
1210
1211         host->base = ioremap(host->mem->start, RESSIZE(host->mem));
1212         if (!host->base) {
1213                 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
1214                 ret = -EINVAL;
1215                 goto probe_free_mem_region;
1216         }
1217
1218         host->irq = platform_get_irq(pdev, 0);
1219         if (host->irq == 0) {
1220                 dev_err(&pdev->dev, "failed to get interrupt resouce.\n");
1221                 ret = -EINVAL;
1222                 goto probe_iounmap;
1223         }
1224
1225         if (request_irq(host->irq, s3cmci_irq, 0, DRIVER_NAME, host)) {
1226                 dev_err(&pdev->dev, "failed to request mci interrupt.\n");
1227                 ret = -ENOENT;
1228                 goto probe_iounmap;
1229         }
1230
1231         /* We get spurious interrupts even when we have set the IMSK
1232          * register to ignore everything, so use disable_irq() to make
1233          * ensure we don't lock the system with un-serviceable requests. */
1234
1235         disable_irq(host->irq);
1236
1237         host->irq_cd = s3c2410_gpio_getirq(host->pdata->gpio_detect);
1238
1239         if (host->irq_cd >= 0) {
1240                 if (request_irq(host->irq_cd, s3cmci_irq_cd,
1241                                 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
1242                                 DRIVER_NAME, host)) {
1243                         dev_err(&pdev->dev, "can't get card detect irq.\n");
1244                         ret = -ENOENT;
1245                         goto probe_free_irq;
1246                 }
1247         } else {
1248                 dev_warn(&pdev->dev, "host detect has no irq available\n");
1249                 s3c2410_gpio_cfgpin(host->pdata->gpio_detect,
1250                                     S3C2410_GPIO_INPUT);
1251         }
1252
1253         if (host->pdata->gpio_wprotect)
1254                 s3c2410_gpio_cfgpin(host->pdata->gpio_wprotect,
1255                                     S3C2410_GPIO_INPUT);
1256
1257         if (s3c2410_dma_request(S3CMCI_DMA, &s3cmci_dma_client, NULL) < 0) {
1258                 dev_err(&pdev->dev, "unable to get DMA channel.\n");
1259                 ret = -EBUSY;
1260                 goto probe_free_irq_cd;
1261         }
1262
1263         host->clk = clk_get(&pdev->dev, "sdi");
1264         if (IS_ERR(host->clk)) {
1265                 dev_err(&pdev->dev, "failed to find clock source.\n");
1266                 ret = PTR_ERR(host->clk);
1267                 host->clk = NULL;
1268                 goto probe_free_host;
1269         }
1270
1271         ret = clk_enable(host->clk);
1272         if (ret) {
1273                 dev_err(&pdev->dev, "failed to enable clock source.\n");
1274                 goto clk_free;
1275         }
1276
1277         host->clk_rate = clk_get_rate(host->clk);
1278
1279         mmc->ops        = &s3cmci_ops;
1280         mmc->ocr_avail  = MMC_VDD_32_33 | MMC_VDD_33_34;
1281         mmc->caps       = MMC_CAP_4_BIT_DATA;
1282         mmc->f_min      = host->clk_rate / (host->clk_div * 256);
1283         mmc->f_max      = host->clk_rate / host->clk_div;
1284
1285         if (host->pdata->ocr_avail)
1286                 mmc->ocr_avail = host->pdata->ocr_avail;
1287
1288         mmc->max_blk_count      = 4095;
1289         mmc->max_blk_size       = 4095;
1290         mmc->max_req_size       = 4095 * 512;
1291         mmc->max_seg_size       = mmc->max_req_size;
1292
1293         mmc->max_phys_segs      = 128;
1294         mmc->max_hw_segs        = 128;
1295
1296         dbg(host, dbg_debug,
1297             "probe: mode:%s mapped mci_base:%p irq:%u irq_cd:%u dma:%u.\n",
1298             (host->is2440?"2440":""),
1299             host->base, host->irq, host->irq_cd, host->dma);
1300
1301         ret = mmc_add_host(mmc);
1302         if (ret) {
1303                 dev_err(&pdev->dev, "failed to add mmc host.\n");
1304                 goto free_dmabuf;
1305         }
1306
1307         platform_set_drvdata(pdev, mmc);
1308         dev_info(&pdev->dev, "initialisation done.\n");
1309
1310         return 0;
1311
1312  free_dmabuf:
1313         clk_disable(host->clk);
1314
1315  clk_free:
1316         clk_put(host->clk);
1317
1318  probe_free_irq_cd:
1319         if (host->irq_cd >= 0)
1320                 free_irq(host->irq_cd, host);
1321
1322  probe_free_irq:
1323         free_irq(host->irq, host);
1324
1325  probe_iounmap:
1326         iounmap(host->base);
1327
1328  probe_free_mem_region:
1329         release_mem_region(host->mem->start, RESSIZE(host->mem));
1330
1331  probe_free_host:
1332         mmc_free_host(mmc);
1333  probe_out:
1334         return ret;
1335 }
1336
1337 static void s3cmci_shutdown(struct platform_device *pdev)
1338 {
1339         struct mmc_host *mmc = platform_get_drvdata(pdev);
1340         struct s3cmci_host *host = mmc_priv(mmc);
1341
1342         if (host->irq_cd >= 0)
1343                 free_irq(host->irq_cd, host);
1344
1345         mmc_remove_host(mmc);
1346         clk_disable(host->clk);
1347 }
1348
1349 static int __devexit s3cmci_remove(struct platform_device *pdev)
1350 {
1351         struct mmc_host         *mmc  = platform_get_drvdata(pdev);
1352         struct s3cmci_host      *host = mmc_priv(mmc);
1353
1354         s3cmci_shutdown(pdev);
1355
1356         clk_put(host->clk);
1357
1358         tasklet_disable(&host->pio_tasklet);
1359         s3c2410_dma_free(S3CMCI_DMA, &s3cmci_dma_client);
1360
1361         free_irq(host->irq, host);
1362
1363         iounmap(host->base);
1364         release_mem_region(host->mem->start, RESSIZE(host->mem));
1365
1366         mmc_free_host(mmc);
1367         return 0;
1368 }
1369
1370 static int __devinit s3cmci_2410_probe(struct platform_device *dev)
1371 {
1372         return s3cmci_probe(dev, 0);
1373 }
1374
1375 static int __devinit s3cmci_2412_probe(struct platform_device *dev)
1376 {
1377         return s3cmci_probe(dev, 1);
1378 }
1379
1380 static int __devinit s3cmci_2440_probe(struct platform_device *dev)
1381 {
1382         return s3cmci_probe(dev, 1);
1383 }
1384
1385 #ifdef CONFIG_PM
1386
1387 static int s3cmci_suspend(struct platform_device *dev, pm_message_t state)
1388 {
1389         struct mmc_host *mmc = platform_get_drvdata(dev);
1390
1391         return  mmc_suspend_host(mmc, state);
1392 }
1393
1394 static int s3cmci_resume(struct platform_device *dev)
1395 {
1396         struct mmc_host *mmc = platform_get_drvdata(dev);
1397
1398         return mmc_resume_host(mmc);
1399 }
1400
1401 #else /* CONFIG_PM */
1402 #define s3cmci_suspend NULL
1403 #define s3cmci_resume NULL
1404 #endif /* CONFIG_PM */
1405
1406
1407 static struct platform_driver s3cmci_2410_driver = {
1408         .driver.name    = "s3c2410-sdi",
1409         .driver.owner   = THIS_MODULE,
1410         .probe          = s3cmci_2410_probe,
1411         .remove         = __devexit_p(s3cmci_remove),
1412         .shutdown       = s3cmci_shutdown,
1413         .suspend        = s3cmci_suspend,
1414         .resume         = s3cmci_resume,
1415 };
1416
1417 static struct platform_driver s3cmci_2412_driver = {
1418         .driver.name    = "s3c2412-sdi",
1419         .driver.owner   = THIS_MODULE,
1420         .probe          = s3cmci_2412_probe,
1421         .remove         = __devexit_p(s3cmci_remove),
1422         .shutdown       = s3cmci_shutdown,
1423         .suspend        = s3cmci_suspend,
1424         .resume         = s3cmci_resume,
1425 };
1426
1427 static struct platform_driver s3cmci_2440_driver = {
1428         .driver.name    = "s3c2440-sdi",
1429         .driver.owner   = THIS_MODULE,
1430         .probe          = s3cmci_2440_probe,
1431         .remove         = __devexit_p(s3cmci_remove),
1432         .shutdown       = s3cmci_shutdown,
1433         .suspend        = s3cmci_suspend,
1434         .resume         = s3cmci_resume,
1435 };
1436
1437
1438 static int __init s3cmci_init(void)
1439 {
1440         platform_driver_register(&s3cmci_2410_driver);
1441         platform_driver_register(&s3cmci_2412_driver);
1442         platform_driver_register(&s3cmci_2440_driver);
1443         return 0;
1444 }
1445
1446 static void __exit s3cmci_exit(void)
1447 {
1448         platform_driver_unregister(&s3cmci_2410_driver);
1449         platform_driver_unregister(&s3cmci_2412_driver);
1450         platform_driver_unregister(&s3cmci_2440_driver);
1451 }
1452
1453 module_init(s3cmci_init);
1454 module_exit(s3cmci_exit);
1455
1456 MODULE_DESCRIPTION("Samsung S3C MMC/SD Card Interface driver");
1457 MODULE_LICENSE("GPL v2");
1458 MODULE_AUTHOR("Thomas Kleffel <tk@maintech.de>");
1459 MODULE_ALIAS("platform:s3c2410-sdi");
1460 MODULE_ALIAS("platform:s3c2412-sdi");
1461 MODULE_ALIAS("platform:s3c2440-sdi");