git.oblomov.eu Git - linux-2.6/blob - drivers/infiniband/hw/ehca/ehca_qp.c

   1 /*
   2  *  IBM eServer eHCA Infiniband device driver for Linux on POWER
   3  *
   4  *  QP functions
   5  *
   6  *  Authors: Joachim Fenkes <fenkes@de.ibm.com>
   7  *           Stefan Roscher <stefan.roscher@de.ibm.com>
   8  *           Waleri Fomin <fomin@de.ibm.com>
   9  *           Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  10  *           Reinhard Ernst <rernst@de.ibm.com>
  11  *           Heiko J Schick <schickhj@de.ibm.com>
  12  *
  13  *  Copyright (c) 2005 IBM Corporation
  14  *
  15  *  All rights reserved.
  16  *
  17  *  This source code is distributed under a dual license of GPL v2.0 and OpenIB
  18  *  BSD.
  19  *
  20  * OpenIB BSD License
  21  *
  22  * Redistribution and use in source and binary forms, with or without
  23  * modification, are permitted provided that the following conditions are met:
  24  *
  25  * Redistributions of source code must retain the above copyright notice, this
  26  * list of conditions and the following disclaimer.
  27  *
  28  * Redistributions in binary form must reproduce the above copyright notice,
  29  * this list of conditions and the following disclaimer in the documentation
  30  * and/or other materials
  31  * provided with the distribution.
  32  *
  33  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  34  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  36  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  37  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  40  * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  41  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  43  * POSSIBILITY OF SUCH DAMAGE.
  44  */
  45
  46
  47 #include <asm/current.h>
  48
  49 #include "ehca_classes.h"
  50 #include "ehca_tools.h"
  51 #include "ehca_qes.h"
  52 #include "ehca_iverbs.h"
  53 #include "hcp_if.h"
  54 #include "hipz_fns.h"
  55
  56 static struct kmem_cache *qp_cache;
  57
  58 /*
  59  * attributes not supported by query qp
  60  */
  61 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
  62                                      IB_QP_MAX_QP_RD_ATOMIC   | \
  63                                      IB_QP_ACCESS_FLAGS       | \
  64                                      IB_QP_EN_SQD_ASYNC_NOTIFY)
  65
  66 /*
  67  * ehca (internal) qp state values
  68  */
  69 enum ehca_qp_state {
  70         EHCA_QPS_RESET = 1,
  71         EHCA_QPS_INIT = 2,
  72         EHCA_QPS_RTR = 3,
  73         EHCA_QPS_RTS = 5,
  74         EHCA_QPS_SQD = 6,
  75         EHCA_QPS_SQE = 8,
  76         EHCA_QPS_ERR = 128
  77 };
  78
  79 /*
  80  * qp state transitions as defined by IB Arch Rel 1.1 page 431
  81  */
  82 enum ib_qp_statetrans {
  83         IB_QPST_ANY2RESET,
  84         IB_QPST_ANY2ERR,
  85         IB_QPST_RESET2INIT,
  86         IB_QPST_INIT2RTR,
  87         IB_QPST_INIT2INIT,
  88         IB_QPST_RTR2RTS,
  89         IB_QPST_RTS2SQD,
  90         IB_QPST_RTS2RTS,
  91         IB_QPST_SQD2RTS,
  92         IB_QPST_SQE2RTS,
  93         IB_QPST_SQD2SQD,
  94         IB_QPST_MAX     /* nr of transitions, this must be last!!! */
  95 };
  96
  97 /*
  98  * ib2ehca_qp_state maps IB to ehca qp_state
  99  * returns ehca qp state corresponding to given ib qp state
 100  */
 101 static inline enum ehca_qp_state ib2ehca_qp_state(enum ib_qp_state ib_qp_state)
 102 {
 103         switch (ib_qp_state) {
 104         case IB_QPS_RESET:
 105                 return EHCA_QPS_RESET;
 106         case IB_QPS_INIT:
 107                 return EHCA_QPS_INIT;
 108         case IB_QPS_RTR:
 109                 return EHCA_QPS_RTR;
 110         case IB_QPS_RTS:
 111                 return EHCA_QPS_RTS;
 112         case IB_QPS_SQD:
 113                 return EHCA_QPS_SQD;
 114         case IB_QPS_SQE:
 115                 return EHCA_QPS_SQE;
 116         case IB_QPS_ERR:
 117                 return EHCA_QPS_ERR;
 118         default:
 119                 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state);
 120                 return -EINVAL;
 121         }
 122 }
 123
 124 /*
 125  * ehca2ib_qp_state maps ehca to IB qp_state
 126  * returns ib qp state corresponding to given ehca qp state
 127  */
 128 static inline enum ib_qp_state ehca2ib_qp_state(enum ehca_qp_state
 129                                                 ehca_qp_state)
 130 {
 131         switch (ehca_qp_state) {
 132         case EHCA_QPS_RESET:
 133                 return IB_QPS_RESET;
 134         case EHCA_QPS_INIT:
 135                 return IB_QPS_INIT;
 136         case EHCA_QPS_RTR:
 137                 return IB_QPS_RTR;
 138         case EHCA_QPS_RTS:
 139                 return IB_QPS_RTS;
 140         case EHCA_QPS_SQD:
 141                 return IB_QPS_SQD;
 142         case EHCA_QPS_SQE:
 143                 return IB_QPS_SQE;
 144         case EHCA_QPS_ERR:
 145                 return IB_QPS_ERR;
 146         default:
 147                 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state);
 148                 return -EINVAL;
 149         }
 150 }
 151
 152 /*
 153  * ehca_qp_type used as index for req_attr and opt_attr of
 154  * struct ehca_modqp_statetrans
 155  */
 156 enum ehca_qp_type {
 157         QPT_RC = 0,
 158         QPT_UC = 1,
 159         QPT_UD = 2,
 160         QPT_SQP = 3,
 161         QPT_MAX
 162 };
 163
 164 /*
 165  * ib2ehcaqptype maps Ib to ehca qp_type
 166  * returns ehca qp type corresponding to ib qp type
 167  */
 168 static inline enum ehca_qp_type ib2ehcaqptype(enum ib_qp_type ibqptype)
 169 {
 170         switch (ibqptype) {
 171         case IB_QPT_SMI:
 172         case IB_QPT_GSI:
 173                 return QPT_SQP;
 174         case IB_QPT_RC:
 175                 return QPT_RC;
 176         case IB_QPT_UC:
 177                 return QPT_UC;
 178         case IB_QPT_UD:
 179                 return QPT_UD;
 180         default:
 181                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 182                 return -EINVAL;
 183         }
 184 }
 185
 186 static inline enum ib_qp_statetrans get_modqp_statetrans(int ib_fromstate,
 187                                                          int ib_tostate)
 188 {
 189         int index = -EINVAL;
 190         switch (ib_tostate) {
 191         case IB_QPS_RESET:
 192                 index = IB_QPST_ANY2RESET;
 193                 break;
 194         case IB_QPS_INIT:
 195                 switch (ib_fromstate) {
 196                 case IB_QPS_RESET:
 197                         index = IB_QPST_RESET2INIT;
 198                         break;
 199                 case IB_QPS_INIT:
 200                         index = IB_QPST_INIT2INIT;
 201                         break;
 202                 }
 203                 break;
 204         case IB_QPS_RTR:
 205                 if (ib_fromstate == IB_QPS_INIT)
 206                         index = IB_QPST_INIT2RTR;
 207                 break;
 208         case IB_QPS_RTS:
 209                 switch (ib_fromstate) {
 210                 case IB_QPS_RTR:
 211                         index = IB_QPST_RTR2RTS;
 212                         break;
 213                 case IB_QPS_RTS:
 214                         index = IB_QPST_RTS2RTS;
 215                         break;
 216                 case IB_QPS_SQD:
 217                         index = IB_QPST_SQD2RTS;
 218                         break;
 219                 case IB_QPS_SQE:
 220                         index = IB_QPST_SQE2RTS;
 221                         break;
 222                 }
 223                 break;
 224         case IB_QPS_SQD:
 225                 if (ib_fromstate == IB_QPS_RTS)
 226                         index = IB_QPST_RTS2SQD;
 227                 break;
 228         case IB_QPS_SQE:
 229                 break;
 230         case IB_QPS_ERR:
 231                 index = IB_QPST_ANY2ERR;
 232                 break;
 233         default:
 234                 break;
 235         }
 236         return index;
 237 }
 238
 239 /*
 240  * ibqptype2servicetype returns hcp service type corresponding to given
 241  * ib qp type used by create_qp()
 242  */
 243 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype)
 244 {
 245         switch (ibqptype) {
 246         case IB_QPT_SMI:
 247         case IB_QPT_GSI:
 248                 return ST_UD;
 249         case IB_QPT_RC:
 250                 return ST_RC;
 251         case IB_QPT_UC:
 252                 return ST_UC;
 253         case IB_QPT_UD:
 254                 return ST_UD;
 255         case IB_QPT_RAW_IPV6:
 256                 return -EINVAL;
 257         case IB_QPT_RAW_ETY:
 258                 return -EINVAL;
 259         default:
 260                 ehca_gen_err("Invalid ibqptype=%x", ibqptype);
 261                 return -EINVAL;
 262         }
 263 }
 264
 265 /*
 266  * init userspace queue info from ipz_queue data
 267  */
 268 static inline void queue2resp(struct ipzu_queue_resp *resp,
 269                               struct ipz_queue *queue)
 270 {
 271         resp->qe_size = queue->qe_size;
 272         resp->act_nr_of_sg = queue->act_nr_of_sg;
 273         resp->queue_length = queue->queue_length;
 274         resp->pagesize = queue->pagesize;
 275         resp->toggle_state = queue->toggle_state;
 276 }
 277
 278 /*
 279  * init_qp_queue initializes/constructs r/squeue and registers queue pages.
 280  */
 281 static inline int init_qp_queue(struct ehca_shca *shca,
 282                                 struct ehca_pd *pd,
 283                                 struct ehca_qp *my_qp,
 284                                 struct ipz_queue *queue,
 285                                 int q_type,
 286                                 u64 expected_hret,
 287                                 struct ehca_alloc_queue_parms *parms,
 288                                 int wqe_size)
 289 {
 290         int ret, cnt, ipz_rc, nr_q_pages;
 291         void *vpage;
 292         u64 rpage, h_ret;
 293         struct ib_device *ib_dev = &shca->ib_device;
 294         struct ipz_adapter_handle ipz_hca_handle = shca->ipz_hca_handle;
 295
 296         if (!parms->queue_size)
 297                 return 0;
 298
 299         if (parms->is_small) {
 300                 nr_q_pages = 1;
 301                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 302                                         128 << parms->page_size,
 303                                         wqe_size, parms->act_nr_sges, 1);
 304         } else {
 305                 nr_q_pages = parms->queue_size;
 306                 ipz_rc = ipz_queue_ctor(pd, queue, nr_q_pages,
 307                                         EHCA_PAGESIZE, wqe_size,
 308                                         parms->act_nr_sges, 0);
 309         }
 310
 311         if (!ipz_rc) {
 312                 ehca_err(ib_dev, "Cannot allocate page for queue. ipz_rc=%x",
 313                          ipz_rc);
 314                 return -EBUSY;
 315         }
 316
 317         /* register queue pages */
 318         for (cnt = 0; cnt < nr_q_pages; cnt++) {
 319                 vpage = ipz_qpageit_get_inc(queue);
 320                 if (!vpage) {
 321                         ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 322                                  "failed p_vpage= %p", vpage);
 323                         ret = -EINVAL;
 324                         goto init_qp_queue1;
 325                 }
 326                 rpage = virt_to_abs(vpage);
 327
 328                 h_ret = hipz_h_register_rpage_qp(ipz_hca_handle,
 329                                                  my_qp->ipz_qp_handle,
 330                                                  NULL, 0, q_type,
 331                                                  rpage, parms->is_small ? 0 : 1,
 332                                                  my_qp->galpas.kernel);
 333                 if (cnt == (nr_q_pages - 1)) {  /* last page! */
 334                         if (h_ret != expected_hret) {
 335                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 336                                          "h_ret= %lx ", h_ret);
 337                                 ret = ehca2ib_return_code(h_ret);
 338                                 goto init_qp_queue1;
 339                         }
 340                         vpage = ipz_qpageit_get_inc(&my_qp->ipz_rqueue);
 341                         if (vpage) {
 342                                 ehca_err(ib_dev, "ipz_qpageit_get_inc() "
 343                                          "should not succeed vpage=%p", vpage);
 344                                 ret = -EINVAL;
 345                                 goto init_qp_queue1;
 346                         }
 347                 } else {
 348                         if (h_ret != H_PAGE_REGISTERED) {
 349                                 ehca_err(ib_dev, "hipz_qp_register_rpage() "
 350                                          "h_ret= %lx ", h_ret);
 351                                 ret = ehca2ib_return_code(h_ret);
 352                                 goto init_qp_queue1;
 353                         }
 354                 }
 355         }
 356
 357         ipz_qeit_reset(queue);
 358
 359         return 0;
 360
 361 init_qp_queue1:
 362         ipz_queue_dtor(pd, queue);
 363         return ret;
 364 }
 365
 366 static inline int ehca_calc_wqe_size(int act_nr_sge, int is_llqp)
 367 {
 368         if (is_llqp)
 369                 return 128 << act_nr_sge;
 370         else
 371                 return offsetof(struct ehca_wqe,
 372                                 u.nud.sg_list[act_nr_sge]);
 373 }
 374
 375 static void ehca_determine_small_queue(struct ehca_alloc_queue_parms *queue,
 376                                        int req_nr_sge, int is_llqp)
 377 {
 378         u32 wqe_size, q_size;
 379         int act_nr_sge = req_nr_sge;
 380
 381         if (!is_llqp)
 382                 /* round up #SGEs so WQE size is a power of 2 */
 383                 for (act_nr_sge = 4; act_nr_sge <= 252;
 384                      act_nr_sge = 4 + 2 * act_nr_sge)
 385                         if (act_nr_sge >= req_nr_sge)
 386                                 break;
 387
 388         wqe_size = ehca_calc_wqe_size(act_nr_sge, is_llqp);
 389         q_size = wqe_size * (queue->max_wr + 1);
 390
 391         if (q_size <= 512)
 392                 queue->page_size = 2;
 393         else if (q_size <= 1024)
 394                 queue->page_size = 3;
 395         else
 396                 queue->page_size = 0;
 397
 398         queue->is_small = (queue->page_size != 0);
 399 }
 400
 401 /*
 402  * Create an ib_qp struct that is either a QP or an SRQ, depending on
 403  * the value of the is_srq parameter. If init_attr and srq_init_attr share
 404  * fields, the field out of init_attr is used.
 405  */
 406 static struct ehca_qp *internal_create_qp(
 407         struct ib_pd *pd,
 408         struct ib_qp_init_attr *init_attr,
 409         struct ib_srq_init_attr *srq_init_attr,
 410         struct ib_udata *udata, int is_srq)
 411 {
 412         struct ehca_qp *my_qp;
 413         struct ehca_pd *my_pd = container_of(pd, struct ehca_pd, ib_pd);
 414         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 415                                               ib_device);
 416         struct ib_ucontext *context = NULL;
 417         u64 h_ret;
 418         int is_llqp = 0, has_srq = 0;
 419         int qp_type, max_send_sge, max_recv_sge, ret;
 420
 421         /* h_call's out parameters */
 422         struct ehca_alloc_qp_parms parms;
 423         u32 swqe_size = 0, rwqe_size = 0, ib_qp_num;
 424         unsigned long flags;
 425
 426         memset(&parms, 0, sizeof(parms));
 427         qp_type = init_attr->qp_type;
 428
 429         if (init_attr->sq_sig_type != IB_SIGNAL_REQ_WR &&
 430                 init_attr->sq_sig_type != IB_SIGNAL_ALL_WR) {
 431                 ehca_err(pd->device, "init_attr->sg_sig_type=%x not allowed",
 432                          init_attr->sq_sig_type);
 433                 return ERR_PTR(-EINVAL);
 434         }
 435
 436         /* save LLQP info */
 437         if (qp_type & 0x80) {
 438                 is_llqp = 1;
 439                 parms.ext_type = EQPT_LLQP;
 440                 parms.ll_comp_flags = qp_type & LLQP_COMP_MASK;
 441         }
 442         qp_type &= 0x1F;
 443         init_attr->qp_type &= 0x1F;
 444
 445         /* handle SRQ base QPs */
 446         if (init_attr->srq) {
 447                 struct ehca_qp *my_srq =
 448                         container_of(init_attr->srq, struct ehca_qp, ib_srq);
 449
 450                 has_srq = 1;
 451                 parms.ext_type = EQPT_SRQBASE;
 452                 parms.srq_qpn = my_srq->real_qp_num;
 453                 parms.srq_token = my_srq->token;
 454         }
 455
 456         if (is_llqp && has_srq) {
 457                 ehca_err(pd->device, "LLQPs can't have an SRQ");
 458                 return ERR_PTR(-EINVAL);
 459         }
 460
 461         /* handle SRQs */
 462         if (is_srq) {
 463                 parms.ext_type = EQPT_SRQ;
 464                 parms.srq_limit = srq_init_attr->attr.srq_limit;
 465                 if (init_attr->cap.max_recv_sge > 3) {
 466                         ehca_err(pd->device, "no more than three SGEs "
 467                                  "supported for SRQ  pd=%p  max_sge=%x",
 468                                  pd, init_attr->cap.max_recv_sge);
 469                         return ERR_PTR(-EINVAL);
 470                 }
 471         }
 472
 473         /* check QP type */
 474         if (qp_type != IB_QPT_UD &&
 475             qp_type != IB_QPT_UC &&
 476             qp_type != IB_QPT_RC &&
 477             qp_type != IB_QPT_SMI &&
 478             qp_type != IB_QPT_GSI) {
 479                 ehca_err(pd->device, "wrong QP Type=%x", qp_type);
 480                 return ERR_PTR(-EINVAL);
 481         }
 482
 483         if (is_llqp) {
 484                 switch (qp_type) {
 485                 case IB_QPT_RC:
 486                         if ((init_attr->cap.max_send_wr > 255) ||
 487                             (init_attr->cap.max_recv_wr > 255)) {
 488                                 ehca_err(pd->device,
 489                                          "Invalid Number of max_sq_wr=%x "
 490                                          "or max_rq_wr=%x for RC LLQP",
 491                                          init_attr->cap.max_send_wr,
 492                                          init_attr->cap.max_recv_wr);
 493                                 return ERR_PTR(-EINVAL);
 494                         }
 495                         break;
 496                 case IB_QPT_UD:
 497                         if (!EHCA_BMASK_GET(HCA_CAP_UD_LL_QP, shca->hca_cap)) {
 498                                 ehca_err(pd->device, "UD LLQP not supported "
 499                                          "by this adapter");
 500                                 return ERR_PTR(-ENOSYS);
 501                         }
 502                         if (!(init_attr->cap.max_send_sge <= 5
 503                             && init_attr->cap.max_send_sge >= 1
 504                             && init_attr->cap.max_recv_sge <= 5
 505                             && init_attr->cap.max_recv_sge >= 1)) {
 506                                 ehca_err(pd->device,
 507                                          "Invalid Number of max_send_sge=%x "
 508                                          "or max_recv_sge=%x for UD LLQP",
 509                                          init_attr->cap.max_send_sge,
 510                                          init_attr->cap.max_recv_sge);
 511                                 return ERR_PTR(-EINVAL);
 512                         } else if (init_attr->cap.max_send_wr > 255) {
 513                                 ehca_err(pd->device,
 514                                          "Invalid Number of "
 515                                          "ax_send_wr=%x for UD QP_TYPE=%x",
 516                                          init_attr->cap.max_send_wr, qp_type);
 517                                 return ERR_PTR(-EINVAL);
 518                         }
 519                         break;
 520                 default:
 521                         ehca_err(pd->device, "unsupported LL QP Type=%x",
 522                                  qp_type);
 523                         return ERR_PTR(-EINVAL);
 524                         break;
 525                 }
 526         }
 527
 528         if (pd->uobject && udata)
 529                 context = pd->uobject->context;
 530
 531         my_qp = kmem_cache_zalloc(qp_cache, GFP_KERNEL);
 532         if (!my_qp) {
 533                 ehca_err(pd->device, "pd=%p not enough memory to alloc qp", pd);
 534                 return ERR_PTR(-ENOMEM);
 535         }
 536
 537         spin_lock_init(&my_qp->spinlock_s);
 538         spin_lock_init(&my_qp->spinlock_r);
 539         my_qp->qp_type = qp_type;
 540         my_qp->ext_type = parms.ext_type;
 541
 542         if (init_attr->recv_cq)
 543                 my_qp->recv_cq =
 544                         container_of(init_attr->recv_cq, struct ehca_cq, ib_cq);
 545         if (init_attr->send_cq)
 546                 my_qp->send_cq =
 547                         container_of(init_attr->send_cq, struct ehca_cq, ib_cq);
 548
 549         do {
 550                 if (!idr_pre_get(&ehca_qp_idr, GFP_KERNEL)) {
 551                         ret = -ENOMEM;
 552                         ehca_err(pd->device, "Can't reserve idr resources.");
 553                         goto create_qp_exit0;
 554                 }
 555
 556                 write_lock_irqsave(&ehca_qp_idr_lock, flags);
 557                 ret = idr_get_new(&ehca_qp_idr, my_qp, &my_qp->token);
 558                 write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 559
 560         } while (ret == -EAGAIN);
 561
 562         if (ret) {
 563                 ret = -ENOMEM;
 564                 ehca_err(pd->device, "Can't allocate new idr entry.");
 565                 goto create_qp_exit0;
 566         }
 567
 568         parms.servicetype = ibqptype2servicetype(qp_type);
 569         if (parms.servicetype < 0) {
 570                 ret = -EINVAL;
 571                 ehca_err(pd->device, "Invalid qp_type=%x", qp_type);
 572                 goto create_qp_exit0;
 573         }
 574
 575         if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR)
 576                 parms.sigtype = HCALL_SIGT_EVERY;
 577         else
 578                 parms.sigtype = HCALL_SIGT_BY_WQE;
 579
 580         /* UD_AV CIRCUMVENTION */
 581         max_send_sge = init_attr->cap.max_send_sge;
 582         max_recv_sge = init_attr->cap.max_recv_sge;
 583         if (parms.servicetype == ST_UD && !is_llqp) {
 584                 max_send_sge += 2;
 585                 max_recv_sge += 2;
 586         }
 587
 588         parms.token = my_qp->token;
 589         parms.eq_handle = shca->eq.ipz_eq_handle;
 590         parms.pd = my_pd->fw_pd;
 591         if (my_qp->send_cq)
 592                 parms.send_cq_handle = my_qp->send_cq->ipz_cq_handle;
 593         if (my_qp->recv_cq)
 594                 parms.recv_cq_handle = my_qp->recv_cq->ipz_cq_handle;
 595
 596         parms.squeue.max_wr = init_attr->cap.max_send_wr;
 597         parms.rqueue.max_wr = init_attr->cap.max_recv_wr;
 598         parms.squeue.max_sge = max_send_sge;
 599         parms.rqueue.max_sge = max_recv_sge;
 600
 601         if (EHCA_BMASK_GET(HCA_CAP_MINI_QP, shca->hca_cap)
 602             && !(context && udata)) { /* no small QP support in userspace ATM */
 603                 if (HAS_SQ(my_qp))
 604                         ehca_determine_small_queue(
 605                                 &parms.squeue, max_send_sge, is_llqp);
 606                 if (HAS_RQ(my_qp))
 607                         ehca_determine_small_queue(
 608                                 &parms.rqueue, max_recv_sge, is_llqp);
 609                 parms.qp_storage =
 610                         (parms.squeue.is_small || parms.rqueue.is_small);
 611         }
 612
 613         h_ret = hipz_h_alloc_resource_qp(shca->ipz_hca_handle, &parms);
 614         if (h_ret != H_SUCCESS) {
 615                 ehca_err(pd->device, "h_alloc_resource_qp() failed h_ret=%lx",
 616                          h_ret);
 617                 ret = ehca2ib_return_code(h_ret);
 618                 goto create_qp_exit1;
 619         }
 620
 621         ib_qp_num = my_qp->real_qp_num = parms.real_qp_num;
 622         my_qp->ipz_qp_handle = parms.qp_handle;
 623         my_qp->galpas = parms.galpas;
 624
 625         swqe_size = ehca_calc_wqe_size(parms.squeue.act_nr_sges, is_llqp);
 626         rwqe_size = ehca_calc_wqe_size(parms.rqueue.act_nr_sges, is_llqp);
 627
 628         switch (qp_type) {
 629         case IB_QPT_RC:
 630                 if (is_llqp) {
 631                         parms.squeue.act_nr_sges = 1;
 632                         parms.rqueue.act_nr_sges = 1;
 633                 }
 634                 break;
 635         case IB_QPT_UD:
 636         case IB_QPT_GSI:
 637         case IB_QPT_SMI:
 638                 /* UD circumvention */
 639                 if (is_llqp) {
 640                         parms.squeue.act_nr_sges = 1;
 641                         parms.rqueue.act_nr_sges = 1;
 642                 } else {
 643                         parms.squeue.act_nr_sges -= 2;
 644                         parms.rqueue.act_nr_sges -= 2;
 645                 }
 646
 647                 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
 648                         parms.squeue.act_nr_wqes = init_attr->cap.max_send_wr;
 649                         parms.rqueue.act_nr_wqes = init_attr->cap.max_recv_wr;
 650                         parms.squeue.act_nr_sges = init_attr->cap.max_send_sge;
 651                         parms.rqueue.act_nr_sges = init_attr->cap.max_recv_sge;
 652                         ib_qp_num = (qp_type == IB_QPT_SMI) ? 0 : 1;
 653                 }
 654
 655                 break;
 656
 657         default:
 658                 break;
 659         }
 660
 661         /* initialize r/squeue and register queue pages */
 662         if (HAS_SQ(my_qp)) {
 663                 ret = init_qp_queue(
 664                         shca, my_pd, my_qp, &my_qp->ipz_squeue, 0,
 665                         HAS_RQ(my_qp) ? H_PAGE_REGISTERED : H_SUCCESS,
 666                         &parms.squeue, swqe_size);
 667                 if (ret) {
 668                         ehca_err(pd->device, "Couldn't initialize squeue "
 669                                  "and pages  ret=%x", ret);
 670                         goto create_qp_exit2;
 671                 }
 672         }
 673
 674         if (HAS_RQ(my_qp)) {
 675                 ret = init_qp_queue(
 676                         shca, my_pd, my_qp, &my_qp->ipz_rqueue, 1,
 677                         H_SUCCESS, &parms.rqueue, rwqe_size);
 678                 if (ret) {
 679                         ehca_err(pd->device, "Couldn't initialize rqueue "
 680                                  "and pages ret=%x", ret);
 681                         goto create_qp_exit3;
 682                 }
 683         }
 684
 685         if (is_srq) {
 686                 my_qp->ib_srq.pd = &my_pd->ib_pd;
 687                 my_qp->ib_srq.device = my_pd->ib_pd.device;
 688
 689                 my_qp->ib_srq.srq_context = init_attr->qp_context;
 690                 my_qp->ib_srq.event_handler = init_attr->event_handler;
 691         } else {
 692                 my_qp->ib_qp.qp_num = ib_qp_num;
 693                 my_qp->ib_qp.pd = &my_pd->ib_pd;
 694                 my_qp->ib_qp.device = my_pd->ib_pd.device;
 695
 696                 my_qp->ib_qp.recv_cq = init_attr->recv_cq;
 697                 my_qp->ib_qp.send_cq = init_attr->send_cq;
 698
 699                 my_qp->ib_qp.qp_type = qp_type;
 700                 my_qp->ib_qp.srq = init_attr->srq;
 701
 702                 my_qp->ib_qp.qp_context = init_attr->qp_context;
 703                 my_qp->ib_qp.event_handler = init_attr->event_handler;
 704         }
 705
 706         init_attr->cap.max_inline_data = 0; /* not supported yet */
 707         init_attr->cap.max_recv_sge = parms.rqueue.act_nr_sges;
 708         init_attr->cap.max_recv_wr = parms.rqueue.act_nr_wqes;
 709         init_attr->cap.max_send_sge = parms.squeue.act_nr_sges;
 710         init_attr->cap.max_send_wr = parms.squeue.act_nr_wqes;
 711         my_qp->init_attr = *init_attr;
 712
 713         /* NOTE: define_apq0() not supported yet */
 714         if (qp_type == IB_QPT_GSI) {
 715                 h_ret = ehca_define_sqp(shca, my_qp, init_attr);
 716                 if (h_ret != H_SUCCESS) {
 717                         ehca_err(pd->device, "ehca_define_sqp() failed rc=%lx",
 718                                  h_ret);
 719                         ret = ehca2ib_return_code(h_ret);
 720                         goto create_qp_exit4;
 721                 }
 722         }
 723
 724         if (my_qp->send_cq) {
 725                 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
 726                 if (ret) {
 727                         ehca_err(pd->device,
 728                                  "Couldn't assign qp to send_cq ret=%x", ret);
 729                         goto create_qp_exit4;
 730                 }
 731         }
 732
 733         /* copy queues, galpa data to user space */
 734         if (context && udata) {
 735                 struct ehca_create_qp_resp resp;
 736                 memset(&resp, 0, sizeof(resp));
 737
 738                 resp.qp_num = my_qp->real_qp_num;
 739                 resp.token = my_qp->token;
 740                 resp.qp_type = my_qp->qp_type;
 741                 resp.ext_type = my_qp->ext_type;
 742                 resp.qkey = my_qp->qkey;
 743                 resp.real_qp_num = my_qp->real_qp_num;
 744                 resp.ipz_rqueue.offset = my_qp->ipz_rqueue.offset;
 745                 resp.ipz_squeue.offset = my_qp->ipz_squeue.offset;
 746                 if (HAS_SQ(my_qp))
 747                         queue2resp(&resp.ipz_squeue, &my_qp->ipz_squeue);
 748                 if (HAS_RQ(my_qp))
 749                         queue2resp(&resp.ipz_rqueue, &my_qp->ipz_rqueue);
 750
 751                 if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
 752                         ehca_err(pd->device, "Copy to udata failed");
 753                         ret = -EINVAL;
 754                         goto create_qp_exit4;
 755                 }
 756         }
 757
 758         return my_qp;
 759
 760 create_qp_exit4:
 761         if (HAS_RQ(my_qp))
 762                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
 763
 764 create_qp_exit3:
 765         if (HAS_SQ(my_qp))
 766                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
 767
 768 create_qp_exit2:
 769         hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
 770
 771 create_qp_exit1:
 772         write_lock_irqsave(&ehca_qp_idr_lock, flags);
 773         idr_remove(&ehca_qp_idr, my_qp->token);
 774         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
 775
 776 create_qp_exit0:
 777         kmem_cache_free(qp_cache, my_qp);
 778         return ERR_PTR(ret);
 779 }
 780
 781 struct ib_qp *ehca_create_qp(struct ib_pd *pd,
 782                              struct ib_qp_init_attr *qp_init_attr,
 783                              struct ib_udata *udata)
 784 {
 785         struct ehca_qp *ret;
 786
 787         ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
 788         return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
 789 }
 790
 791 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
 792                                struct ib_uobject *uobject);
 793
 794 struct ib_srq *ehca_create_srq(struct ib_pd *pd,
 795                                struct ib_srq_init_attr *srq_init_attr,
 796                                struct ib_udata *udata)
 797 {
 798         struct ib_qp_init_attr qp_init_attr;
 799         struct ehca_qp *my_qp;
 800         struct ib_srq *ret;
 801         struct ehca_shca *shca = container_of(pd->device, struct ehca_shca,
 802                                               ib_device);
 803         struct hcp_modify_qp_control_block *mqpcb;
 804         u64 hret, update_mask;
 805
 806         /* For common attributes, internal_create_qp() takes its info
 807          * out of qp_init_attr, so copy all common attrs there.
 808          */
 809         memset(&qp_init_attr, 0, sizeof(qp_init_attr));
 810         qp_init_attr.event_handler = srq_init_attr->event_handler;
 811         qp_init_attr.qp_context = srq_init_attr->srq_context;
 812         qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
 813         qp_init_attr.qp_type = IB_QPT_RC;
 814         qp_init_attr.cap.max_recv_wr = srq_init_attr->attr.max_wr;
 815         qp_init_attr.cap.max_recv_sge = srq_init_attr->attr.max_sge;
 816
 817         my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
 818         if (IS_ERR(my_qp))
 819                 return (struct ib_srq *)my_qp;
 820
 821         /* copy back return values */
 822         srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
 823         srq_init_attr->attr.max_sge = qp_init_attr.cap.max_recv_sge;
 824
 825         /* drive SRQ into RTR state */
 826         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 827         if (!mqpcb) {
 828                 ehca_err(pd->device, "Could not get zeroed page for mqpcb "
 829                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
 830                 ret = ERR_PTR(-ENOMEM);
 831                 goto create_srq1;
 832         }
 833
 834         mqpcb->qp_state = EHCA_QPS_INIT;
 835         mqpcb->prim_phys_port = 1;
 836         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 837         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 838                                 my_qp->ipz_qp_handle,
 839                                 &my_qp->pf,
 840                                 update_mask,
 841                                 mqpcb, my_qp->galpas.kernel);
 842         if (hret != H_SUCCESS) {
 843                 ehca_err(pd->device, "Could not modify SRQ to INIT"
 844                          "ehca_qp=%p qp_num=%x hret=%lx",
 845                          my_qp, my_qp->real_qp_num, hret);
 846                 goto create_srq2;
 847         }
 848
 849         mqpcb->qp_enable = 1;
 850         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
 851         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 852                                 my_qp->ipz_qp_handle,
 853                                 &my_qp->pf,
 854                                 update_mask,
 855                                 mqpcb, my_qp->galpas.kernel);
 856         if (hret != H_SUCCESS) {
 857                 ehca_err(pd->device, "Could not enable SRQ"
 858                          "ehca_qp=%p qp_num=%x hret=%lx",
 859                          my_qp, my_qp->real_qp_num, hret);
 860                 goto create_srq2;
 861         }
 862
 863         mqpcb->qp_state  = EHCA_QPS_RTR;
 864         update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
 865         hret = hipz_h_modify_qp(shca->ipz_hca_handle,
 866                                 my_qp->ipz_qp_handle,
 867                                 &my_qp->pf,
 868                                 update_mask,
 869                                 mqpcb, my_qp->galpas.kernel);
 870         if (hret != H_SUCCESS) {
 871                 ehca_err(pd->device, "Could not modify SRQ to RTR"
 872                          "ehca_qp=%p qp_num=%x hret=%lx",
 873                          my_qp, my_qp->real_qp_num, hret);
 874                 goto create_srq2;
 875         }
 876
 877         return &my_qp->ib_srq;
 878
 879 create_srq2:
 880         ret = ERR_PTR(ehca2ib_return_code(hret));
 881         ehca_free_fw_ctrlblock(mqpcb);
 882
 883 create_srq1:
 884         internal_destroy_qp(pd->device, my_qp, my_qp->ib_srq.uobject);
 885
 886         return ret;
 887 }
 888
 889 /*
 890  * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
 891  * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
 892  * returns total number of bad wqes in bad_wqe_cnt
 893  */
 894 static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
 895                            int *bad_wqe_cnt)
 896 {
 897         u64 h_ret;
 898         struct ipz_queue *squeue;
 899         void *bad_send_wqe_p, *bad_send_wqe_v;
 900         u64 q_ofs;
 901         struct ehca_wqe *wqe;
 902         int qp_num = my_qp->ib_qp.qp_num;
 903
 904         /* get send wqe pointer */
 905         h_ret = hipz_h_disable_and_get_wqe(shca->ipz_hca_handle,
 906                                            my_qp->ipz_qp_handle, &my_qp->pf,
 907                                            &bad_send_wqe_p, NULL, 2);
 908         if (h_ret != H_SUCCESS) {
 909                 ehca_err(&shca->ib_device, "hipz_h_disable_and_get_wqe() failed"
 910                          " ehca_qp=%p qp_num=%x h_ret=%lx",
 911                          my_qp, qp_num, h_ret);
 912                 return ehca2ib_return_code(h_ret);
 913         }
 914         bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
 915         ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
 916                  qp_num, bad_send_wqe_p);
 917         /* convert wqe pointer to vadr */
 918         bad_send_wqe_v = abs_to_virt((u64)bad_send_wqe_p);
 919         if (ehca_debug_level)
 920                 ehca_dmp(bad_send_wqe_v, 32, "qp_num=%x bad_wqe", qp_num);
 921         squeue = &my_qp->ipz_squeue;
 922         if (ipz_queue_abs_to_offset(squeue, (u64)bad_send_wqe_p, &q_ofs)) {
 923                 ehca_err(&shca->ib_device, "failed to get wqe offset qp_num=%x"
 924                          " bad_send_wqe_p=%p", qp_num, bad_send_wqe_p);
 925                 return -EFAULT;
 926         }
 927
 928         /* loop sets wqe's purge bit */
 929         wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 930         *bad_wqe_cnt = 0;
 931         while (wqe->optype != 0xff && wqe->wqef != 0xff) {
 932                 if (ehca_debug_level)
 933                         ehca_dmp(wqe, 32, "qp_num=%x wqe", qp_num);
 934                 wqe->nr_of_data_seg = 0; /* suppress data access */
 935                 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
 936                 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
 937                 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
 938                 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
 939         }
 940         /*
 941          * bad wqe will be reprocessed and ignored when pol_cq() is called,
 942          *  i.e. nr of wqes with flush error status is one less
 943          */
 944         ehca_dbg(&shca->ib_device, "qp_num=%x flusherr_wqe_cnt=%x",
 945                  qp_num, (*bad_wqe_cnt)-1);
 946         wqe->wqef = 0;
 947
 948         return 0;
 949 }
 950
 951 /*
 952  * internal_modify_qp with circumvention to handle aqp0 properly
 953  * smi_reset2init indicates if this is an internal reset-to-init-call for
 954  * smi. This flag must always be zero if called from ehca_modify_qp()!
 955  * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
 956  */
 957 static int internal_modify_qp(struct ib_qp *ibqp,
 958                               struct ib_qp_attr *attr,
 959                               int attr_mask, int smi_reset2init)
 960 {
 961         enum ib_qp_state qp_cur_state, qp_new_state;
 962         int cnt, qp_attr_idx, ret = 0;
 963         enum ib_qp_statetrans statetrans;
 964         struct hcp_modify_qp_control_block *mqpcb;
 965         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
 966         struct ehca_shca *shca =
 967                 container_of(ibqp->pd->device, struct ehca_shca, ib_device);
 968         u64 update_mask;
 969         u64 h_ret;
 970         int bad_wqe_cnt = 0;
 971         int squeue_locked = 0;
 972         unsigned long flags = 0;
 973
 974         /* do query_qp to obtain current attr values */
 975         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
 976         if (!mqpcb) {
 977                 ehca_err(ibqp->device, "Could not get zeroed page for mqpcb "
 978                          "ehca_qp=%p qp_num=%x ", my_qp, ibqp->qp_num);
 979                 return -ENOMEM;
 980         }
 981
 982         h_ret = hipz_h_query_qp(shca->ipz_hca_handle,
 983                                 my_qp->ipz_qp_handle,
 984                                 &my_qp->pf,
 985                                 mqpcb, my_qp->galpas.kernel);
 986         if (h_ret != H_SUCCESS) {
 987                 ehca_err(ibqp->device, "hipz_h_query_qp() failed "
 988                          "ehca_qp=%p qp_num=%x h_ret=%lx",
 989                          my_qp, ibqp->qp_num, h_ret);
 990                 ret = ehca2ib_return_code(h_ret);
 991                 goto modify_qp_exit1;
 992         }
 993
 994         qp_cur_state = ehca2ib_qp_state(mqpcb->qp_state);
 995
 996         if (qp_cur_state == -EINVAL) {  /* invalid qp state */
 997                 ret = -EINVAL;
 998                 ehca_err(ibqp->device, "Invalid current ehca_qp_state=%x "
 999                          "ehca_qp=%p qp_num=%x",
1000                          mqpcb->qp_state, my_qp, ibqp->qp_num);
1001                 goto modify_qp_exit1;
1002         }
1003         /*
1004          * circumvention to set aqp0 initial state to init
1005          * as expected by IB spec
1006          */
1007         if (smi_reset2init == 0 &&
1008             ibqp->qp_type == IB_QPT_SMI &&
1009             qp_cur_state == IB_QPS_RESET &&
1010             (attr_mask & IB_QP_STATE) &&
1011             attr->qp_state == IB_QPS_INIT) { /* RESET -> INIT */
1012                 struct ib_qp_attr smiqp_attr = {
1013                         .qp_state = IB_QPS_INIT,
1014                         .port_num = my_qp->init_attr.port_num,
1015                         .pkey_index = 0,
1016                         .qkey = 0
1017                 };
1018                 int smiqp_attr_mask = IB_QP_STATE | IB_QP_PORT |
1019                         IB_QP_PKEY_INDEX | IB_QP_QKEY;
1020                 int smirc = internal_modify_qp(
1021                         ibqp, &smiqp_attr, smiqp_attr_mask, 1);
1022                 if (smirc) {
1023                         ehca_err(ibqp->device, "SMI RESET -> INIT failed. "
1024                                  "ehca_modify_qp() rc=%x", smirc);
1025                         ret = H_PARAMETER;
1026                         goto modify_qp_exit1;
1027                 }
1028                 qp_cur_state = IB_QPS_INIT;
1029                 ehca_dbg(ibqp->device, "SMI RESET -> INIT succeeded");
1030         }
1031         /* is transmitted current state  equal to "real" current state */
1032         if ((attr_mask & IB_QP_CUR_STATE) &&
1033             qp_cur_state != attr->cur_qp_state) {
1034                 ret = -EINVAL;
1035                 ehca_err(ibqp->device,
1036                          "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
1037                          " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
1038                          attr->cur_qp_state, qp_cur_state, my_qp, ibqp->qp_num);
1039                 goto modify_qp_exit1;
1040         }
1041
1042         ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1043                  "new qp_state=%x attribute_mask=%x",
1044                  my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1045
1046         qp_new_state = attr_mask & IB_QP_STATE ? attr->qp_state : qp_cur_state;
1047         if (!smi_reset2init &&
1048             !ib_modify_qp_is_ok(qp_cur_state, qp_new_state, ibqp->qp_type,
1049                                 attr_mask)) {
1050                 ret = -EINVAL;
1051                 ehca_err(ibqp->device,
1052                          "Invalid qp transition new_state=%x cur_state=%x "
1053                          "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state,
1054                          qp_cur_state, my_qp, ibqp->qp_num, attr_mask);
1055                 goto modify_qp_exit1;
1056         }
1057
1058         mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1059         if (mqpcb->qp_state)
1060                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1061         else {
1062                 ret = -EINVAL;
1063                 ehca_err(ibqp->device, "Invalid new qp state=%x "
1064                          "ehca_qp=%p qp_num=%x",
1065                          qp_new_state, my_qp, ibqp->qp_num);
1066                 goto modify_qp_exit1;
1067         }
1068
1069         /* retrieve state transition struct to get req and opt attrs */
1070         statetrans = get_modqp_statetrans(qp_cur_state, qp_new_state);
1071         if (statetrans < 0) {
1072                 ret = -EINVAL;
1073                 ehca_err(ibqp->device, "<INVALID STATE CHANGE> qp_cur_state=%x "
1074                          "new_qp_state=%x State_xsition=%x ehca_qp=%p "
1075                          "qp_num=%x", qp_cur_state, qp_new_state,
1076                          statetrans, my_qp, ibqp->qp_num);
1077                 goto modify_qp_exit1;
1078         }
1079
1080         qp_attr_idx = ib2ehcaqptype(ibqp->qp_type);
1081
1082         if (qp_attr_idx < 0) {
1083                 ret = qp_attr_idx;
1084                 ehca_err(ibqp->device,
1085                          "Invalid QP type=%x ehca_qp=%p qp_num=%x",
1086                          ibqp->qp_type, my_qp, ibqp->qp_num);
1087                 goto modify_qp_exit1;
1088         }
1089
1090         ehca_dbg(ibqp->device,
1091                  "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
1092                  my_qp, ibqp->qp_num, statetrans);
1093
1094         /* eHCA2 rev2 and higher require the SEND_GRH_FLAG to be set
1095          * in non-LL UD QPs.
1096          */
1097         if ((my_qp->qp_type == IB_QPT_UD) &&
1098             (my_qp->ext_type != EQPT_LLQP) &&
1099             (statetrans == IB_QPST_INIT2RTR) &&
1100             (shca->hw_level >= 0x22)) {
1101                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1102                 mqpcb->send_grh_flag = 1;
1103         }
1104
1105         /* sqe -> rts: set purge bit of bad wqe before actual trans */
1106         if ((my_qp->qp_type == IB_QPT_UD ||
1107              my_qp->qp_type == IB_QPT_GSI ||
1108              my_qp->qp_type == IB_QPT_SMI) &&
1109             statetrans == IB_QPST_SQE2RTS) {
1110                 /* mark next free wqe if kernel */
1111                 if (!ibqp->uobject) {
1112                         struct ehca_wqe *wqe;
1113                         /* lock send queue */
1114                         spin_lock_irqsave(&my_qp->spinlock_s, flags);
1115                         squeue_locked = 1;
1116                         /* mark next free wqe */
1117                         wqe = (struct ehca_wqe *)
1118                                 ipz_qeit_get(&my_qp->ipz_squeue);
1119                         wqe->optype = wqe->wqef = 0xff;
1120                         ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
1121                                  ibqp->qp_num, wqe);
1122                 }
1123                 ret = prepare_sqe_rts(my_qp, shca, &bad_wqe_cnt);
1124                 if (ret) {
1125                         ehca_err(ibqp->device, "prepare_sqe_rts() failed "
1126                                  "ehca_qp=%p qp_num=%x ret=%x",
1127                                  my_qp, ibqp->qp_num, ret);
1128                         goto modify_qp_exit2;
1129                 }
1130         }
1131
1132         /*
1133          * enable RDMA_Atomic_Control if reset->init und reliable con
1134          * this is necessary since gen2 does not provide that flag,
1135          * but pHyp requires it
1136          */
1137         if (statetrans == IB_QPST_RESET2INIT &&
1138             (ibqp->qp_type == IB_QPT_RC || ibqp->qp_type == IB_QPT_UC)) {
1139                 mqpcb->rdma_atomic_ctrl = 3;
1140                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL, 1);
1141         }
1142         /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
1143         if (statetrans == IB_QPST_INIT2RTR &&
1144             (ibqp->qp_type == IB_QPT_UC) &&
1145             !(attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)) {
1146                 mqpcb->rdma_nr_atomic_resp_res = 1; /* default to 1 */
1147                 update_mask |=
1148                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1149         }
1150
1151         if (attr_mask & IB_QP_PKEY_INDEX) {
1152                 mqpcb->prim_p_key_idx = attr->pkey_index;
1153                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX, 1);
1154         }
1155         if (attr_mask & IB_QP_PORT) {
1156                 if (attr->port_num < 1 || attr->port_num > shca->num_ports) {
1157                         ret = -EINVAL;
1158                         ehca_err(ibqp->device, "Invalid port=%x. "
1159                                  "ehca_qp=%p qp_num=%x num_ports=%x",
1160                                  attr->port_num, my_qp, ibqp->qp_num,
1161                                  shca->num_ports);
1162                         goto modify_qp_exit2;
1163                 }
1164                 mqpcb->prim_phys_port = attr->port_num;
1165                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT, 1);
1166         }
1167         if (attr_mask & IB_QP_QKEY) {
1168                 mqpcb->qkey = attr->qkey;
1169                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_QKEY, 1);
1170         }
1171         if (attr_mask & IB_QP_AV) {
1172                 int ah_mult = ib_rate_to_mult(attr->ah_attr.static_rate);
1173                 int ehca_mult = ib_rate_to_mult(shca->sport[my_qp->
1174                                                 init_attr.port_num].rate);
1175
1176                 mqpcb->dlid = attr->ah_attr.dlid;
1177                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID, 1);
1178                 mqpcb->source_path_bits = attr->ah_attr.src_path_bits;
1179                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS, 1);
1180                 mqpcb->service_level = attr->ah_attr.sl;
1181                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL, 1);
1182
1183                 if (ah_mult < ehca_mult)
1184                         mqpcb->max_static_rate = (ah_mult > 0) ?
1185                         ((ehca_mult - 1) / ah_mult) : 0;
1186                 else
1187                         mqpcb->max_static_rate = 0;
1188                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE, 1);
1189
1190                 /*
1191                  * Always supply the GRH flag, even if it's zero, to give the
1192                  * hypervisor a clear "yes" or "no" instead of a "perhaps"
1193                  */
1194                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG, 1);
1195
1196                 /*
1197                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1198                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1199                  */
1200                 if (attr->ah_attr.ah_flags == IB_AH_GRH) {
1201                         mqpcb->send_grh_flag = 1;
1202
1203                         mqpcb->source_gid_idx = attr->ah_attr.grh.sgid_index;
1204                         update_mask |=
1205                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX, 1);
1206
1207                         for (cnt = 0; cnt < 16; cnt++)
1208                                 mqpcb->dest_gid.byte[cnt] =
1209                                         attr->ah_attr.grh.dgid.raw[cnt];
1210
1211                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID, 1);
1212                         mqpcb->flow_label = attr->ah_attr.grh.flow_label;
1213                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL, 1);
1214                         mqpcb->hop_limit = attr->ah_attr.grh.hop_limit;
1215                         update_mask |= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT, 1);
1216                         mqpcb->traffic_class = attr->ah_attr.grh.traffic_class;
1217                         update_mask |=
1218                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS, 1);
1219                 }
1220         }
1221
1222         if (attr_mask & IB_QP_PATH_MTU) {
1223                 mqpcb->path_mtu = attr->path_mtu;
1224                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU, 1);
1225         }
1226         if (attr_mask & IB_QP_TIMEOUT) {
1227                 mqpcb->timeout = attr->timeout;
1228                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT, 1);
1229         }
1230         if (attr_mask & IB_QP_RETRY_CNT) {
1231                 mqpcb->retry_count = attr->retry_cnt;
1232                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT, 1);
1233         }
1234         if (attr_mask & IB_QP_RNR_RETRY) {
1235                 mqpcb->rnr_retry_count = attr->rnr_retry;
1236                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT, 1);
1237         }
1238         if (attr_mask & IB_QP_RQ_PSN) {
1239                 mqpcb->receive_psn = attr->rq_psn;
1240                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN, 1);
1241         }
1242         if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1243                 mqpcb->rdma_nr_atomic_resp_res = attr->max_dest_rd_atomic < 3 ?
1244                         attr->max_dest_rd_atomic : 2;
1245                 update_mask |=
1246                         EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES, 1);
1247         }
1248         if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1249                 mqpcb->rdma_atomic_outst_dest_qp = attr->max_rd_atomic < 3 ?
1250                         attr->max_rd_atomic : 2;
1251                 update_mask |=
1252                         EHCA_BMASK_SET
1253                         (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP, 1);
1254         }
1255         if (attr_mask & IB_QP_ALT_PATH) {
1256                 int ah_mult = ib_rate_to_mult(attr->alt_ah_attr.static_rate);
1257                 int ehca_mult = ib_rate_to_mult(
1258                         shca->sport[my_qp->init_attr.port_num].rate);
1259
1260                 mqpcb->dlid_al = attr->alt_ah_attr.dlid;
1261                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL, 1);
1262                 mqpcb->source_path_bits_al = attr->alt_ah_attr.src_path_bits;
1263                 update_mask |=
1264                         EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL, 1);
1265                 mqpcb->service_level_al = attr->alt_ah_attr.sl;
1266                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL, 1);
1267
1268                 if (ah_mult < ehca_mult)
1269                         mqpcb->max_static_rate = (ah_mult > 0) ?
1270                         ((ehca_mult - 1) / ah_mult) : 0;
1271                 else
1272                         mqpcb->max_static_rate_al = 0;
1273
1274                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL, 1);
1275
1276                 /*
1277                  * only if GRH is TRUE we might consider SOURCE_GID_IDX
1278                  * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1279                  */
1280                 if (attr->alt_ah_attr.ah_flags == IB_AH_GRH) {
1281                         mqpcb->send_grh_flag_al = 1 << 31;
1282                         update_mask |=
1283                                 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL, 1);
1284                         mqpcb->source_gid_idx_al =
1285                                 attr->alt_ah_attr.grh.sgid_index;
1286                         update_mask |=
1287                                 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL, 1);
1288
1289                         for (cnt = 0; cnt < 16; cnt++)
1290                                 mqpcb->dest_gid_al.byte[cnt] =
1291                                         attr->alt_ah_attr.grh.dgid.raw[cnt];
1292
1293                         update_mask |=
1294                                 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL, 1);
1295                         mqpcb->flow_label_al = attr->alt_ah_attr.grh.flow_label;
1296                         update_mask |=
1297                                 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL, 1);
1298                         mqpcb->hop_limit_al = attr->alt_ah_attr.grh.hop_limit;
1299                         update_mask |=
1300                                 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL, 1);
1301                         mqpcb->traffic_class_al =
1302                                 attr->alt_ah_attr.grh.traffic_class;
1303                         update_mask |=
1304                                 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL, 1);
1305                 }
1306         }
1307
1308         if (attr_mask & IB_QP_MIN_RNR_TIMER) {
1309                 mqpcb->min_rnr_nak_timer_field = attr->min_rnr_timer;
1310                 update_mask |=
1311                         EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD, 1);
1312         }
1313
1314         if (attr_mask & IB_QP_SQ_PSN) {
1315                 mqpcb->send_psn = attr->sq_psn;
1316                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN, 1);
1317         }
1318
1319         if (attr_mask & IB_QP_DEST_QPN) {
1320                 mqpcb->dest_qp_nr = attr->dest_qp_num;
1321                 update_mask |= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR, 1);
1322         }
1323
1324         if (attr_mask & IB_QP_PATH_MIG_STATE) {
1325                 mqpcb->path_migration_state = attr->path_mig_state;
1326                 update_mask |=
1327                         EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE, 1);
1328         }
1329
1330         if (attr_mask & IB_QP_CAP) {
1331                 mqpcb->max_nr_outst_send_wr = attr->cap.max_send_wr+1;
1332                 update_mask |=
1333                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR, 1);
1334                 mqpcb->max_nr_outst_recv_wr = attr->cap.max_recv_wr+1;
1335                 update_mask |=
1336                         EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR, 1);
1337                 /* no support for max_send/recv_sge yet */
1338         }
1339
1340         if (ehca_debug_level)
1341                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", ibqp->qp_num);
1342
1343         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1344                                  my_qp->ipz_qp_handle,
1345                                  &my_qp->pf,
1346                                  update_mask,
1347                                  mqpcb, my_qp->galpas.kernel);
1348
1349         if (h_ret != H_SUCCESS) {
1350                 ret = ehca2ib_return_code(h_ret);
1351                 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1352                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1353                 goto modify_qp_exit2;
1354         }
1355
1356         if ((my_qp->qp_type == IB_QPT_UD ||
1357              my_qp->qp_type == IB_QPT_GSI ||
1358              my_qp->qp_type == IB_QPT_SMI) &&
1359             statetrans == IB_QPST_SQE2RTS) {
1360                 /* doorbell to reprocessing wqes */
1361                 iosync(); /* serialize GAL register access */
1362                 hipz_update_sqa(my_qp, bad_wqe_cnt-1);
1363                 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt);
1364         }
1365
1366         if (statetrans == IB_QPST_RESET2INIT ||
1367             statetrans == IB_QPST_INIT2INIT) {
1368                 mqpcb->qp_enable = 1;
1369                 mqpcb->qp_state = EHCA_QPS_INIT;
1370                 update_mask = 0;
1371                 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE, 1);
1372
1373                 h_ret = hipz_h_modify_qp(shca->ipz_hca_handle,
1374                                          my_qp->ipz_qp_handle,
1375                                          &my_qp->pf,
1376                                          update_mask,
1377                                          mqpcb,
1378                                          my_qp->galpas.kernel);
1379
1380                 if (h_ret != H_SUCCESS) {
1381                         ret = ehca2ib_return_code(h_ret);
1382                         ehca_err(ibqp->device, "ENABLE in context of "
1383                                  "RESET_2_INIT failed! Maybe you didn't get "
1384                                  "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1385                                  h_ret, my_qp, ibqp->qp_num);
1386                         goto modify_qp_exit2;
1387                 }
1388         }
1389
1390         if (statetrans == IB_QPST_ANY2RESET) {
1391                 ipz_qeit_reset(&my_qp->ipz_rqueue);
1392                 ipz_qeit_reset(&my_qp->ipz_squeue);
1393         }
1394
1395         if (attr_mask & IB_QP_QKEY)
1396                 my_qp->qkey = attr->qkey;
1397
1398 modify_qp_exit2:
1399         if (squeue_locked) { /* this means: sqe -> rts */
1400                 spin_unlock_irqrestore(&my_qp->spinlock_s, flags);
1401                 my_qp->sqerr_purgeflag = 1;
1402         }
1403
1404 modify_qp_exit1:
1405         ehca_free_fw_ctrlblock(mqpcb);
1406
1407         return ret;
1408 }
1409
1410 int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1411                    struct ib_udata *udata)
1412 {
1413         struct ehca_qp *my_qp = container_of(ibqp, struct ehca_qp, ib_qp);
1414         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1415                                              ib_pd);
1416         u32 cur_pid = current->tgid;
1417
1418         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1419             my_pd->ownpid != cur_pid) {
1420                 ehca_err(ibqp->pd->device, "Invalid caller pid=%x ownpid=%x",
1421                          cur_pid, my_pd->ownpid);
1422                 return -EINVAL;
1423         }
1424
1425         return internal_modify_qp(ibqp, attr, attr_mask, 0);
1426 }
1427
1428 int ehca_query_qp(struct ib_qp *qp,
1429                   struct ib_qp_attr *qp_attr,
1430                   int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr)
1431 {
1432         struct ehca_qp *my_qp = container_of(qp, struct ehca_qp, ib_qp);
1433         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1434                                              ib_pd);
1435         struct ehca_shca *shca = container_of(qp->device, struct ehca_shca,
1436                                               ib_device);
1437         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1438         struct hcp_modify_qp_control_block *qpcb;
1439         u32 cur_pid = current->tgid;
1440         int cnt, ret = 0;
1441         u64 h_ret;
1442
1443         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1444             my_pd->ownpid != cur_pid) {
1445                 ehca_err(qp->device, "Invalid caller pid=%x ownpid=%x",
1446                          cur_pid, my_pd->ownpid);
1447                 return -EINVAL;
1448         }
1449
1450         if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1451                 ehca_err(qp->device, "Invalid attribute mask "
1452                          "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1453                          my_qp, qp->qp_num, qp_attr_mask);
1454                 return -EINVAL;
1455         }
1456
1457         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1458         if (!qpcb) {
1459                 ehca_err(qp->device, "Out of memory for qpcb "
1460                          "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1461                 return -ENOMEM;
1462         }
1463
1464         h_ret = hipz_h_query_qp(adapter_handle,
1465                                 my_qp->ipz_qp_handle,
1466                                 &my_qp->pf,
1467                                 qpcb, my_qp->galpas.kernel);
1468
1469         if (h_ret != H_SUCCESS) {
1470                 ret = ehca2ib_return_code(h_ret);
1471                 ehca_err(qp->device, "hipz_h_query_qp() failed "
1472                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1473                          my_qp, qp->qp_num, h_ret);
1474                 goto query_qp_exit1;
1475         }
1476
1477         qp_attr->cur_qp_state = ehca2ib_qp_state(qpcb->qp_state);
1478         qp_attr->qp_state = qp_attr->cur_qp_state;
1479
1480         if (qp_attr->cur_qp_state == -EINVAL) {
1481                 ret = -EINVAL;
1482                 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1483                          "ehca_qp=%p qp_num=%x",
1484                          qpcb->qp_state, my_qp, qp->qp_num);
1485                 goto query_qp_exit1;
1486         }
1487
1488         if (qp_attr->qp_state == IB_QPS_SQD)
1489                 qp_attr->sq_draining = 1;
1490
1491         qp_attr->qkey = qpcb->qkey;
1492         qp_attr->path_mtu = qpcb->path_mtu;
1493         qp_attr->path_mig_state = qpcb->path_migration_state;
1494         qp_attr->rq_psn = qpcb->receive_psn;
1495         qp_attr->sq_psn = qpcb->send_psn;
1496         qp_attr->min_rnr_timer = qpcb->min_rnr_nak_timer_field;
1497         qp_attr->cap.max_send_wr = qpcb->max_nr_outst_send_wr-1;
1498         qp_attr->cap.max_recv_wr = qpcb->max_nr_outst_recv_wr-1;
1499         /* UD_AV CIRCUMVENTION */
1500         if (my_qp->qp_type == IB_QPT_UD) {
1501                 qp_attr->cap.max_send_sge =
1502                         qpcb->actual_nr_sges_in_sq_wqe - 2;
1503                 qp_attr->cap.max_recv_sge =
1504                         qpcb->actual_nr_sges_in_rq_wqe - 2;
1505         } else {
1506                 qp_attr->cap.max_send_sge =
1507                         qpcb->actual_nr_sges_in_sq_wqe;
1508                 qp_attr->cap.max_recv_sge =
1509                         qpcb->actual_nr_sges_in_rq_wqe;
1510         }
1511
1512         qp_attr->cap.max_inline_data = my_qp->sq_max_inline_data_size;
1513         qp_attr->dest_qp_num = qpcb->dest_qp_nr;
1514
1515         qp_attr->pkey_index =
1516                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->prim_p_key_idx);
1517
1518         qp_attr->port_num =
1519                 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT, qpcb->prim_phys_port);
1520
1521         qp_attr->timeout = qpcb->timeout;
1522         qp_attr->retry_cnt = qpcb->retry_count;
1523         qp_attr->rnr_retry = qpcb->rnr_retry_count;
1524
1525         qp_attr->alt_pkey_index =
1526                 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX, qpcb->alt_p_key_idx);
1527
1528         qp_attr->alt_port_num = qpcb->alt_phys_port;
1529         qp_attr->alt_timeout = qpcb->timeout_al;
1530
1531         qp_attr->max_dest_rd_atomic = qpcb->rdma_nr_atomic_resp_res;
1532         qp_attr->max_rd_atomic = qpcb->rdma_atomic_outst_dest_qp;
1533
1534         /* primary av */
1535         qp_attr->ah_attr.sl = qpcb->service_level;
1536
1537         if (qpcb->send_grh_flag) {
1538                 qp_attr->ah_attr.ah_flags = IB_AH_GRH;
1539         }
1540
1541         qp_attr->ah_attr.static_rate = qpcb->max_static_rate;
1542         qp_attr->ah_attr.dlid = qpcb->dlid;
1543         qp_attr->ah_attr.src_path_bits = qpcb->source_path_bits;
1544         qp_attr->ah_attr.port_num = qp_attr->port_num;
1545
1546         /* primary GRH */
1547         qp_attr->ah_attr.grh.traffic_class = qpcb->traffic_class;
1548         qp_attr->ah_attr.grh.hop_limit = qpcb->hop_limit;
1549         qp_attr->ah_attr.grh.sgid_index = qpcb->source_gid_idx;
1550         qp_attr->ah_attr.grh.flow_label = qpcb->flow_label;
1551
1552         for (cnt = 0; cnt < 16; cnt++)
1553                 qp_attr->ah_attr.grh.dgid.raw[cnt] =
1554                         qpcb->dest_gid.byte[cnt];
1555
1556         /* alternate AV */
1557         qp_attr->alt_ah_attr.sl = qpcb->service_level_al;
1558         if (qpcb->send_grh_flag_al) {
1559                 qp_attr->alt_ah_attr.ah_flags = IB_AH_GRH;
1560         }
1561
1562         qp_attr->alt_ah_attr.static_rate = qpcb->max_static_rate_al;
1563         qp_attr->alt_ah_attr.dlid = qpcb->dlid_al;
1564         qp_attr->alt_ah_attr.src_path_bits = qpcb->source_path_bits_al;
1565
1566         /* alternate GRH */
1567         qp_attr->alt_ah_attr.grh.traffic_class = qpcb->traffic_class_al;
1568         qp_attr->alt_ah_attr.grh.hop_limit = qpcb->hop_limit_al;
1569         qp_attr->alt_ah_attr.grh.sgid_index = qpcb->source_gid_idx_al;
1570         qp_attr->alt_ah_attr.grh.flow_label = qpcb->flow_label_al;
1571
1572         for (cnt = 0; cnt < 16; cnt++)
1573                 qp_attr->alt_ah_attr.grh.dgid.raw[cnt] =
1574                         qpcb->dest_gid_al.byte[cnt];
1575
1576         /* return init attributes given in ehca_create_qp */
1577         if (qp_init_attr)
1578                 *qp_init_attr = my_qp->init_attr;
1579
1580         if (ehca_debug_level)
1581                 ehca_dmp(qpcb, 4*70, "qp_num=%x", qp->qp_num);
1582
1583 query_qp_exit1:
1584         ehca_free_fw_ctrlblock(qpcb);
1585
1586         return ret;
1587 }
1588
1589 int ehca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
1590                     enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
1591 {
1592         struct ehca_qp *my_qp =
1593                 container_of(ibsrq, struct ehca_qp, ib_srq);
1594         struct ehca_pd *my_pd =
1595                 container_of(ibsrq->pd, struct ehca_pd, ib_pd);
1596         struct ehca_shca *shca =
1597                 container_of(ibsrq->pd->device, struct ehca_shca, ib_device);
1598         struct hcp_modify_qp_control_block *mqpcb;
1599         u64 update_mask;
1600         u64 h_ret;
1601         int ret = 0;
1602
1603         u32 cur_pid = current->tgid;
1604         if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
1605             my_pd->ownpid != cur_pid) {
1606                 ehca_err(ibsrq->pd->device, "Invalid caller pid=%x ownpid=%x",
1607                          cur_pid, my_pd->ownpid);
1608                 return -EINVAL;
1609         }
1610
1611         mqpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1612         if (!mqpcb) {
1613                 ehca_err(ibsrq->device, "Could not get zeroed page for mqpcb "
1614                          "ehca_qp=%p qp_num=%x ", my_qp, my_qp->real_qp_num);
1615                 return -ENOMEM;
1616         }
1617
1618         update_mask = 0;
1619         if (attr_mask & IB_SRQ_LIMIT) {
1620                 attr_mask &= ~IB_SRQ_LIMIT;
1621                 update_mask |=
1622                         EHCA_BMASK_SET(MQPCB_MASK_CURR_SRQ_LIMIT, 1)
1623                         | EHCA_BMASK_SET(MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG, 1);
1624                 mqpcb->curr_srq_limit =
1625                         EHCA_BMASK_SET(MQPCB_CURR_SRQ_LIMIT, attr->srq_limit);
1626                 mqpcb->qp_aff_asyn_ev_log_reg =
1627                         EHCA_BMASK_SET(QPX_AAELOG_RESET_SRQ_LIMIT, 1);
1628         }
1629
1630         /* by now, all bits in attr_mask should have been cleared */
1631         if (attr_mask) {
1632                 ehca_err(ibsrq->device, "invalid attribute mask bits set  "
1633                          "attr_mask=%x", attr_mask);
1634                 ret = -EINVAL;
1635                 goto modify_srq_exit0;
1636         }
1637
1638         if (ehca_debug_level)
1639                 ehca_dmp(mqpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1640
1641         h_ret = hipz_h_modify_qp(shca->ipz_hca_handle, my_qp->ipz_qp_handle,
1642                                  NULL, update_mask, mqpcb,
1643                                  my_qp->galpas.kernel);
1644
1645         if (h_ret != H_SUCCESS) {
1646                 ret = ehca2ib_return_code(h_ret);
1647                 ehca_err(ibsrq->device, "hipz_h_modify_qp() failed rc=%lx "
1648                          "ehca_qp=%p qp_num=%x",
1649                          h_ret, my_qp, my_qp->real_qp_num);
1650         }
1651
1652 modify_srq_exit0:
1653         ehca_free_fw_ctrlblock(mqpcb);
1654
1655         return ret;
1656 }
1657
1658 int ehca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr)
1659 {
1660         struct ehca_qp *my_qp = container_of(srq, struct ehca_qp, ib_srq);
1661         struct ehca_pd *my_pd = container_of(srq->pd, struct ehca_pd, ib_pd);
1662         struct ehca_shca *shca = container_of(srq->device, struct ehca_shca,
1663                                               ib_device);
1664         struct ipz_adapter_handle adapter_handle = shca->ipz_hca_handle;
1665         struct hcp_modify_qp_control_block *qpcb;
1666         u32 cur_pid = current->tgid;
1667         int ret = 0;
1668         u64 h_ret;
1669
1670         if (my_pd->ib_pd.uobject  && my_pd->ib_pd.uobject->context  &&
1671             my_pd->ownpid != cur_pid) {
1672                 ehca_err(srq->device, "Invalid caller pid=%x ownpid=%x",
1673                          cur_pid, my_pd->ownpid);
1674                 return -EINVAL;
1675         }
1676
1677         qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1678         if (!qpcb) {
1679                 ehca_err(srq->device, "Out of memory for qpcb "
1680                          "ehca_qp=%p qp_num=%x", my_qp, my_qp->real_qp_num);
1681                 return -ENOMEM;
1682         }
1683
1684         h_ret = hipz_h_query_qp(adapter_handle, my_qp->ipz_qp_handle,
1685                                 NULL, qpcb, my_qp->galpas.kernel);
1686
1687         if (h_ret != H_SUCCESS) {
1688                 ret = ehca2ib_return_code(h_ret);
1689                 ehca_err(srq->device, "hipz_h_query_qp() failed "
1690                          "ehca_qp=%p qp_num=%x h_ret=%lx",
1691                          my_qp, my_qp->real_qp_num, h_ret);
1692                 goto query_srq_exit1;
1693         }
1694
1695         srq_attr->max_wr = qpcb->max_nr_outst_recv_wr - 1;
1696         srq_attr->srq_limit = EHCA_BMASK_GET(
1697                 MQPCB_CURR_SRQ_LIMIT, qpcb->curr_srq_limit);
1698
1699         if (ehca_debug_level)
1700                 ehca_dmp(qpcb, 4*70, "qp_num=%x", my_qp->real_qp_num);
1701
1702 query_srq_exit1:
1703         ehca_free_fw_ctrlblock(qpcb);
1704
1705         return ret;
1706 }
1707
1708 static int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
1709                                struct ib_uobject *uobject)
1710 {
1711         struct ehca_shca *shca = container_of(dev, struct ehca_shca, ib_device);
1712         struct ehca_pd *my_pd = container_of(my_qp->ib_qp.pd, struct ehca_pd,
1713                                              ib_pd);
1714         u32 cur_pid = current->tgid;
1715         u32 qp_num = my_qp->real_qp_num;
1716         int ret;
1717         u64 h_ret;
1718         u8 port_num;
1719         enum ib_qp_type qp_type;
1720         unsigned long flags;
1721
1722         if (uobject) {
1723                 if (my_qp->mm_count_galpa ||
1724                     my_qp->mm_count_rqueue || my_qp->mm_count_squeue) {
1725                         ehca_err(dev, "Resources still referenced in "
1726                                  "user space qp_num=%x", qp_num);
1727                         return -EINVAL;
1728                 }
1729                 if (my_pd->ownpid != cur_pid) {
1730                         ehca_err(dev, "Invalid caller pid=%x ownpid=%x",
1731                                  cur_pid, my_pd->ownpid);
1732                         return -EINVAL;
1733                 }
1734         }
1735
1736         if (my_qp->send_cq) {
1737                 ret = ehca_cq_unassign_qp(my_qp->send_cq, qp_num);
1738                 if (ret) {
1739                         ehca_err(dev, "Couldn't unassign qp from "
1740                                  "send_cq ret=%x qp_num=%x cq_num=%x", ret,
1741                                  qp_num, my_qp->send_cq->cq_number);
1742                         return ret;
1743                 }
1744         }
1745
1746         write_lock_irqsave(&ehca_qp_idr_lock, flags);
1747         idr_remove(&ehca_qp_idr, my_qp->token);
1748         write_unlock_irqrestore(&ehca_qp_idr_lock, flags);
1749
1750         h_ret = hipz_h_destroy_qp(shca->ipz_hca_handle, my_qp);
1751         if (h_ret != H_SUCCESS) {
1752                 ehca_err(dev, "hipz_h_destroy_qp() failed rc=%lx "
1753                          "ehca_qp=%p qp_num=%x", h_ret, my_qp, qp_num);
1754                 return ehca2ib_return_code(h_ret);
1755         }
1756
1757         port_num = my_qp->init_attr.port_num;
1758         qp_type  = my_qp->init_attr.qp_type;
1759
1760         /* no support for IB_QPT_SMI yet */
1761         if (qp_type == IB_QPT_GSI) {
1762                 struct ib_event event;
1763                 ehca_info(dev, "device %s: port %x is inactive.",
1764                           shca->ib_device.name, port_num);
1765                 event.device = &shca->ib_device;
1766                 event.event = IB_EVENT_PORT_ERR;
1767                 event.element.port_num = port_num;
1768                 shca->sport[port_num - 1].port_state = IB_PORT_DOWN;
1769                 ib_dispatch_event(&event);
1770         }
1771
1772         if (HAS_RQ(my_qp))
1773                 ipz_queue_dtor(my_pd, &my_qp->ipz_rqueue);
1774         if (HAS_SQ(my_qp))
1775                 ipz_queue_dtor(my_pd, &my_qp->ipz_squeue);
1776         kmem_cache_free(qp_cache, my_qp);
1777         return 0;
1778 }
1779
1780 int ehca_destroy_qp(struct ib_qp *qp)
1781 {
1782         return internal_destroy_qp(qp->device,
1783                                    container_of(qp, struct ehca_qp, ib_qp),
1784                                    qp->uobject);
1785 }
1786
1787 int ehca_destroy_srq(struct ib_srq *srq)
1788 {
1789         return internal_destroy_qp(srq->device,
1790                                    container_of(srq, struct ehca_qp, ib_srq),
1791                                    srq->uobject);
1792 }
1793
1794 int ehca_init_qp_cache(void)
1795 {
1796         qp_cache = kmem_cache_create("ehca_cache_qp",
1797                                      sizeof(struct ehca_qp), 0,
1798                                      SLAB_HWCACHE_ALIGN,
1799                                      NULL);
1800         if (!qp_cache)
1801                 return -ENOMEM;
1802         return 0;
1803 }
1804
1805 void ehca_cleanup_qp_cache(void)
1806 {
1807         if (qp_cache)
1808                 kmem_cache_destroy(qp_cache);
1809 }