1 #ifndef __ASM_NUMAQ_APIC_H
2 #define __ASM_NUMAQ_APIC_H
5 #include <linux/mmzone.h>
6 #include <linux/nodemask.h>
8 #define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
10 static inline cpumask_t target_cpus(void)
15 #define NO_BALANCE_IRQ (1)
16 #define esr_disable (1)
18 #define INT_DELIVERY_MODE dest_LowestPrio
19 #define INT_DEST_MODE 0 /* physical delivery on LOCAL quad */
21 static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
23 return physid_isset(apicid, bitmap);
25 static inline unsigned long check_apicid_present(int bit)
27 return physid_isset(bit, phys_cpu_present_map);
29 #define apicid_cluster(apicid) (apicid & 0xF0)
31 static inline int apic_id_registered(void)
36 static inline void init_apic_ldr(void)
38 /* Already done in NUMA-Q firmware */
41 static inline void setup_apic_routing(void)
43 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
44 "NUMA-Q", nr_ioapics);
48 * Skip adding the timer int on secondary nodes, which causes
49 * a small but painful rift in the time-space continuum.
51 static inline int multi_timer_check(int apic, int irq)
53 return apic != 0 && irq == 0;
56 static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
58 /* We don't have a good way to do this yet - hack */
59 return physids_promote(0xFUL);
62 /* Mapping from cpu number to logical apicid */
63 extern u8 cpu_2_logical_apicid[];
64 static inline int cpu_to_logical_apicid(int cpu)
68 return (int)cpu_2_logical_apicid[cpu];
72 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
73 * cpu to APIC ID relation to properly interact with the intelligent
74 * mode of the cluster controller.
76 static inline int cpu_present_to_apicid(int mps_cpu)
79 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
84 static inline int apicid_to_node(int logical_apicid)
86 return logical_apicid >> 4;
89 static inline physid_mask_t apicid_to_cpu_present(int logical_apicid)
91 int node = apicid_to_node(logical_apicid);
92 int cpu = __ffs(logical_apicid & 0xf);
94 return physid_mask_of_physid(cpu + 4*node);
97 extern void *xquad_portio;
99 static inline void setup_portio_remap(void)
101 int num_quads = num_online_nodes();
106 printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
107 xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
108 printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
109 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
112 static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
117 static inline void enable_apic_mode(void)
122 * We use physical apicids here, not logical, so just return the default
123 * physical broadcast to stop people from breaking us
125 static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
130 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
131 static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
133 return cpuid_apic >> index_msb;
136 #endif /* __ASM_NUMAQ_APIC_H */