2 * tifm_sd.c - TI FlashMedia driver
4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
13 #include <linux/tifm.h>
14 #include <linux/mmc/protocol.h>
15 #include <linux/mmc/host.h>
16 #include <linux/highmem.h>
19 #define DRIVER_NAME "tifm_sd"
20 #define DRIVER_VERSION "0.7"
22 static int no_dma = 0;
23 static int fixed_timeout = 0;
24 module_param(no_dma, bool, 0644);
25 module_param(fixed_timeout, bool, 0644);
27 /* Constants here are mostly from OMAP5912 datasheet */
28 #define TIFM_MMCSD_RESET 0x0002
29 #define TIFM_MMCSD_CLKMASK 0x03ff
30 #define TIFM_MMCSD_POWER 0x0800
31 #define TIFM_MMCSD_4BBUS 0x8000
32 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
33 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
34 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
35 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
36 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
37 #define TIFM_MMCSD_READ 0x8000
39 #define TIFM_MMCSD_DATAMASK 0x001d /* set bits: EOFB, BRS, CB, EOC */
40 #define TIFM_MMCSD_ERRMASK 0x41e0 /* set bits: CERR, CCRC, CTO, DCRC, DTO */
41 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
42 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
43 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
44 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
45 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */
46 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
47 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */
48 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
49 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
50 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
51 #define TIFM_MMCSD_CERR 0x4000 /* card status error */
53 #define TIFM_MMCSD_FIFO_SIZE 0x0020
55 #define TIFM_MMCSD_RSP_R0 0x0000
56 #define TIFM_MMCSD_RSP_R1 0x0100
57 #define TIFM_MMCSD_RSP_R2 0x0200
58 #define TIFM_MMCSD_RSP_R3 0x0300
59 #define TIFM_MMCSD_RSP_R4 0x0400
60 #define TIFM_MMCSD_RSP_R5 0x0500
61 #define TIFM_MMCSD_RSP_R6 0x0600
63 #define TIFM_MMCSD_RSP_BUSY 0x0800
65 #define TIFM_MMCSD_CMD_BC 0x0000
66 #define TIFM_MMCSD_CMD_BCR 0x1000
67 #define TIFM_MMCSD_CMD_AC 0x2000
68 #define TIFM_MMCSD_CMD_ADTC 0x3000
72 CMD, /* main command ended */
73 BRS, /* block transfer finished */
74 SCMD, /* stop command ended */
75 CARD, /* card left busy state */
76 FIFO, /* FIFO operation completed (uncertain) */
81 FIFO_RDY = 0x0001, /* hardware dependent value */
85 OPENDRAIN = 0x0040, /* hardware dependent value */
86 CARD_EVENT = 0x0100, /* hardware dependent value */
87 CARD_RO = 0x0200, /* hardware dependent value */
88 FIFO_EVENT = 0x10000 }; /* hardware dependent value */
95 unsigned int clk_freq;
97 unsigned long timeout_jiffies;
99 struct tasklet_struct finish_tasklet;
100 struct timer_list timer;
101 struct mmc_request *req;
102 wait_queue_head_t notify;
104 size_t written_blocks;
110 static char* tifm_sd_data_buffer(struct mmc_data *data)
112 return page_address(data->sg->page) + data->sg->offset;
115 static int tifm_sd_transfer_data(struct tifm_dev *sock, struct tifm_sd *host,
116 unsigned int host_status)
118 struct mmc_command *cmd = host->req->cmd;
119 unsigned int t_val = 0, cnt = 0;
122 if (host_status & TIFM_MMCSD_BRS) {
123 /* in non-dma rx mode BRS fires when fifo is still not empty */
124 if (no_dma && (cmd->data->flags & MMC_DATA_READ)) {
125 buffer = tifm_sd_data_buffer(host->req->data);
126 while (host->buffer_size > host->buffer_pos) {
127 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
128 buffer[host->buffer_pos++] = t_val & 0xff;
129 buffer[host->buffer_pos++] =
135 buffer = tifm_sd_data_buffer(host->req->data);
136 if ((cmd->data->flags & MMC_DATA_READ) &&
137 (host_status & TIFM_MMCSD_AF)) {
138 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
139 t_val = readl(sock->addr + SOCK_MMCSD_DATA);
140 if (host->buffer_size > host->buffer_pos) {
141 buffer[host->buffer_pos++] =
143 buffer[host->buffer_pos++] =
147 } else if ((cmd->data->flags & MMC_DATA_WRITE)
148 && (host_status & TIFM_MMCSD_AE)) {
149 for (cnt = 0; cnt < TIFM_MMCSD_FIFO_SIZE; cnt++) {
150 if (host->buffer_size > host->buffer_pos) {
151 t_val = buffer[host->buffer_pos++]
153 t_val |= ((buffer[host->buffer_pos++])
156 sock->addr + SOCK_MMCSD_DATA);
164 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
168 switch (mmc_resp_type(cmd)) {
170 rc |= TIFM_MMCSD_RSP_R0;
173 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through
175 rc |= TIFM_MMCSD_RSP_R1;
178 rc |= TIFM_MMCSD_RSP_R2;
181 rc |= TIFM_MMCSD_RSP_R3;
187 switch (mmc_cmd_type(cmd)) {
189 rc |= TIFM_MMCSD_CMD_BC;
192 rc |= TIFM_MMCSD_CMD_BCR;
195 rc |= TIFM_MMCSD_CMD_AC;
198 rc |= TIFM_MMCSD_CMD_ADTC;
206 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
208 struct tifm_dev *sock = host->dev;
209 unsigned int cmd_mask = tifm_sd_op_flags(cmd) |
210 (host->flags & OPENDRAIN);
212 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
213 cmd_mask |= TIFM_MMCSD_READ;
215 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
216 cmd->opcode, cmd->arg, cmd_mask);
218 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
219 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
220 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
223 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
225 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
226 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
227 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
228 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
229 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
230 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
231 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
232 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
235 static void tifm_sd_process_cmd(struct tifm_dev *sock, struct tifm_sd *host,
236 unsigned int host_status)
238 struct mmc_command *cmd = host->req->cmd;
241 switch (host->state) {
245 if (host_status & TIFM_MMCSD_EOC) {
246 tifm_sd_fetch_resp(cmd, sock);
256 if (tifm_sd_transfer_data(sock, host, host_status)) {
257 if (cmd->data->flags & MMC_DATA_WRITE) {
261 if (host->req->stop) {
262 tifm_sd_exec(host, host->req->stop);
275 if (host_status & TIFM_MMCSD_EOC) {
276 tifm_sd_fetch_resp(host->req->stop, sock);
282 dev_dbg(&sock->dev, "waiting for CARD, have %zd blocks\n",
283 host->written_blocks);
284 if (!(host->flags & CARD_BUSY)
285 && (host->written_blocks == cmd->data->blocks)) {
287 if (host->req->stop) {
288 tifm_sd_exec(host, host->req->stop);
300 if (host->flags & FIFO_RDY) {
301 host->flags &= ~FIFO_RDY;
302 if (host->req->stop) {
303 tifm_sd_exec(host, host->req->stop);
312 tasklet_schedule(&host->finish_tasklet);
318 /* Called from interrupt handler */
319 static void tifm_sd_signal_irq(struct tifm_dev *sock,
320 unsigned int sock_irq_status)
322 struct tifm_sd *host;
323 unsigned int host_status = 0, fifo_status = 0;
326 spin_lock(&sock->lock);
327 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
329 if (sock_irq_status & FIFO_EVENT) {
330 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
331 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
333 host->flags |= fifo_status & FIFO_RDY;
336 if (sock_irq_status & CARD_EVENT) {
337 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
338 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
343 if (host_status & TIFM_MMCSD_ERRMASK) {
344 if (host_status & TIFM_MMCSD_CERR)
345 error_code = MMC_ERR_FAILED;
347 & (TIFM_MMCSD_CTO | TIFM_MMCSD_DTO))
348 error_code = MMC_ERR_TIMEOUT;
350 & (TIFM_MMCSD_CCRC | TIFM_MMCSD_DCRC))
351 error_code = MMC_ERR_BADCRC;
353 writel(TIFM_FIFO_INT_SETALL,
354 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
355 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
357 if (host->req->stop) {
358 if (host->state == SCMD) {
359 host->req->stop->error = error_code;
360 } else if (host->state == BRS
361 || host->state == CARD
362 || host->state == FIFO) {
363 host->req->cmd->error = error_code;
364 tifm_sd_exec(host, host->req->stop);
368 host->req->cmd->error = error_code;
371 host->req->cmd->error = error_code;
376 if (host_status & TIFM_MMCSD_CB)
377 host->flags |= CARD_BUSY;
378 if ((host_status & TIFM_MMCSD_EOFB)
379 && (host->flags & CARD_BUSY)) {
380 host->written_blocks++;
381 host->flags &= ~CARD_BUSY;
386 tifm_sd_process_cmd(sock, host, host_status);
388 dev_dbg(&sock->dev, "host_status %x, fifo_status %x\n",
389 host_status, fifo_status);
390 spin_unlock(&sock->lock);
393 static void tifm_sd_prepare_data(struct tifm_sd *host, struct mmc_command *cmd)
395 struct tifm_dev *sock = host->dev;
396 unsigned int dest_cnt;
399 dev_dbg(&sock->dev, "setting dma for %d blocks\n",
401 writel(TIFM_FIFO_INT_SETALL,
402 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
403 writel(ilog2(cmd->data->blksz) - 2,
404 sock->addr + SOCK_FIFO_PAGE_SIZE);
405 writel(TIFM_FIFO_ENABLE, sock->addr + SOCK_FIFO_CONTROL);
406 writel(TIFM_FIFO_INTMASK, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
408 dest_cnt = (cmd->data->blocks) << 8;
410 writel(sg_dma_address(cmd->data->sg), sock->addr + SOCK_DMA_ADDRESS);
412 writel(cmd->data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
413 writel(cmd->data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
415 if (cmd->data->flags & MMC_DATA_WRITE) {
416 writel(TIFM_MMCSD_TXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
417 writel(dest_cnt | TIFM_DMA_TX | TIFM_DMA_EN,
418 sock->addr + SOCK_DMA_CONTROL);
420 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
421 writel(dest_cnt | TIFM_DMA_EN, sock->addr + SOCK_DMA_CONTROL);
425 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
426 struct mmc_data *data)
428 struct tifm_dev *sock = host->dev;
429 unsigned int data_timeout = data->timeout_clks;
434 data_timeout += data->timeout_ns /
435 ((1000000000UL / host->clk_freq) * host->clk_div);
437 if (data_timeout < 0xffff) {
438 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
439 writel((~TIFM_MMCSD_DPE)
440 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
441 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
443 data_timeout = (data_timeout >> 10) + 1;
444 if (data_timeout > 0xffff)
445 data_timeout = 0; /* set to unlimited */
446 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
447 writel(TIFM_MMCSD_DPE
448 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
449 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
453 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
455 struct tifm_sd *host = mmc_priv(mmc);
456 struct tifm_dev *sock = host->dev;
459 struct mmc_data *r_data = mrq->cmd->data;
461 spin_lock_irqsave(&sock->lock, flags);
462 if (host->flags & EJECT) {
463 spin_unlock_irqrestore(&sock->lock, flags);
468 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
469 spin_unlock_irqrestore(&sock->lock, flags);
474 tifm_sd_set_data_timeout(host, r_data);
476 sg_count = tifm_map_sg(sock, r_data->sg, r_data->sg_len,
477 mrq->cmd->flags & MMC_DATA_WRITE
478 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
480 printk(KERN_ERR DRIVER_NAME
481 ": scatterlist map failed\n");
482 spin_unlock_irqrestore(&sock->lock, flags);
486 host->written_blocks = 0;
487 host->flags &= ~CARD_BUSY;
488 tifm_sd_prepare_data(host, mrq->cmd);
492 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
494 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
495 sock->addr + SOCK_CONTROL);
496 tifm_sd_exec(host, mrq->cmd);
497 spin_unlock_irqrestore(&sock->lock, flags);
502 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
503 (r_data->flags & MMC_DATA_WRITE)
504 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
506 mrq->cmd->error = MMC_ERR_TIMEOUT;
507 mmc_request_done(mmc, mrq);
510 static void tifm_sd_end_cmd(unsigned long data)
512 struct tifm_sd *host = (struct tifm_sd*)data;
513 struct tifm_dev *sock = host->dev;
514 struct mmc_host *mmc = tifm_get_drvdata(sock);
515 struct mmc_request *mrq;
516 struct mmc_data *r_data = NULL;
519 spin_lock_irqsave(&sock->lock, flags);
521 del_timer(&host->timer);
527 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
528 spin_unlock_irqrestore(&sock->lock, flags);
532 r_data = mrq->cmd->data;
534 if (r_data->flags & MMC_DATA_WRITE) {
535 r_data->bytes_xfered = host->written_blocks
538 r_data->bytes_xfered = r_data->blocks -
539 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
540 r_data->bytes_xfered *= r_data->blksz;
541 r_data->bytes_xfered += r_data->blksz -
542 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
544 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
545 (r_data->flags & MMC_DATA_WRITE)
546 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
549 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
550 sock->addr + SOCK_CONTROL);
552 spin_unlock_irqrestore(&sock->lock, flags);
553 mmc_request_done(mmc, mrq);
556 static void tifm_sd_request_nodma(struct mmc_host *mmc, struct mmc_request *mrq)
558 struct tifm_sd *host = mmc_priv(mmc);
559 struct tifm_dev *sock = host->dev;
561 struct mmc_data *r_data = mrq->cmd->data;
563 spin_lock_irqsave(&sock->lock, flags);
564 if (host->flags & EJECT) {
565 spin_unlock_irqrestore(&sock->lock, flags);
570 printk(KERN_ERR DRIVER_NAME ": unfinished request detected\n");
571 spin_unlock_irqrestore(&sock->lock, flags);
576 tifm_sd_set_data_timeout(host, r_data);
578 host->buffer_size = mrq->cmd->data->blocks
579 * mrq->cmd->data->blksz;
581 writel(TIFM_MMCSD_BUFINT
582 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
583 sock->addr + SOCK_MMCSD_INT_ENABLE);
584 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
585 | (TIFM_MMCSD_FIFO_SIZE - 1),
586 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
588 host->written_blocks = 0;
589 host->flags &= ~CARD_BUSY;
590 host->buffer_pos = 0;
591 writel(r_data->blocks - 1, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
592 writel(r_data->blksz - 1, sock->addr + SOCK_MMCSD_BLOCK_LEN);
596 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
598 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
599 sock->addr + SOCK_CONTROL);
600 tifm_sd_exec(host, mrq->cmd);
601 spin_unlock_irqrestore(&sock->lock, flags);
605 mrq->cmd->error = MMC_ERR_TIMEOUT;
606 mmc_request_done(mmc, mrq);
609 static void tifm_sd_end_cmd_nodma(unsigned long data)
611 struct tifm_sd *host = (struct tifm_sd*)data;
612 struct tifm_dev *sock = host->dev;
613 struct mmc_host *mmc = tifm_get_drvdata(sock);
614 struct mmc_request *mrq;
615 struct mmc_data *r_data = NULL;
618 spin_lock_irqsave(&sock->lock, flags);
620 del_timer(&host->timer);
626 printk(KERN_ERR DRIVER_NAME ": no request to complete?\n");
627 spin_unlock_irqrestore(&sock->lock, flags);
631 r_data = mrq->cmd->data;
633 writel((~TIFM_MMCSD_BUFINT) &
634 readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
635 sock->addr + SOCK_MMCSD_INT_ENABLE);
637 if (r_data->flags & MMC_DATA_WRITE) {
638 r_data->bytes_xfered = host->written_blocks
641 r_data->bytes_xfered = r_data->blocks -
642 readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
643 r_data->bytes_xfered *= r_data->blksz;
644 r_data->bytes_xfered += r_data->blksz -
645 readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
647 host->buffer_pos = 0;
648 host->buffer_size = 0;
651 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
652 sock->addr + SOCK_CONTROL);
654 spin_unlock_irqrestore(&sock->lock, flags);
656 mmc_request_done(mmc, mrq);
659 static void tifm_sd_terminate(struct tifm_sd *host)
661 struct tifm_dev *sock = host->dev;
664 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
666 spin_lock_irqsave(&sock->lock, flags);
667 host->flags |= EJECT;
669 writel(TIFM_FIFO_INT_SETALL,
670 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
671 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
672 tasklet_schedule(&host->finish_tasklet);
674 spin_unlock_irqrestore(&sock->lock, flags);
677 static void tifm_sd_abort(unsigned long data)
679 struct tifm_sd *host = (struct tifm_sd*)data;
681 printk(KERN_ERR DRIVER_NAME
682 ": card failed to respond for a long period of time");
684 tifm_sd_terminate(host);
685 tifm_eject(host->dev);
688 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
690 struct tifm_sd *host = mmc_priv(mmc);
691 struct tifm_dev *sock = host->dev;
692 unsigned int clk_div1, clk_div2;
695 spin_lock_irqsave(&sock->lock, flags);
697 dev_dbg(&sock->dev, "Setting bus width %d, power %d\n", ios->bus_width,
699 if (ios->bus_width == MMC_BUS_WIDTH_4) {
700 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
701 sock->addr + SOCK_MMCSD_CONFIG);
703 writel((~TIFM_MMCSD_4BBUS)
704 & readl(sock->addr + SOCK_MMCSD_CONFIG),
705 sock->addr + SOCK_MMCSD_CONFIG);
709 clk_div1 = 20000000 / ios->clock;
713 clk_div2 = 24000000 / ios->clock;
717 if ((20000000 / clk_div1) > ios->clock)
719 if ((24000000 / clk_div2) > ios->clock)
721 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
722 host->clk_freq = 20000000;
723 host->clk_div = clk_div1;
724 writel((~TIFM_CTRL_FAST_CLK)
725 & readl(sock->addr + SOCK_CONTROL),
726 sock->addr + SOCK_CONTROL);
728 host->clk_freq = 24000000;
729 host->clk_div = clk_div2;
730 writel(TIFM_CTRL_FAST_CLK
731 | readl(sock->addr + SOCK_CONTROL),
732 sock->addr + SOCK_CONTROL);
737 host->clk_div &= TIFM_MMCSD_CLKMASK;
739 | ((~TIFM_MMCSD_CLKMASK)
740 & readl(sock->addr + SOCK_MMCSD_CONFIG)),
741 sock->addr + SOCK_MMCSD_CONFIG);
743 if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
744 host->flags |= OPENDRAIN;
746 host->flags &= ~OPENDRAIN;
748 /* chip_select : maybe later */
750 //power is set before probe / after remove
751 //I believe, power_off when already marked for eject is sufficient to
753 if ((host->flags & EJECT) && ios->power_mode == MMC_POWER_OFF) {
754 host->flags |= EJECT_DONE;
755 wake_up_all(&host->notify);
758 spin_unlock_irqrestore(&sock->lock, flags);
761 static int tifm_sd_ro(struct mmc_host *mmc)
764 struct tifm_sd *host = mmc_priv(mmc);
765 struct tifm_dev *sock = host->dev;
768 spin_lock_irqsave(&sock->lock, flags);
770 host->flags |= (CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE));
771 rc = (host->flags & CARD_RO) ? 1 : 0;
773 spin_unlock_irqrestore(&sock->lock, flags);
777 static struct mmc_host_ops tifm_sd_ops = {
778 .request = tifm_sd_request,
779 .set_ios = tifm_sd_ios,
783 static int tifm_sd_initialize_host(struct tifm_sd *host)
786 unsigned int host_status = 0;
787 struct tifm_dev *sock = host->dev;
789 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
792 host->clk_freq = 20000000;
793 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
794 writel(host->clk_div | TIFM_MMCSD_POWER,
795 sock->addr + SOCK_MMCSD_CONFIG);
797 /* wait up to 0.51 sec for reset */
798 for (rc = 2; rc <= 256; rc <<= 1) {
799 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
807 printk(KERN_ERR DRIVER_NAME
808 ": controller failed to reset\n");
812 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
813 writel(host->clk_div | TIFM_MMCSD_POWER,
814 sock->addr + SOCK_MMCSD_CONFIG);
815 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
817 // command timeout fixed to 64 clocks for now
818 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
819 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
821 /* INAB should take much less than reset */
822 for (rc = 1; rc <= 16; rc <<= 1) {
823 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
824 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
825 if (!(host_status & TIFM_MMCSD_ERRMASK)
826 && (host_status & TIFM_MMCSD_EOC)) {
834 printk(KERN_ERR DRIVER_NAME
835 ": card not ready - probe failed on initialization\n");
839 writel(TIFM_MMCSD_DATAMASK | TIFM_MMCSD_ERRMASK,
840 sock->addr + SOCK_MMCSD_INT_ENABLE);
846 static int tifm_sd_probe(struct tifm_dev *sock)
848 struct mmc_host *mmc;
849 struct tifm_sd *host;
852 if (!(TIFM_SOCK_STATE_OCCUPIED
853 & readl(sock->addr + SOCK_PRESENT_STATE))) {
854 printk(KERN_WARNING DRIVER_NAME ": card gone, unexpectedly\n");
858 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
862 host = mmc_priv(mmc);
863 tifm_set_drvdata(sock, mmc);
865 host->timeout_jiffies = msecs_to_jiffies(1000);
867 init_waitqueue_head(&host->notify);
868 tasklet_init(&host->finish_tasklet,
869 no_dma ? tifm_sd_end_cmd_nodma : tifm_sd_end_cmd,
870 (unsigned long)host);
871 setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host);
873 tifm_sd_ops.request = no_dma ? tifm_sd_request_nodma : tifm_sd_request;
874 mmc->ops = &tifm_sd_ops;
875 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
876 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE;
877 mmc->f_min = 20000000 / 60;
878 mmc->f_max = 24000000;
879 mmc->max_hw_segs = 1;
880 mmc->max_phys_segs = 1;
881 // limited by DMA counter - it's safer to stick with
882 // block counter has 11 bits though
883 mmc->max_blk_count = 256;
884 // 2k maximum hw block length
885 mmc->max_blk_size = 2048;
886 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
887 mmc->max_seg_size = mmc->max_req_size;
888 sock->signal_irq = tifm_sd_signal_irq;
889 rc = tifm_sd_initialize_host(host);
892 rc = mmc_add_host(mmc);
902 static void tifm_sd_remove(struct tifm_dev *sock)
904 struct mmc_host *mmc = tifm_get_drvdata(sock);
905 struct tifm_sd *host = mmc_priv(mmc);
907 del_timer_sync(&host->timer);
908 tifm_sd_terminate(host);
909 wait_event_timeout(host->notify, host->flags & EJECT_DONE,
910 host->timeout_jiffies);
911 tasklet_kill(&host->finish_tasklet);
912 mmc_remove_host(mmc);
914 /* The meaning of the bit majority in this constant is unknown. */
915 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
916 sock->addr + SOCK_CONTROL);
918 tifm_set_drvdata(sock, NULL);
924 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
926 struct mmc_host *mmc = tifm_get_drvdata(sock);
929 rc = mmc_suspend_host(mmc, state);
930 /* The meaning of the bit majority in this constant is unknown. */
931 writel(0xfff8 & readl(sock->addr + SOCK_CONTROL),
932 sock->addr + SOCK_CONTROL);
936 static int tifm_sd_resume(struct tifm_dev *sock)
938 struct mmc_host *mmc = tifm_get_drvdata(sock);
939 struct tifm_sd *host = mmc_priv(mmc);
941 if (sock->media_id != FM_SD
942 || tifm_sd_initialize_host(host)) {
946 return mmc_resume_host(mmc);
952 #define tifm_sd_suspend NULL
953 #define tifm_sd_resume NULL
955 #endif /* CONFIG_PM */
957 static tifm_media_id tifm_sd_id_tbl[] = {
961 static struct tifm_driver tifm_sd_driver = {
966 .id_table = tifm_sd_id_tbl,
967 .probe = tifm_sd_probe,
968 .remove = tifm_sd_remove,
969 .suspend = tifm_sd_suspend,
970 .resume = tifm_sd_resume
973 static int __init tifm_sd_init(void)
975 return tifm_register_driver(&tifm_sd_driver);
978 static void __exit tifm_sd_exit(void)
980 tifm_unregister_driver(&tifm_sd_driver);
983 MODULE_AUTHOR("Alex Dubov");
984 MODULE_DESCRIPTION("TI FlashMedia SD driver");
985 MODULE_LICENSE("GPL");
986 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
987 MODULE_VERSION(DRIVER_VERSION);
989 module_init(tifm_sd_init);
990 module_exit(tifm_sd_exit);