2 * SBC8349E Device Tree Source
4 * Copyright 2007 Wind River Inc.
6 * Paul Gortmaker (see MAINTAINERS for contact information)
8 * -based largely on the Freescale MPC834x_MDS dts.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
20 compatible = "SBC834xE";
39 d-cache-line-size = <32>;
40 i-cache-line-size = <32>;
41 d-cache-size = <32768>;
42 i-cache-size = <32768>;
43 timebase-frequency = <0>; // from bootloader
44 bus-frequency = <0>; // from bootloader
45 clock-frequency = <0>; // from bootloader
50 device_type = "memory";
51 reg = <0x00000000 0x10000000>; // 256MB at 0
58 ranges = <0x0 0xe0000000 0x00100000>;
59 reg = <0xe0000000 0x00000200>;
63 compatible = "mpc83xx_wdt";
71 compatible = "fsl-i2c";
73 interrupts = <14 0x8>;
74 interrupt-parent = <&ipic>;
82 compatible = "fsl-i2c";
84 interrupts = <15 0x8>;
85 interrupt-parent = <&ipic>;
91 compatible = "fsl,spi";
92 reg = <0x7000 0x1000>;
93 interrupts = <16 0x8>;
94 interrupt-parent = <&ipic>;
101 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
103 ranges = <0 0x8100 0x1a8>;
104 interrupt-parent = <&ipic>;
108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
111 interrupt-parent = <&ipic>;
115 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
118 interrupt-parent = <&ipic>;
122 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
125 interrupt-parent = <&ipic>;
129 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
132 interrupt-parent = <&ipic>;
137 /* phy type (ULPI or SERIAL) are only types supported for MPH */
140 compatible = "fsl-usb2-mph";
141 reg = <0x22000 0x1000>;
142 #address-cells = <1>;
144 interrupt-parent = <&ipic>;
145 interrupts = <39 0x8>;
149 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
152 compatible = "fsl-usb2-dr";
153 reg = <0x23000 0x1000>;
154 #address-cells = <1>;
156 interrupt-parent = <&ipic>;
157 interrupts = <38 0x8>;
163 #address-cells = <1>;
165 compatible = "fsl,gianfar-mdio";
166 reg = <0x24520 0x20>;
168 phy0: ethernet-phy@19 {
169 interrupt-parent = <&ipic>;
170 interrupts = <20 0x8>;
172 device_type = "ethernet-phy";
174 phy1: ethernet-phy@1a {
175 interrupt-parent = <&ipic>;
176 interrupts = <21 0x8>;
178 device_type = "ethernet-phy";
182 device_type = "tbi-phy";
187 #address-cells = <1>;
189 compatible = "fsl,gianfar-tbi";
190 reg = <0x25520 0x20>;
194 device_type = "tbi-phy";
198 enet0: ethernet@24000 {
200 device_type = "network";
202 compatible = "gianfar";
203 reg = <0x24000 0x1000>;
204 local-mac-address = [ 00 00 00 00 00 00 ];
205 interrupts = <32 0x8 33 0x8 34 0x8>;
206 interrupt-parent = <&ipic>;
207 tbi-handle = <&tbi0>;
208 phy-handle = <&phy0>;
209 linux,network-index = <0>;
212 enet1: ethernet@25000 {
214 device_type = "network";
216 compatible = "gianfar";
217 reg = <0x25000 0x1000>;
218 local-mac-address = [ 00 00 00 00 00 00 ];
219 interrupts = <35 0x8 36 0x8 37 0x8>;
220 interrupt-parent = <&ipic>;
221 tbi-handle = <&tbi1>;
222 phy-handle = <&phy1>;
223 linux,network-index = <1>;
226 serial0: serial@4500 {
228 device_type = "serial";
229 compatible = "ns16550";
230 reg = <0x4500 0x100>;
231 clock-frequency = <0>;
232 interrupts = <9 0x8>;
233 interrupt-parent = <&ipic>;
236 serial1: serial@4600 {
238 device_type = "serial";
239 compatible = "ns16550";
240 reg = <0x4600 0x100>;
241 clock-frequency = <0>;
242 interrupts = <10 0x8>;
243 interrupt-parent = <&ipic>;
247 compatible = "fsl,sec2.0";
248 reg = <0x30000 0x10000>;
249 interrupts = <11 0x8>;
250 interrupt-parent = <&ipic>;
251 fsl,num-channels = <4>;
252 fsl,channel-fifo-len = <24>;
253 fsl,exec-units-mask = <0x7e>;
254 fsl,descriptor-types-mask = <0x01010ebf>;
258 * interrupts cell = <intr #, sense>
259 * sense values match linux IORESOURCE_IRQ_* defines:
260 * sense == 8: Level, low assertion
261 * sense == 2: Edge, high-to-low change
264 interrupt-controller;
265 #address-cells = <0>;
266 #interrupt-cells = <2>;
268 device_type = "ipic";
274 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
278 0x8800 0x0 0x0 0x1 &ipic 20 0x8
279 0x8800 0x0 0x0 0x2 &ipic 21 0x8
280 0x8800 0x0 0x0 0x3 &ipic 22 0x8
281 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
283 interrupt-parent = <&ipic>;
284 interrupts = <0x42 0x8>;
286 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
287 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
288 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
289 clock-frequency = <66666666>;
290 #interrupt-cells = <1>;
292 #address-cells = <3>;
293 reg = <0xe0008500 0x100 /* internal registers */
294 0xe0008300 0x8>; /* config space access registers */
295 compatible = "fsl,mpc8349-pci";