1 #ifndef __ASM_X86_XSAVE_H
2 #define __ASM_X86_XSAVE_H
4 #include <asm/processor.h>
10 #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE)
12 #define FXSAVE_SIZE 512
15 * These are the features that the OS can handle currently.
17 #define XCNTXT_LMASK (XSTATE_FP | XSTATE_SSE)
18 #define XCNTXT_HMASK 0x0
21 #define REX_PREFIX "0x48, "
26 extern unsigned int xstate_size, pcntxt_hmask, pcntxt_lmask;
27 extern struct xsave_struct *init_xstate_buf;
29 extern void xsave_cntxt_init(void);
30 extern void xsave_init(void);
31 extern int init_fpu(struct task_struct *child);
33 static inline int xrstor_checking(struct xsave_struct *fx)
37 asm volatile("1: .byte " REX_PREFIX "0x0f,0xae,0x2f\n\t"
39 ".section .fixup,\"ax\"\n"
40 "3: movl $-1,%[err]\n"
45 : "D" (fx), "m" (*fx), "a" (-1), "d" (-1), "0" (0)
51 static inline void xsave(struct task_struct *tsk)
53 /* This, however, we can work around by forcing the compiler to select
54 an addressing mode that doesn't require extended registers. */
55 __asm__ __volatile__(".byte " REX_PREFIX "0x0f,0xae,0x27"
56 : : "D" (&(tsk->thread.xstate->xsave)),
57 "a" (-1), "d"(-1) : "memory");