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   1 /*
   2         drivers/net/tulip/media.c
   3
   4         Maintained by Valerie Henson <val_henson@linux.intel.com>
   5         Copyright 2000,2001  The Linux Kernel Team
   6         Written/copyright 1994-2001 by Donald Becker.
   7
   8         This software may be used and distributed according to the terms
   9         of the GNU General Public License, incorporated herein by reference.
  10
  11         Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
  12         for more information on this driver, or visit the project
  13         Web page at http://sourceforge.net/projects/tulip/
  14
  15 */
  16
  17 #include <linux/kernel.h>
  18 #include <linux/mii.h>
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include "tulip.h"
  23
  24
  25 /* The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
  26    met by back-to-back PCI I/O cycles, but we insert a delay to avoid
  27    "overclocking" issues or future 66Mhz PCI. */
  28 #define mdio_delay() ioread32(mdio_addr)
  29
  30 /* Read and write the MII registers using software-generated serial
  31    MDIO protocol.  It is just different enough from the EEPROM protocol
  32    to not share code.  The maxium data clock rate is 2.5 Mhz. */
  33 #define MDIO_SHIFT_CLK          0x10000
  34 #define MDIO_DATA_WRITE0        0x00000
  35 #define MDIO_DATA_WRITE1        0x20000
  36 #define MDIO_ENB                0x00000 /* Ignore the 0x02000 databook setting. */
  37 #define MDIO_ENB_IN             0x40000
  38 #define MDIO_DATA_READ          0x80000
  39
  40 static const unsigned char comet_miireg2offset[32] = {
  41         0xB4, 0xB8, 0xBC, 0xC0,  0xC4, 0xC8, 0xCC, 0,  0,0,0,0,  0,0,0,0,
  42         0,0xD0,0,0,  0,0,0,0,  0,0,0,0, 0, 0xD4, 0xD8, 0xDC, };
  43
  44
  45 /* MII transceiver control section.
  46    Read and write the MII registers using software-generated serial
  47    MDIO protocol.
  48    See IEEE 802.3-2002.pdf (Section 2, Chapter "22.2.4 Management functions")
  49    or DP83840A data sheet for more details.
  50    */
  51
  52 int tulip_mdio_read(struct net_device *dev, int phy_id, int location)
  53 {
  54         struct tulip_private *tp = netdev_priv(dev);
  55         int i;
  56         int read_cmd = (0xf6 << 10) | ((phy_id & 0x1f) << 5) | location;
  57         int retval = 0;
  58         void __iomem *ioaddr = tp->base_addr;
  59         void __iomem *mdio_addr = ioaddr + CSR9;
  60         unsigned long flags;
  61
  62         if (location & ~0x1f)
  63                 return 0xffff;
  64
  65         if (tp->chip_id == COMET  &&  phy_id == 30) {
  66                 if (comet_miireg2offset[location])
  67                         return ioread32(ioaddr + comet_miireg2offset[location]);
  68                 return 0xffff;
  69         }
  70
  71         spin_lock_irqsave(&tp->mii_lock, flags);
  72         if (tp->chip_id == LC82C168) {
  73                 int i = 1000;
  74                 iowrite32(0x60020000 + (phy_id<<23) + (location<<18), ioaddr + 0xA0);
  75                 ioread32(ioaddr + 0xA0);
  76                 ioread32(ioaddr + 0xA0);
  77                 while (--i > 0) {
  78                         barrier();
  79                         if ( ! ((retval = ioread32(ioaddr + 0xA0)) & 0x80000000))
  80                                 break;
  81                 }
  82                 spin_unlock_irqrestore(&tp->mii_lock, flags);
  83                 return retval & 0xffff;
  84         }
  85
  86         /* Establish sync by sending at least 32 logic ones. */
  87         for (i = 32; i >= 0; i--) {
  88                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
  89                 mdio_delay();
  90                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
  91                 mdio_delay();
  92         }
  93         /* Shift the read command bits out. */
  94         for (i = 15; i >= 0; i--) {
  95                 int dataval = (read_cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
  96
  97                 iowrite32(MDIO_ENB | dataval, mdio_addr);
  98                 mdio_delay();
  99                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
 100                 mdio_delay();
 101         }
 102         /* Read the two transition, 16 data, and wire-idle bits. */
 103         for (i = 19; i > 0; i--) {
 104                 iowrite32(MDIO_ENB_IN, mdio_addr);
 105                 mdio_delay();
 106                 retval = (retval << 1) | ((ioread32(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
 107                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
 108                 mdio_delay();
 109         }
 110
 111         spin_unlock_irqrestore(&tp->mii_lock, flags);
 112         return (retval>>1) & 0xffff;
 113 }
 114
 115 void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int val)
 116 {
 117         struct tulip_private *tp = netdev_priv(dev);
 118         int i;
 119         int cmd = (0x5002 << 16) | ((phy_id & 0x1f) << 23) | (location<<18) | (val & 0xffff);
 120         void __iomem *ioaddr = tp->base_addr;
 121         void __iomem *mdio_addr = ioaddr + CSR9;
 122         unsigned long flags;
 123
 124         if (location & ~0x1f)
 125                 return;
 126
 127         if (tp->chip_id == COMET && phy_id == 30) {
 128                 if (comet_miireg2offset[location])
 129                         iowrite32(val, ioaddr + comet_miireg2offset[location]);
 130                 return;
 131         }
 132
 133         spin_lock_irqsave(&tp->mii_lock, flags);
 134         if (tp->chip_id == LC82C168) {
 135                 int i = 1000;
 136                 iowrite32(cmd, ioaddr + 0xA0);
 137                 do {
 138                         barrier();
 139                         if ( ! (ioread32(ioaddr + 0xA0) & 0x80000000))
 140                                 break;
 141                 } while (--i > 0);
 142                 spin_unlock_irqrestore(&tp->mii_lock, flags);
 143                 return;
 144         }
 145
 146         /* Establish sync by sending 32 logic ones. */
 147         for (i = 32; i >= 0; i--) {
 148                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1, mdio_addr);
 149                 mdio_delay();
 150                 iowrite32(MDIO_ENB | MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
 151                 mdio_delay();
 152         }
 153         /* Shift the command bits out. */
 154         for (i = 31; i >= 0; i--) {
 155                 int dataval = (cmd & (1 << i)) ? MDIO_DATA_WRITE1 : 0;
 156                 iowrite32(MDIO_ENB | dataval, mdio_addr);
 157                 mdio_delay();
 158                 iowrite32(MDIO_ENB | dataval | MDIO_SHIFT_CLK, mdio_addr);
 159                 mdio_delay();
 160         }
 161         /* Clear out extra bits. */
 162         for (i = 2; i > 0; i--) {
 163                 iowrite32(MDIO_ENB_IN, mdio_addr);
 164                 mdio_delay();
 165                 iowrite32(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
 166                 mdio_delay();
 167         }
 168
 169         spin_unlock_irqrestore(&tp->mii_lock, flags);
 170 }
 171
 172
 173 /* Set up the transceiver control registers for the selected media type. */
 174 void tulip_select_media(struct net_device *dev, int startup)
 175 {
 176         struct tulip_private *tp = netdev_priv(dev);
 177         void __iomem *ioaddr = tp->base_addr;
 178         struct mediatable *mtable = tp->mtable;
 179         u32 new_csr6;
 180         int i;
 181
 182         if (mtable) {
 183                 struct medialeaf *mleaf = &mtable->mleaf[tp->cur_index];
 184                 unsigned char *p = mleaf->leafdata;
 185                 switch (mleaf->type) {
 186                 case 0:                                 /* 21140 non-MII xcvr. */
 187                         if (tulip_debug > 1)
 188                                 printk(KERN_DEBUG "%s: Using a 21140 non-MII transceiver"
 189                                            " with control setting %2.2x.\n",
 190                                            dev->name, p[1]);
 191                         dev->if_port = p[0];
 192                         if (startup)
 193                                 iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
 194                         iowrite32(p[1], ioaddr + CSR12);
 195                         new_csr6 = 0x02000000 | ((p[2] & 0x71) << 18);
 196                         break;
 197                 case 2: case 4: {
 198                         u16 setup[5];
 199                         u32 csr13val, csr14val, csr15dir, csr15val;
 200                         for (i = 0; i < 5; i++)
 201                                 setup[i] = get_u16(&p[i*2 + 1]);
 202
 203                         dev->if_port = p[0] & MEDIA_MASK;
 204                         if (tulip_media_cap[dev->if_port] & MediaAlwaysFD)
 205                                 tp->full_duplex = 1;
 206
 207                         if (startup && mtable->has_reset) {
 208                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
 209                                 unsigned char *rst = rleaf->leafdata;
 210                                 if (tulip_debug > 1)
 211                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
 212                                                    dev->name);
 213                                 for (i = 0; i < rst[0]; i++)
 214                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
 215                         }
 216                         if (tulip_debug > 1)
 217                                 printk(KERN_DEBUG "%s: 21143 non-MII %s transceiver control "
 218                                            "%4.4x/%4.4x.\n",
 219                                            dev->name, medianame[dev->if_port], setup[0], setup[1]);
 220                         if (p[0] & 0x40) {      /* SIA (CSR13-15) setup values are provided. */
 221                                 csr13val = setup[0];
 222                                 csr14val = setup[1];
 223                                 csr15dir = (setup[3]<<16) | setup[2];
 224                                 csr15val = (setup[4]<<16) | setup[2];
 225                                 iowrite32(0, ioaddr + CSR13);
 226                                 iowrite32(csr14val, ioaddr + CSR14);
 227                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
 228                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
 229                                 iowrite32(csr13val, ioaddr + CSR13);
 230                         } else {
 231                                 csr13val = 1;
 232                                 csr14val = 0;
 233                                 csr15dir = (setup[0]<<16) | 0x0008;
 234                                 csr15val = (setup[1]<<16) | 0x0008;
 235                                 if (dev->if_port <= 4)
 236                                         csr14val = t21142_csr14[dev->if_port];
 237                                 if (startup) {
 238                                         iowrite32(0, ioaddr + CSR13);
 239                                         iowrite32(csr14val, ioaddr + CSR14);
 240                                 }
 241                                 iowrite32(csr15dir, ioaddr + CSR15);    /* Direction */
 242                                 iowrite32(csr15val, ioaddr + CSR15);    /* Data */
 243                                 if (startup) iowrite32(csr13val, ioaddr + CSR13);
 244                         }
 245                         if (tulip_debug > 1)
 246                                 printk(KERN_DEBUG "%s:  Setting CSR15 to %8.8x/%8.8x.\n",
 247                                            dev->name, csr15dir, csr15val);
 248                         if (mleaf->type == 4)
 249                                 new_csr6 = 0x82020000 | ((setup[2] & 0x71) << 18);
 250                         else
 251                                 new_csr6 = 0x82420000;
 252                         break;
 253                 }
 254                 case 1: case 3: {
 255                         int phy_num = p[0];
 256                         int init_length = p[1];
 257                         u16 *misc_info, tmp_info;
 258
 259                         dev->if_port = 11;
 260                         new_csr6 = 0x020E0000;
 261                         if (mleaf->type == 3) { /* 21142 */
 262                                 u16 *init_sequence = (u16*)(p+2);
 263                                 u16 *reset_sequence = &((u16*)(p+3))[init_length];
 264                                 int reset_length = p[2 + init_length*2];
 265                                 misc_info = reset_sequence + reset_length;
 266                                 if (startup)
 267                                         for (i = 0; i < reset_length; i++)
 268                                                 iowrite32(get_u16(&reset_sequence[i]) << 16, ioaddr + CSR15);
 269                                 for (i = 0; i < init_length; i++)
 270                                         iowrite32(get_u16(&init_sequence[i]) << 16, ioaddr + CSR15);
 271                         } else {
 272                                 u8 *init_sequence = p + 2;
 273                                 u8 *reset_sequence = p + 3 + init_length;
 274                                 int reset_length = p[2 + init_length];
 275                                 misc_info = (u16*)(reset_sequence + reset_length);
 276                                 if (startup) {
 277                                         int timeout = 10;       /* max 1 ms */
 278                                         iowrite32(mtable->csr12dir | 0x100, ioaddr + CSR12);
 279                                         for (i = 0; i < reset_length; i++)
 280                                                 iowrite32(reset_sequence[i], ioaddr + CSR12);
 281
 282                                         /* flush posted writes */
 283                                         ioread32(ioaddr + CSR12);
 284
 285                                         /* Sect 3.10.3 in DP83840A.pdf (p39) */
 286                                         udelay(500);
 287
 288                                         /* Section 4.2 in DP83840A.pdf (p43) */
 289                                         /* and IEEE 802.3 "22.2.4.1.1 Reset" */
 290                                         while (timeout-- &&
 291                                                 (tulip_mdio_read (dev, phy_num, MII_BMCR) & BMCR_RESET))
 292                                                 udelay(100);
 293                                 }
 294                                 for (i = 0; i < init_length; i++)
 295                                         iowrite32(init_sequence[i], ioaddr + CSR12);
 296
 297                                 ioread32(ioaddr + CSR12);       /* flush posted writes */
 298                         }
 299
 300                         tmp_info = get_u16(&misc_info[1]);
 301                         if (tmp_info)
 302                                 tp->advertising[phy_num] = tmp_info | 1;
 303                         if (tmp_info && startup < 2) {
 304                                 if (tp->mii_advertise == 0)
 305                                         tp->mii_advertise = tp->advertising[phy_num];
 306                                 if (tulip_debug > 1)
 307                                         printk(KERN_DEBUG "%s:  Advertising %4.4x on MII %d.\n",
 308                                                dev->name, tp->mii_advertise, tp->phys[phy_num]);
 309                                 tulip_mdio_write(dev, tp->phys[phy_num], 4, tp->mii_advertise);
 310                         }
 311                         break;
 312                 }
 313                 case 5: case 6: {
 314                         u16 setup[5];
 315
 316                         new_csr6 = 0; /* FIXME */
 317
 318                         for (i = 0; i < 5; i++)
 319                                 setup[i] = get_u16(&p[i*2 + 1]);
 320
 321                         if (startup && mtable->has_reset) {
 322                                 struct medialeaf *rleaf = &mtable->mleaf[mtable->has_reset];
 323                                 unsigned char *rst = rleaf->leafdata;
 324                                 if (tulip_debug > 1)
 325                                         printk(KERN_DEBUG "%s: Resetting the transceiver.\n",
 326                                                    dev->name);
 327                                 for (i = 0; i < rst[0]; i++)
 328                                         iowrite32(get_u16(rst + 1 + (i<<1)) << 16, ioaddr + CSR15);
 329                         }
 330
 331                         break;
 332                 }
 333                 default:
 334                         printk(KERN_DEBUG "%s:  Invalid media table selection %d.\n",
 335                                            dev->name, mleaf->type);
 336                         new_csr6 = 0x020E0000;
 337                 }
 338                 if (tulip_debug > 1)
 339                         printk(KERN_DEBUG "%s: Using media type %s, CSR12 is %2.2x.\n",
 340                                    dev->name, medianame[dev->if_port],
 341                                    ioread32(ioaddr + CSR12) & 0xff);
 342         } else if (tp->chip_id == LC82C168) {
 343                 if (startup && ! tp->medialock)
 344                         dev->if_port = tp->mii_cnt ? 11 : 0;
 345                 if (tulip_debug > 1)
 346                         printk(KERN_DEBUG "%s: PNIC PHY status is %3.3x, media %s.\n",
 347                                    dev->name, ioread32(ioaddr + 0xB8), medianame[dev->if_port]);
 348                 if (tp->mii_cnt) {
 349                         new_csr6 = 0x810C0000;
 350                         iowrite32(0x0001, ioaddr + CSR15);
 351                         iowrite32(0x0201B07A, ioaddr + 0xB8);
 352                 } else if (startup) {
 353                         /* Start with 10mbps to do autonegotiation. */
 354                         iowrite32(0x32, ioaddr + CSR12);
 355                         new_csr6 = 0x00420000;
 356                         iowrite32(0x0001B078, ioaddr + 0xB8);
 357                         iowrite32(0x0201B078, ioaddr + 0xB8);
 358                 } else if (dev->if_port == 3  ||  dev->if_port == 5) {
 359                         iowrite32(0x33, ioaddr + CSR12);
 360                         new_csr6 = 0x01860000;
 361                         /* Trigger autonegotiation. */
 362                         iowrite32(startup ? 0x0201F868 : 0x0001F868, ioaddr + 0xB8);
 363                 } else {
 364                         iowrite32(0x32, ioaddr + CSR12);
 365                         new_csr6 = 0x00420000;
 366                         iowrite32(0x1F078, ioaddr + 0xB8);
 367                 }
 368         } else {                                        /* Unknown chip type with no media table. */
 369                 if (tp->default_port == 0)
 370                         dev->if_port = tp->mii_cnt ? 11 : 3;
 371                 if (tulip_media_cap[dev->if_port] & MediaIsMII) {
 372                         new_csr6 = 0x020E0000;
 373                 } else if (tulip_media_cap[dev->if_port] & MediaIsFx) {
 374                         new_csr6 = 0x02860000;
 375                 } else
 376                         new_csr6 = 0x03860000;
 377                 if (tulip_debug > 1)
 378                         printk(KERN_DEBUG "%s: No media description table, assuming "
 379                                    "%s transceiver, CSR12 %2.2x.\n",
 380                                    dev->name, medianame[dev->if_port],
 381                                    ioread32(ioaddr + CSR12));
 382         }
 383
 384         tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0);
 385
 386         mdelay(1);
 387
 388         return;
 389 }
 390
 391 /*
 392   Check the MII negotiated duplex and change the CSR6 setting if
 393   required.
 394   Return 0 if everything is OK.
 395   Return < 0 if the transceiver is missing or has no link beat.
 396   */
 397 int tulip_check_duplex(struct net_device *dev)
 398 {
 399         struct tulip_private *tp = netdev_priv(dev);
 400         unsigned int bmsr, lpa, negotiated, new_csr6;
 401
 402         bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
 403         lpa = tulip_mdio_read(dev, tp->phys[0], MII_LPA);
 404         if (tulip_debug > 1)
 405                 printk(KERN_INFO "%s: MII status %4.4x, Link partner report "
 406                            "%4.4x.\n", dev->name, bmsr, lpa);
 407         if (bmsr == 0xffff)
 408                 return -2;
 409         if ((bmsr & BMSR_LSTATUS) == 0) {
 410                 int new_bmsr = tulip_mdio_read(dev, tp->phys[0], MII_BMSR);
 411                 if ((new_bmsr & BMSR_LSTATUS) == 0) {
 412                         if (tulip_debug  > 1)
 413                                 printk(KERN_INFO "%s: No link beat on the MII interface,"
 414                                            " status %4.4x.\n", dev->name, new_bmsr);
 415                         return -1;
 416                 }
 417         }
 418         negotiated = lpa & tp->advertising[0];
 419         tp->full_duplex = mii_duplex(tp->full_duplex_lock, negotiated);
 420
 421         new_csr6 = tp->csr6;
 422
 423         if (negotiated & LPA_100) new_csr6 &= ~TxThreshold;
 424         else                      new_csr6 |= TxThreshold;
 425         if (tp->full_duplex) new_csr6 |= FullDuplex;
 426         else                 new_csr6 &= ~FullDuplex;
 427
 428         if (new_csr6 != tp->csr6) {
 429                 tp->csr6 = new_csr6;
 430                 tulip_restart_rxtx(tp);
 431
 432                 if (tulip_debug > 0)
 433                         printk(KERN_INFO "%s: Setting %s-duplex based on MII"
 434                                    "#%d link partner capability of %4.4x.\n",
 435                                    dev->name, tp->full_duplex ? "full" : "half",
 436                                    tp->phys[0], lpa);
 437                 return 1;
 438         }
 439
 440         return 0;
 441 }
 442
 443 void __devinit tulip_find_mii (struct net_device *dev, int board_idx)
 444 {
 445         struct tulip_private *tp = netdev_priv(dev);
 446         int phyn, phy_idx = 0;
 447         int mii_reg0;
 448         int mii_advert;
 449         unsigned int to_advert, new_bmcr, ane_switch;
 450
 451         /* Find the connected MII xcvrs.
 452            Doing this in open() would allow detecting external xcvrs later,
 453            but takes much time. */
 454         for (phyn = 1; phyn <= 32 && phy_idx < sizeof (tp->phys); phyn++) {
 455                 int phy = phyn & 0x1f;
 456                 int mii_status = tulip_mdio_read (dev, phy, MII_BMSR);
 457                 if ((mii_status & 0x8301) == 0x8001 ||
 458                     ((mii_status & BMSR_100BASE4) == 0
 459                      && (mii_status & 0x7800) != 0)) {
 460                         /* preserve Becker logic, gain indentation level */
 461                 } else {
 462                         continue;
 463                 }
 464
 465                 mii_reg0 = tulip_mdio_read (dev, phy, MII_BMCR);
 466                 mii_advert = tulip_mdio_read (dev, phy, MII_ADVERTISE);
 467                 ane_switch = 0;
 468
 469                 /* if not advertising at all, gen an
 470                  * advertising value from the capability
 471                  * bits in BMSR
 472                  */
 473                 if ((mii_advert & ADVERTISE_ALL) == 0) {
 474                         unsigned int tmpadv = tulip_mdio_read (dev, phy, MII_BMSR);
 475                         mii_advert = ((tmpadv >> 6) & 0x3e0) | 1;
 476                 }
 477
 478                 if (tp->mii_advertise) {
 479                         tp->advertising[phy_idx] =
 480                         to_advert = tp->mii_advertise;
 481                 } else if (tp->advertising[phy_idx]) {
 482                         to_advert = tp->advertising[phy_idx];
 483                 } else {
 484                         tp->advertising[phy_idx] =
 485                         tp->mii_advertise =
 486                         to_advert = mii_advert;
 487                 }
 488
 489                 tp->phys[phy_idx++] = phy;
 490
 491                 printk (KERN_INFO "tulip%d:  MII transceiver #%d "
 492                         "config %4.4x status %4.4x advertising %4.4x.\n",
 493                         board_idx, phy, mii_reg0, mii_status, mii_advert);
 494
 495                 /* Fixup for DLink with miswired PHY. */
 496                 if (mii_advert != to_advert) {
 497                         printk (KERN_DEBUG "tulip%d:  Advertising %4.4x on PHY %d,"
 498                                 " previously advertising %4.4x.\n",
 499                                 board_idx, to_advert, phy, mii_advert);
 500                         tulip_mdio_write (dev, phy, 4, to_advert);
 501                 }
 502
 503                 /* Enable autonegotiation: some boards default to off. */
 504                 if (tp->default_port == 0) {
 505                         new_bmcr = mii_reg0 | BMCR_ANENABLE;
 506                         if (new_bmcr != mii_reg0) {
 507                                 new_bmcr |= BMCR_ANRESTART;
 508                                 ane_switch = 1;
 509                         }
 510                 }
 511                 /* ...or disable nway, if forcing media */
 512                 else {
 513                         new_bmcr = mii_reg0 & ~BMCR_ANENABLE;
 514                         if (new_bmcr != mii_reg0)
 515                                 ane_switch = 1;
 516                 }
 517
 518                 /* clear out bits we never want at this point */
 519                 new_bmcr &= ~(BMCR_CTST | BMCR_FULLDPLX | BMCR_ISOLATE |
 520                               BMCR_PDOWN | BMCR_SPEED100 | BMCR_LOOPBACK |
 521                               BMCR_RESET);
 522
 523                 if (tp->full_duplex)
 524                         new_bmcr |= BMCR_FULLDPLX;
 525                 if (tulip_media_cap[tp->default_port] & MediaIs100)
 526                         new_bmcr |= BMCR_SPEED100;
 527
 528                 if (new_bmcr != mii_reg0) {
 529                         /* some phys need the ANE switch to
 530                          * happen before forced media settings
 531                          * will "take."  However, we write the
 532                          * same value twice in order not to
 533                          * confuse the sane phys.
 534                          */
 535                         if (ane_switch) {
 536                                 tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
 537                                 udelay (10);
 538                         }
 539                         tulip_mdio_write (dev, phy, MII_BMCR, new_bmcr);
 540                 }
 541         }
 542         tp->mii_cnt = phy_idx;
 543         if (tp->mtable && tp->mtable->has_mii && phy_idx == 0) {
 544                 printk (KERN_INFO "tulip%d: ***WARNING***: No MII transceiver found!\n",
 545                         board_idx);
 546                 tp->phys[0] = 1;
 547         }
 548 }