2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
27 #include <linux/mmc/host.h>
28 #include <linux/atmel-mci.h>
31 #include <asm/unaligned.h>
33 #include <mach/board.h>
35 #include "atmel-mci-regs.h"
37 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38 #define ATMCI_DMA_THRESHOLD 16
41 EVENT_CMD_COMPLETE = 0,
47 enum atmel_mci_state {
56 struct atmel_mci_dma {
57 #ifdef CONFIG_MMC_ATMELMCI_DMA
58 struct dma_client client;
59 struct dma_chan *chan;
60 struct dma_async_tx_descriptor *data_desc;
65 * struct atmel_mci - MMC controller state shared between all slots
66 * @lock: Spinlock protecting the queue and associated data.
67 * @regs: Pointer to MMIO registers.
68 * @sg: Scatterlist entry currently being processed by PIO code, if any.
69 * @pio_offset: Offset into the current scatterlist entry.
70 * @cur_slot: The slot which is currently using the controller.
71 * @mrq: The request currently being processed on @cur_slot,
72 * or NULL if the controller is idle.
73 * @cmd: The command currently being sent to the card, or NULL.
74 * @data: The data currently being transferred, or NULL if no data
75 * transfer is in progress.
76 * @dma: DMA client state.
77 * @data_chan: DMA channel being used for the current data transfer.
78 * @cmd_status: Snapshot of SR taken upon completion of the current
79 * command. Only valid when EVENT_CMD_COMPLETE is pending.
80 * @data_status: Snapshot of SR taken upon completion of the current
81 * data transfer. Only valid when EVENT_DATA_COMPLETE or
82 * EVENT_DATA_ERROR is pending.
83 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
85 * @tasklet: Tasklet running the request state machine.
86 * @pending_events: Bitmask of events flagged by the interrupt handler
87 * to be processed by the tasklet.
88 * @completed_events: Bitmask of events which the state machine has
90 * @state: Tasklet state.
91 * @queue: List of slots waiting for access to the controller.
92 * @need_clock_update: Update the clock rate before the next request.
93 * @need_reset: Reset controller before next request.
94 * @mode_reg: Value of the MR register.
95 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
96 * rate and timeout calculations.
97 * @mapbase: Physical address of the MMIO registers.
98 * @mck: The peripheral bus clock hooked up to the MMC controller.
99 * @pdev: Platform device associated with the MMC controller.
100 * @slot: Slots sharing this MMC controller.
105 * @lock is a softirq-safe spinlock protecting @queue as well as
106 * @cur_slot, @mrq and @state. These must always be updated
107 * at the same time while holding @lock.
109 * @lock also protects mode_reg and need_clock_update since these are
110 * used to synchronize mode register updates with the queue
113 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
114 * and must always be written at the same time as the slot is added to
117 * @pending_events and @completed_events are accessed using atomic bit
118 * operations, so they don't need any locking.
120 * None of the fields touched by the interrupt handler need any
121 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
122 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
123 * interrupts must be disabled and @data_status updated with a
124 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
125 * CMDRDY interupt must be disabled and @cmd_status updated with a
126 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
127 * bytes_xfered field of @data must be written. This is ensured by
134 struct scatterlist *sg;
135 unsigned int pio_offset;
137 struct atmel_mci_slot *cur_slot;
138 struct mmc_request *mrq;
139 struct mmc_command *cmd;
140 struct mmc_data *data;
142 struct atmel_mci_dma dma;
143 struct dma_chan *data_chan;
149 struct tasklet_struct tasklet;
150 unsigned long pending_events;
151 unsigned long completed_events;
152 enum atmel_mci_state state;
153 struct list_head queue;
155 bool need_clock_update;
158 unsigned long bus_hz;
159 unsigned long mapbase;
161 struct platform_device *pdev;
163 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
167 * struct atmel_mci_slot - MMC slot state
168 * @mmc: The mmc_host representing this slot.
169 * @host: The MMC controller this slot is using.
170 * @sdc_reg: Value of SDCR to be written before using this slot.
171 * @mrq: mmc_request currently being processed or waiting to be
172 * processed, or NULL when the slot is idle.
173 * @queue_node: List node for placing this node in the @queue list of
175 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
176 * @flags: Random state bits associated with the slot.
177 * @detect_pin: GPIO pin used for card detection, or negative if not
179 * @wp_pin: GPIO pin used for card write protect sending, or negative
181 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
183 struct atmel_mci_slot {
184 struct mmc_host *mmc;
185 struct atmel_mci *host;
189 struct mmc_request *mrq;
190 struct list_head queue_node;
194 #define ATMCI_CARD_PRESENT 0
195 #define ATMCI_CARD_NEED_INIT 1
196 #define ATMCI_SHUTDOWN 2
201 struct timer_list detect_timer;
204 #define atmci_test_and_clear_pending(host, event) \
205 test_and_clear_bit(event, &host->pending_events)
206 #define atmci_set_completed(host, event) \
207 set_bit(event, &host->completed_events)
208 #define atmci_set_pending(host, event) \
209 set_bit(event, &host->pending_events)
212 * The debugfs stuff below is mostly optimized away when
213 * CONFIG_DEBUG_FS is not set.
215 static int atmci_req_show(struct seq_file *s, void *v)
217 struct atmel_mci_slot *slot = s->private;
218 struct mmc_request *mrq;
219 struct mmc_command *cmd;
220 struct mmc_command *stop;
221 struct mmc_data *data;
223 /* Make sure we get a consistent snapshot */
224 spin_lock_bh(&slot->host->lock);
234 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
235 cmd->opcode, cmd->arg, cmd->flags,
236 cmd->resp[0], cmd->resp[1], cmd->resp[2],
237 cmd->resp[2], cmd->error);
239 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
240 data->bytes_xfered, data->blocks,
241 data->blksz, data->flags, data->error);
244 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
245 stop->opcode, stop->arg, stop->flags,
246 stop->resp[0], stop->resp[1], stop->resp[2],
247 stop->resp[2], stop->error);
250 spin_unlock_bh(&slot->host->lock);
255 static int atmci_req_open(struct inode *inode, struct file *file)
257 return single_open(file, atmci_req_show, inode->i_private);
260 static const struct file_operations atmci_req_fops = {
261 .owner = THIS_MODULE,
262 .open = atmci_req_open,
265 .release = single_release,
268 static void atmci_show_status_reg(struct seq_file *s,
269 const char *regname, u32 value)
271 static const char *sr_bit[] = {
292 seq_printf(s, "%s:\t0x%08x", regname, value);
293 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
294 if (value & (1 << i)) {
296 seq_printf(s, " %s", sr_bit[i]);
298 seq_puts(s, " UNKNOWN");
304 static int atmci_regs_show(struct seq_file *s, void *v)
306 struct atmel_mci *host = s->private;
309 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
314 * Grab a more or less consistent snapshot. Note that we're
315 * not disabling interrupts, so IMR and SR may not be
318 spin_lock_bh(&host->lock);
319 clk_enable(host->mck);
320 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
321 clk_disable(host->mck);
322 spin_unlock_bh(&host->lock);
324 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
326 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
327 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
328 buf[MCI_MR / 4] & 0xff);
329 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
330 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
331 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
332 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
334 buf[MCI_BLKR / 4] & 0xffff,
335 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
337 /* Don't read RSPR and RDR; it will consume the data there */
339 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
340 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
347 static int atmci_regs_open(struct inode *inode, struct file *file)
349 return single_open(file, atmci_regs_show, inode->i_private);
352 static const struct file_operations atmci_regs_fops = {
353 .owner = THIS_MODULE,
354 .open = atmci_regs_open,
357 .release = single_release,
360 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
362 struct mmc_host *mmc = slot->mmc;
363 struct atmel_mci *host = slot->host;
367 root = mmc->debugfs_root;
371 node = debugfs_create_file("regs", S_IRUSR, root, host,
378 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
382 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
386 node = debugfs_create_x32("pending_events", S_IRUSR, root,
387 (u32 *)&host->pending_events);
391 node = debugfs_create_x32("completed_events", S_IRUSR, root,
392 (u32 *)&host->completed_events);
399 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
402 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
405 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
408 static void atmci_set_timeout(struct atmel_mci *host,
409 struct atmel_mci_slot *slot, struct mmc_data *data)
411 static unsigned dtomul_to_shift[] = {
412 0, 4, 7, 8, 10, 12, 16, 20
418 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
420 for (dtomul = 0; dtomul < 8; dtomul++) {
421 unsigned shift = dtomul_to_shift[dtomul];
422 dtocyc = (timeout + (1 << shift) - 1) >> shift;
432 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
433 dtocyc << dtomul_to_shift[dtomul]);
434 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
438 * Return mask with command flags to be enabled for this command.
440 static u32 atmci_prepare_command(struct mmc_host *mmc,
441 struct mmc_command *cmd)
443 struct mmc_data *data;
446 cmd->error = -EINPROGRESS;
448 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
450 if (cmd->flags & MMC_RSP_PRESENT) {
451 if (cmd->flags & MMC_RSP_136)
452 cmdr |= MCI_CMDR_RSPTYP_136BIT;
454 cmdr |= MCI_CMDR_RSPTYP_48BIT;
458 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
459 * it's too difficult to determine whether this is an ACMD or
460 * not. Better make it 64.
462 cmdr |= MCI_CMDR_MAXLAT_64CYC;
464 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
465 cmdr |= MCI_CMDR_OPDCMD;
469 cmdr |= MCI_CMDR_START_XFER;
470 if (data->flags & MMC_DATA_STREAM)
471 cmdr |= MCI_CMDR_STREAM;
472 else if (data->blocks > 1)
473 cmdr |= MCI_CMDR_MULTI_BLOCK;
475 cmdr |= MCI_CMDR_BLOCK;
477 if (data->flags & MMC_DATA_READ)
478 cmdr |= MCI_CMDR_TRDIR_READ;
484 static void atmci_start_command(struct atmel_mci *host,
485 struct mmc_command *cmd, u32 cmd_flags)
490 dev_vdbg(&host->pdev->dev,
491 "start command: ARGR=0x%08x CMDR=0x%08x\n",
492 cmd->arg, cmd_flags);
494 mci_writel(host, ARGR, cmd->arg);
495 mci_writel(host, CMDR, cmd_flags);
498 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
500 atmci_start_command(host, data->stop, host->stop_cmdr);
501 mci_writel(host, IER, MCI_CMDRDY);
504 #ifdef CONFIG_MMC_ATMELMCI_DMA
505 static void atmci_dma_cleanup(struct atmel_mci *host)
507 struct mmc_data *data = host->data;
509 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
510 ((data->flags & MMC_DATA_WRITE)
511 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
514 static void atmci_stop_dma(struct atmel_mci *host)
516 struct dma_chan *chan = host->data_chan;
519 chan->device->device_terminate_all(chan);
520 atmci_dma_cleanup(host);
522 /* Data transfer was stopped by the interrupt handler */
523 atmci_set_pending(host, EVENT_XFER_COMPLETE);
524 mci_writel(host, IER, MCI_NOTBUSY);
528 /* This function is called by the DMA driver from tasklet context. */
529 static void atmci_dma_complete(void *arg)
531 struct atmel_mci *host = arg;
532 struct mmc_data *data = host->data;
534 dev_vdbg(&host->pdev->dev, "DMA complete\n");
536 atmci_dma_cleanup(host);
539 * If the card was removed, data will be NULL. No point trying
540 * to send the stop command or waiting for NBUSY in this case.
543 atmci_set_pending(host, EVENT_XFER_COMPLETE);
544 tasklet_schedule(&host->tasklet);
547 * Regardless of what the documentation says, we have
548 * to wait for NOTBUSY even after block read
551 * When the DMA transfer is complete, the controller
552 * may still be reading the CRC from the card, i.e.
553 * the data transfer is still in progress and we
554 * haven't seen all the potential error bits yet.
556 * The interrupt handler will schedule a different
557 * tasklet to finish things up when the data transfer
558 * is completely done.
560 * We may not complete the mmc request here anyway
561 * because the mmc layer may call back and cause us to
562 * violate the "don't submit new operations from the
563 * completion callback" rule of the dma engine
566 mci_writel(host, IER, MCI_NOTBUSY);
571 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
573 struct dma_chan *chan;
574 struct dma_async_tx_descriptor *desc;
575 struct scatterlist *sg;
577 enum dma_data_direction direction;
580 * We don't do DMA on "complex" transfers, i.e. with
581 * non-word-aligned buffers or lengths. Also, we don't bother
582 * with all the DMA setup overhead for short transfers.
584 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
589 for_each_sg(data->sg, sg, data->sg_len, i) {
590 if (sg->offset & 3 || sg->length & 3)
594 /* If we don't have a channel, we can't do DMA */
595 chan = host->dma.chan;
598 host->data_chan = chan;
604 if (data->flags & MMC_DATA_READ)
605 direction = DMA_FROM_DEVICE;
607 direction = DMA_TO_DEVICE;
609 desc = chan->device->device_prep_slave_sg(chan,
610 data->sg, data->sg_len, direction,
611 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
615 host->dma.data_desc = desc;
616 desc->callback = atmci_dma_complete;
617 desc->callback_param = host;
618 desc->tx_submit(desc);
621 chan->device->device_issue_pending(chan);
626 #else /* CONFIG_MMC_ATMELMCI_DMA */
628 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
633 static void atmci_stop_dma(struct atmel_mci *host)
635 /* Data transfer was stopped by the interrupt handler */
636 atmci_set_pending(host, EVENT_XFER_COMPLETE);
637 mci_writel(host, IER, MCI_NOTBUSY);
640 #endif /* CONFIG_MMC_ATMELMCI_DMA */
643 * Returns a mask of interrupt flags to be enabled after the whole
644 * request has been prepared.
646 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
650 data->error = -EINPROGRESS;
656 iflags = ATMCI_DATA_ERROR_FLAGS;
657 if (atmci_submit_data_dma(host, data)) {
658 host->data_chan = NULL;
661 * Errata: MMC data write operation with less than 12
662 * bytes is impossible.
664 * Errata: MCI Transmit Data Register (TDR) FIFO
665 * corruption when length is not multiple of 4.
667 if (data->blocks * data->blksz < 12
668 || (data->blocks * data->blksz) & 3)
669 host->need_reset = true;
672 host->pio_offset = 0;
673 if (data->flags & MMC_DATA_READ)
682 static void atmci_start_request(struct atmel_mci *host,
683 struct atmel_mci_slot *slot)
685 struct mmc_request *mrq;
686 struct mmc_command *cmd;
687 struct mmc_data *data;
692 host->cur_slot = slot;
695 host->pending_events = 0;
696 host->completed_events = 0;
697 host->data_status = 0;
699 if (host->need_reset) {
700 mci_writel(host, CR, MCI_CR_SWRST);
701 mci_writel(host, CR, MCI_CR_MCIEN);
702 mci_writel(host, MR, host->mode_reg);
703 host->need_reset = false;
705 mci_writel(host, SDCR, slot->sdc_reg);
707 iflags = mci_readl(host, IMR);
709 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
712 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
713 /* Send init sequence (74 clock cycles) */
714 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
715 while (!(mci_readl(host, SR) & MCI_CMDRDY))
720 atmci_set_timeout(host, slot, data);
722 /* Must set block count/size before sending command */
723 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
724 | MCI_BLKLEN(data->blksz));
725 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
726 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
731 cmdflags = atmci_prepare_command(slot->mmc, cmd);
732 atmci_start_command(host, cmd, cmdflags);
735 iflags |= atmci_submit_data(host, data);
738 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
739 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
740 if (!(data->flags & MMC_DATA_WRITE))
741 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
742 if (data->flags & MMC_DATA_STREAM)
743 host->stop_cmdr |= MCI_CMDR_STREAM;
745 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
749 * We could have enabled interrupts earlier, but I suspect
750 * that would open up a nice can of interesting race
751 * conditions (e.g. command and data complete, but stop not
754 mci_writel(host, IER, iflags);
757 static void atmci_queue_request(struct atmel_mci *host,
758 struct atmel_mci_slot *slot, struct mmc_request *mrq)
760 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
763 spin_lock_bh(&host->lock);
765 if (host->state == STATE_IDLE) {
766 host->state = STATE_SENDING_CMD;
767 atmci_start_request(host, slot);
769 list_add_tail(&slot->queue_node, &host->queue);
771 spin_unlock_bh(&host->lock);
774 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
776 struct atmel_mci_slot *slot = mmc_priv(mmc);
777 struct atmel_mci *host = slot->host;
778 struct mmc_data *data;
783 * We may "know" the card is gone even though there's still an
784 * electrical connection. If so, we really need to communicate
785 * this to the MMC core since there won't be any more
786 * interrupts as the card is completely removed. Otherwise,
787 * the MMC core might believe the card is still there even
788 * though the card was just removed very slowly.
790 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
791 mrq->cmd->error = -ENOMEDIUM;
792 mmc_request_done(mmc, mrq);
796 /* We don't support multiple blocks of weird lengths. */
798 if (data && data->blocks > 1 && data->blksz & 3) {
799 mrq->cmd->error = -EINVAL;
800 mmc_request_done(mmc, mrq);
803 atmci_queue_request(host, slot, mrq);
806 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
808 struct atmel_mci_slot *slot = mmc_priv(mmc);
809 struct atmel_mci *host = slot->host;
812 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
813 switch (ios->bus_width) {
814 case MMC_BUS_WIDTH_1:
815 slot->sdc_reg |= MCI_SDCBUS_1BIT;
817 case MMC_BUS_WIDTH_4:
818 slot->sdc_reg = MCI_SDCBUS_4BIT;
823 unsigned int clock_min = ~0U;
826 spin_lock_bh(&host->lock);
827 if (!host->mode_reg) {
828 clk_enable(host->mck);
829 mci_writel(host, CR, MCI_CR_SWRST);
830 mci_writel(host, CR, MCI_CR_MCIEN);
834 * Use mirror of ios->clock to prevent race with mmc
835 * core ios update when finding the minimum.
837 slot->clock = ios->clock;
838 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
839 if (host->slot[i] && host->slot[i]->clock
840 && host->slot[i]->clock < clock_min)
841 clock_min = host->slot[i]->clock;
844 /* Calculate clock divider */
845 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
847 dev_warn(&mmc->class_dev,
848 "clock %u too slow; using %lu\n",
849 clock_min, host->bus_hz / (2 * 256));
854 * WRPROOF and RDPROOF prevent overruns/underruns by
855 * stopping the clock when the FIFO is full/empty.
856 * This state is not expected to last for long.
858 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
861 if (list_empty(&host->queue))
862 mci_writel(host, MR, host->mode_reg);
864 host->need_clock_update = true;
866 spin_unlock_bh(&host->lock);
868 bool any_slot_active = false;
870 spin_lock_bh(&host->lock);
872 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
873 if (host->slot[i] && host->slot[i]->clock) {
874 any_slot_active = true;
878 if (!any_slot_active) {
879 mci_writel(host, CR, MCI_CR_MCIDIS);
880 if (host->mode_reg) {
882 clk_disable(host->mck);
886 spin_unlock_bh(&host->lock);
889 switch (ios->power_mode) {
891 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
895 * TODO: None of the currently available AVR32-based
896 * boards allow MMC power to be turned off. Implement
897 * power control when this can be tested properly.
899 * We also need to hook this into the clock management
900 * somehow so that newly inserted cards aren't
901 * subjected to a fast clock before we have a chance
902 * to figure out what the maximum rate is. Currently,
903 * there's no way to avoid this, and there never will
904 * be for boards that don't support power control.
910 static int atmci_get_ro(struct mmc_host *mmc)
912 int read_only = -ENOSYS;
913 struct atmel_mci_slot *slot = mmc_priv(mmc);
915 if (gpio_is_valid(slot->wp_pin)) {
916 read_only = gpio_get_value(slot->wp_pin);
917 dev_dbg(&mmc->class_dev, "card is %s\n",
918 read_only ? "read-only" : "read-write");
924 static int atmci_get_cd(struct mmc_host *mmc)
926 int present = -ENOSYS;
927 struct atmel_mci_slot *slot = mmc_priv(mmc);
929 if (gpio_is_valid(slot->detect_pin)) {
930 present = !gpio_get_value(slot->detect_pin);
931 dev_dbg(&mmc->class_dev, "card is %spresent\n",
932 present ? "" : "not ");
938 static const struct mmc_host_ops atmci_ops = {
939 .request = atmci_request,
940 .set_ios = atmci_set_ios,
941 .get_ro = atmci_get_ro,
942 .get_cd = atmci_get_cd,
945 /* Called with host->lock held */
946 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
947 __releases(&host->lock)
948 __acquires(&host->lock)
950 struct atmel_mci_slot *slot = NULL;
951 struct mmc_host *prev_mmc = host->cur_slot->mmc;
953 WARN_ON(host->cmd || host->data);
956 * Update the MMC clock rate if necessary. This may be
957 * necessary if set_ios() is called when a different slot is
958 * busy transfering data.
960 if (host->need_clock_update)
961 mci_writel(host, MR, host->mode_reg);
963 host->cur_slot->mrq = NULL;
965 if (!list_empty(&host->queue)) {
966 slot = list_entry(host->queue.next,
967 struct atmel_mci_slot, queue_node);
968 list_del(&slot->queue_node);
969 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
970 mmc_hostname(slot->mmc));
971 host->state = STATE_SENDING_CMD;
972 atmci_start_request(host, slot);
974 dev_vdbg(&host->pdev->dev, "list empty\n");
975 host->state = STATE_IDLE;
978 spin_unlock(&host->lock);
979 mmc_request_done(prev_mmc, mrq);
980 spin_lock(&host->lock);
983 static void atmci_command_complete(struct atmel_mci *host,
984 struct mmc_command *cmd)
986 u32 status = host->cmd_status;
988 /* Read the response from the card (up to 16 bytes) */
989 cmd->resp[0] = mci_readl(host, RSPR);
990 cmd->resp[1] = mci_readl(host, RSPR);
991 cmd->resp[2] = mci_readl(host, RSPR);
992 cmd->resp[3] = mci_readl(host, RSPR);
994 if (status & MCI_RTOE)
995 cmd->error = -ETIMEDOUT;
996 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
997 cmd->error = -EILSEQ;
998 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1004 dev_dbg(&host->pdev->dev,
1005 "command error: status=0x%08x\n", status);
1009 atmci_stop_dma(host);
1010 mci_writel(host, IDR, MCI_NOTBUSY
1011 | MCI_TXRDY | MCI_RXRDY
1012 | ATMCI_DATA_ERROR_FLAGS);
1017 static void atmci_detect_change(unsigned long data)
1019 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1024 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1025 * freeing the interrupt. We must not re-enable the interrupt
1026 * if it has been freed, and if we're shutting down, it
1027 * doesn't really matter whether the card is present or not.
1030 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1033 enable_irq(gpio_to_irq(slot->detect_pin));
1034 present = !gpio_get_value(slot->detect_pin);
1035 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1037 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1038 present, present_old);
1040 if (present != present_old) {
1041 struct atmel_mci *host = slot->host;
1042 struct mmc_request *mrq;
1044 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1045 present ? "inserted" : "removed");
1047 spin_lock(&host->lock);
1050 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1052 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1054 /* Clean up queue if present */
1057 if (mrq == host->mrq) {
1059 * Reset controller to terminate any ongoing
1060 * commands or data transfers.
1062 mci_writel(host, CR, MCI_CR_SWRST);
1063 mci_writel(host, CR, MCI_CR_MCIEN);
1064 mci_writel(host, MR, host->mode_reg);
1069 switch (host->state) {
1072 case STATE_SENDING_CMD:
1073 mrq->cmd->error = -ENOMEDIUM;
1077 case STATE_SENDING_DATA:
1078 mrq->data->error = -ENOMEDIUM;
1079 atmci_stop_dma(host);
1081 case STATE_DATA_BUSY:
1082 case STATE_DATA_ERROR:
1083 if (mrq->data->error == -EINPROGRESS)
1084 mrq->data->error = -ENOMEDIUM;
1088 case STATE_SENDING_STOP:
1089 mrq->stop->error = -ENOMEDIUM;
1093 atmci_request_end(host, mrq);
1095 list_del(&slot->queue_node);
1096 mrq->cmd->error = -ENOMEDIUM;
1098 mrq->data->error = -ENOMEDIUM;
1100 mrq->stop->error = -ENOMEDIUM;
1102 spin_unlock(&host->lock);
1103 mmc_request_done(slot->mmc, mrq);
1104 spin_lock(&host->lock);
1107 spin_unlock(&host->lock);
1109 mmc_detect_change(slot->mmc, 0);
1113 static void atmci_tasklet_func(unsigned long priv)
1115 struct atmel_mci *host = (struct atmel_mci *)priv;
1116 struct mmc_request *mrq = host->mrq;
1117 struct mmc_data *data = host->data;
1118 struct mmc_command *cmd = host->cmd;
1119 enum atmel_mci_state state = host->state;
1120 enum atmel_mci_state prev_state;
1123 spin_lock(&host->lock);
1125 state = host->state;
1127 dev_vdbg(&host->pdev->dev,
1128 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1129 state, host->pending_events, host->completed_events,
1130 mci_readl(host, IMR));
1139 case STATE_SENDING_CMD:
1140 if (!atmci_test_and_clear_pending(host,
1141 EVENT_CMD_COMPLETE))
1145 atmci_set_completed(host, EVENT_CMD_COMPLETE);
1146 atmci_command_complete(host, mrq->cmd);
1147 if (!mrq->data || cmd->error) {
1148 atmci_request_end(host, host->mrq);
1152 prev_state = state = STATE_SENDING_DATA;
1155 case STATE_SENDING_DATA:
1156 if (atmci_test_and_clear_pending(host,
1157 EVENT_DATA_ERROR)) {
1158 atmci_stop_dma(host);
1160 send_stop_cmd(host, data);
1161 state = STATE_DATA_ERROR;
1165 if (!atmci_test_and_clear_pending(host,
1166 EVENT_XFER_COMPLETE))
1169 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1170 prev_state = state = STATE_DATA_BUSY;
1173 case STATE_DATA_BUSY:
1174 if (!atmci_test_and_clear_pending(host,
1175 EVENT_DATA_COMPLETE))
1179 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1180 status = host->data_status;
1181 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1182 if (status & MCI_DTOE) {
1183 dev_dbg(&host->pdev->dev,
1184 "data timeout error\n");
1185 data->error = -ETIMEDOUT;
1186 } else if (status & MCI_DCRCE) {
1187 dev_dbg(&host->pdev->dev,
1188 "data CRC error\n");
1189 data->error = -EILSEQ;
1191 dev_dbg(&host->pdev->dev,
1192 "data FIFO error (status=%08x)\n",
1197 data->bytes_xfered = data->blocks * data->blksz;
1202 atmci_request_end(host, host->mrq);
1206 prev_state = state = STATE_SENDING_STOP;
1208 send_stop_cmd(host, data);
1211 case STATE_SENDING_STOP:
1212 if (!atmci_test_and_clear_pending(host,
1213 EVENT_CMD_COMPLETE))
1217 atmci_command_complete(host, mrq->stop);
1218 atmci_request_end(host, host->mrq);
1221 case STATE_DATA_ERROR:
1222 if (!atmci_test_and_clear_pending(host,
1223 EVENT_XFER_COMPLETE))
1226 state = STATE_DATA_BUSY;
1229 } while (state != prev_state);
1231 host->state = state;
1234 spin_unlock(&host->lock);
1237 static void atmci_read_data_pio(struct atmel_mci *host)
1239 struct scatterlist *sg = host->sg;
1240 void *buf = sg_virt(sg);
1241 unsigned int offset = host->pio_offset;
1242 struct mmc_data *data = host->data;
1245 unsigned int nbytes = 0;
1248 value = mci_readl(host, RDR);
1249 if (likely(offset + 4 <= sg->length)) {
1250 put_unaligned(value, (u32 *)(buf + offset));
1255 if (offset == sg->length) {
1256 flush_dcache_page(sg_page(sg));
1257 host->sg = sg = sg_next(sg);
1265 unsigned int remaining = sg->length - offset;
1266 memcpy(buf + offset, &value, remaining);
1267 nbytes += remaining;
1269 flush_dcache_page(sg_page(sg));
1270 host->sg = sg = sg_next(sg);
1274 offset = 4 - remaining;
1276 memcpy(buf, (u8 *)&value + remaining, offset);
1280 status = mci_readl(host, SR);
1281 if (status & ATMCI_DATA_ERROR_FLAGS) {
1282 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1283 | ATMCI_DATA_ERROR_FLAGS));
1284 host->data_status = status;
1285 data->bytes_xfered += nbytes;
1287 atmci_set_pending(host, EVENT_DATA_ERROR);
1288 tasklet_schedule(&host->tasklet);
1291 } while (status & MCI_RXRDY);
1293 host->pio_offset = offset;
1294 data->bytes_xfered += nbytes;
1299 mci_writel(host, IDR, MCI_RXRDY);
1300 mci_writel(host, IER, MCI_NOTBUSY);
1301 data->bytes_xfered += nbytes;
1303 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1306 static void atmci_write_data_pio(struct atmel_mci *host)
1308 struct scatterlist *sg = host->sg;
1309 void *buf = sg_virt(sg);
1310 unsigned int offset = host->pio_offset;
1311 struct mmc_data *data = host->data;
1314 unsigned int nbytes = 0;
1317 if (likely(offset + 4 <= sg->length)) {
1318 value = get_unaligned((u32 *)(buf + offset));
1319 mci_writel(host, TDR, value);
1323 if (offset == sg->length) {
1324 host->sg = sg = sg_next(sg);
1332 unsigned int remaining = sg->length - offset;
1335 memcpy(&value, buf + offset, remaining);
1336 nbytes += remaining;
1338 host->sg = sg = sg_next(sg);
1340 mci_writel(host, TDR, value);
1344 offset = 4 - remaining;
1346 memcpy((u8 *)&value + remaining, buf, offset);
1347 mci_writel(host, TDR, value);
1351 status = mci_readl(host, SR);
1352 if (status & ATMCI_DATA_ERROR_FLAGS) {
1353 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1354 | ATMCI_DATA_ERROR_FLAGS));
1355 host->data_status = status;
1356 data->bytes_xfered += nbytes;
1358 atmci_set_pending(host, EVENT_DATA_ERROR);
1359 tasklet_schedule(&host->tasklet);
1362 } while (status & MCI_TXRDY);
1364 host->pio_offset = offset;
1365 data->bytes_xfered += nbytes;
1370 mci_writel(host, IDR, MCI_TXRDY);
1371 mci_writel(host, IER, MCI_NOTBUSY);
1372 data->bytes_xfered += nbytes;
1374 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1377 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1379 mci_writel(host, IDR, MCI_CMDRDY);
1381 host->cmd_status = status;
1383 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1384 tasklet_schedule(&host->tasklet);
1387 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1389 struct atmel_mci *host = dev_id;
1390 u32 status, mask, pending;
1391 unsigned int pass_count = 0;
1394 status = mci_readl(host, SR);
1395 mask = mci_readl(host, IMR);
1396 pending = status & mask;
1400 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1401 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1402 | MCI_RXRDY | MCI_TXRDY);
1403 pending &= mci_readl(host, IMR);
1405 host->data_status = status;
1407 atmci_set_pending(host, EVENT_DATA_ERROR);
1408 tasklet_schedule(&host->tasklet);
1410 if (pending & MCI_NOTBUSY) {
1411 mci_writel(host, IDR,
1412 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1413 if (!host->data_status)
1414 host->data_status = status;
1416 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1417 tasklet_schedule(&host->tasklet);
1419 if (pending & MCI_RXRDY)
1420 atmci_read_data_pio(host);
1421 if (pending & MCI_TXRDY)
1422 atmci_write_data_pio(host);
1424 if (pending & MCI_CMDRDY)
1425 atmci_cmd_interrupt(host, status);
1426 } while (pass_count++ < 5);
1428 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1431 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1433 struct atmel_mci_slot *slot = dev_id;
1436 * Disable interrupts until the pin has stabilized and check
1437 * the state then. Use mod_timer() since we may be in the
1438 * middle of the timer routine when this interrupt triggers.
1440 disable_irq_nosync(irq);
1441 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1446 #ifdef CONFIG_MMC_ATMELMCI_DMA
1448 static inline struct atmel_mci *
1449 dma_client_to_atmel_mci(struct dma_client *client)
1451 return container_of(client, struct atmel_mci, dma.client);
1454 static enum dma_state_client atmci_dma_event(struct dma_client *client,
1455 struct dma_chan *chan, enum dma_state state)
1457 struct atmel_mci *host;
1458 enum dma_state_client ret = DMA_NAK;
1460 host = dma_client_to_atmel_mci(client);
1463 case DMA_RESOURCE_AVAILABLE:
1464 spin_lock_bh(&host->lock);
1465 if (!host->dma.chan) {
1466 host->dma.chan = chan;
1469 spin_unlock_bh(&host->lock);
1472 dev_info(&host->pdev->dev,
1473 "Using %s for DMA transfers\n",
1477 case DMA_RESOURCE_REMOVED:
1478 spin_lock_bh(&host->lock);
1479 if (host->dma.chan == chan) {
1480 host->dma.chan = NULL;
1483 spin_unlock_bh(&host->lock);
1486 dev_info(&host->pdev->dev,
1487 "Lost %s, falling back to PIO\n",
1498 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1500 static int __init atmci_init_slot(struct atmel_mci *host,
1501 struct mci_slot_pdata *slot_data, unsigned int id,
1504 struct mmc_host *mmc;
1505 struct atmel_mci_slot *slot;
1507 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1511 slot = mmc_priv(mmc);
1514 slot->detect_pin = slot_data->detect_pin;
1515 slot->wp_pin = slot_data->wp_pin;
1516 slot->sdc_reg = sdc_reg;
1518 mmc->ops = &atmci_ops;
1519 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1520 mmc->f_max = host->bus_hz / 2;
1521 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1522 if (slot_data->bus_width >= 4)
1523 mmc->caps |= MMC_CAP_4_BIT_DATA;
1525 mmc->max_hw_segs = 64;
1526 mmc->max_phys_segs = 64;
1527 mmc->max_req_size = 32768 * 512;
1528 mmc->max_blk_size = 32768;
1529 mmc->max_blk_count = 512;
1531 /* Assume card is present initially */
1532 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1533 if (gpio_is_valid(slot->detect_pin)) {
1534 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1535 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1536 slot->detect_pin = -EBUSY;
1537 } else if (gpio_get_value(slot->detect_pin)) {
1538 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1542 if (!gpio_is_valid(slot->detect_pin))
1543 mmc->caps |= MMC_CAP_NEEDS_POLL;
1545 if (gpio_is_valid(slot->wp_pin)) {
1546 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1547 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1548 slot->wp_pin = -EBUSY;
1552 host->slot[id] = slot;
1555 if (gpio_is_valid(slot->detect_pin)) {
1558 setup_timer(&slot->detect_timer, atmci_detect_change,
1559 (unsigned long)slot);
1561 ret = request_irq(gpio_to_irq(slot->detect_pin),
1562 atmci_detect_interrupt,
1563 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1564 "mmc-detect", slot);
1566 dev_dbg(&mmc->class_dev,
1567 "could not request IRQ %d for detect pin\n",
1568 gpio_to_irq(slot->detect_pin));
1569 gpio_free(slot->detect_pin);
1570 slot->detect_pin = -EBUSY;
1574 atmci_init_debugfs(slot);
1579 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1582 /* Debugfs stuff is cleaned up by mmc core */
1584 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1587 mmc_remove_host(slot->mmc);
1589 if (gpio_is_valid(slot->detect_pin)) {
1590 int pin = slot->detect_pin;
1592 free_irq(gpio_to_irq(pin), slot);
1593 del_timer_sync(&slot->detect_timer);
1596 if (gpio_is_valid(slot->wp_pin))
1597 gpio_free(slot->wp_pin);
1599 slot->host->slot[id] = NULL;
1600 mmc_free_host(slot->mmc);
1603 static int __init atmci_probe(struct platform_device *pdev)
1605 struct mci_platform_data *pdata;
1606 struct atmel_mci *host;
1607 struct resource *regs;
1608 unsigned int nr_slots;
1612 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1615 pdata = pdev->dev.platform_data;
1618 irq = platform_get_irq(pdev, 0);
1622 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1627 spin_lock_init(&host->lock);
1628 INIT_LIST_HEAD(&host->queue);
1630 host->mck = clk_get(&pdev->dev, "mci_clk");
1631 if (IS_ERR(host->mck)) {
1632 ret = PTR_ERR(host->mck);
1637 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1641 clk_enable(host->mck);
1642 mci_writel(host, CR, MCI_CR_SWRST);
1643 host->bus_hz = clk_get_rate(host->mck);
1644 clk_disable(host->mck);
1646 host->mapbase = regs->start;
1648 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1650 ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, host);
1652 goto err_request_irq;
1654 #ifdef CONFIG_MMC_ATMELMCI_DMA
1655 if (pdata->dma_slave) {
1656 struct dma_slave *slave = pdata->dma_slave;
1658 slave->tx_reg = regs->start + MCI_TDR;
1659 slave->rx_reg = regs->start + MCI_RDR;
1661 /* Try to grab a DMA channel */
1662 host->dma.client.event_callback = atmci_dma_event;
1663 dma_cap_set(DMA_SLAVE, host->dma.client.cap_mask);
1664 host->dma.client.slave = slave;
1666 dma_async_client_register(&host->dma.client);
1667 dma_async_client_chan_request(&host->dma.client);
1669 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1671 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1673 platform_set_drvdata(pdev, host);
1675 /* We need at least one slot to succeed */
1678 if (pdata->slot[0].bus_width) {
1679 ret = atmci_init_slot(host, &pdata->slot[0],
1680 MCI_SDCSEL_SLOT_A, 0);
1684 if (pdata->slot[1].bus_width) {
1685 ret = atmci_init_slot(host, &pdata->slot[1],
1686 MCI_SDCSEL_SLOT_B, 1);
1694 dev_info(&pdev->dev,
1695 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1696 host->mapbase, irq, nr_slots);
1701 #ifdef CONFIG_MMC_ATMELMCI_DMA
1702 if (pdata->dma_slave)
1703 dma_async_client_unregister(&host->dma.client);
1705 free_irq(irq, host);
1707 iounmap(host->regs);
1715 static int __exit atmci_remove(struct platform_device *pdev)
1717 struct atmel_mci *host = platform_get_drvdata(pdev);
1720 platform_set_drvdata(pdev, NULL);
1722 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1724 atmci_cleanup_slot(host->slot[i], i);
1727 clk_enable(host->mck);
1728 mci_writel(host, IDR, ~0UL);
1729 mci_writel(host, CR, MCI_CR_MCIDIS);
1730 mci_readl(host, SR);
1731 clk_disable(host->mck);
1733 #ifdef CONFIG_MMC_ATMELMCI_DMA
1734 if (host->dma.client.slave)
1735 dma_async_client_unregister(&host->dma.client);
1738 free_irq(platform_get_irq(pdev, 0), host);
1739 iounmap(host->regs);
1747 static struct platform_driver atmci_driver = {
1748 .remove = __exit_p(atmci_remove),
1750 .name = "atmel_mci",
1754 static int __init atmci_init(void)
1756 return platform_driver_probe(&atmci_driver, atmci_probe);
1759 static void __exit atmci_exit(void)
1761 platform_driver_unregister(&atmci_driver);
1764 module_init(atmci_init);
1765 module_exit(atmci_exit);
1767 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1768 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1769 MODULE_LICENSE("GPL v2");