Pull sbs into release branch
[linux-2.6] / drivers / media / dvb / dvb-usb / af9005-fe.c
1 /* Frontend part of the Linux driver for the Afatech 9005
2  * USB1.1 DVB-T receiver.
3  *
4  * Copyright (C) 2007 Luca Olivetti (luca@ventoso.org)
5  *
6  * Thanks to Afatech who kindly provided information.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  *
22  * see Documentation/dvb/README.dvb-usb for more information
23  */
24 #include "af9005.h"
25 #include "af9005-script.h"
26 #include "mt2060.h"
27 #include "qt1010.h"
28 #include <asm/div64.h>
29
30 struct af9005_fe_state {
31         struct dvb_usb_device *d;
32         struct dvb_frontend *tuner;
33
34         fe_status_t stat;
35
36         /* retraining parameters */
37         u32 original_fcw;
38         u16 original_rf_top;
39         u16 original_if_top;
40         u16 original_if_min;
41         u16 original_aci0_if_top;
42         u16 original_aci1_if_top;
43         u16 original_aci0_if_min;
44         u8 original_if_unplug_th;
45         u8 original_rf_unplug_th;
46         u8 original_dtop_if_unplug_th;
47         u8 original_dtop_rf_unplug_th;
48
49         /* statistics */
50         u32 pre_vit_error_count;
51         u32 pre_vit_bit_count;
52         u32 ber;
53         u32 post_vit_error_count;
54         u32 post_vit_bit_count;
55         u32 unc;
56         u16 abort_count;
57
58         int opened;
59         int strong;
60         unsigned long next_status_check;
61         struct dvb_frontend frontend;
62 };
63
64 static int af9005_write_word_agc(struct dvb_usb_device *d, u16 reghi,
65                                  u16 reglo, u8 pos, u8 len, u16 value)
66 {
67         int ret;
68         u8 temp;
69
70         if ((ret = af9005_write_ofdm_register(d, reglo, (u8) (value & 0xff))))
71                 return ret;
72         temp = (u8) ((value & 0x0300) >> 8);
73         return af9005_write_register_bits(d, reghi, pos, len,
74                                           (u8) ((value & 0x300) >> 8));
75 }
76
77 static int af9005_read_word_agc(struct dvb_usb_device *d, u16 reghi,
78                                 u16 reglo, u8 pos, u8 len, u16 * value)
79 {
80         int ret;
81         u8 temp0, temp1;
82
83         if ((ret = af9005_read_ofdm_register(d, reglo, &temp0)))
84                 return ret;
85         if ((ret = af9005_read_ofdm_register(d, reghi, &temp1)))
86                 return ret;
87         switch (pos) {
88         case 0:
89                 *value = ((u16) (temp1 & 0x03) << 8) + (u16) temp0;
90                 break;
91         case 2:
92                 *value = ((u16) (temp1 & 0x0C) << 6) + (u16) temp0;
93                 break;
94         case 4:
95                 *value = ((u16) (temp1 & 0x30) << 4) + (u16) temp0;
96                 break;
97         case 6:
98                 *value = ((u16) (temp1 & 0xC0) << 2) + (u16) temp0;
99                 break;
100         default:
101                 err("invalid pos in read word agc");
102                 return -EINVAL;
103         }
104         return 0;
105
106 }
107
108 static int af9005_is_fecmon_available(struct dvb_frontend *fe, int *available)
109 {
110         struct af9005_fe_state *state = fe->demodulator_priv;
111         int ret;
112         u8 temp;
113
114         *available = false;
115
116         ret = af9005_read_register_bits(state->d, xd_p_fec_vtb_rsd_mon_en,
117                                         fec_vtb_rsd_mon_en_pos,
118                                         fec_vtb_rsd_mon_en_len, &temp);
119         if (ret)
120                 return ret;
121         if (temp & 1) {
122                 ret =
123                     af9005_read_register_bits(state->d,
124                                               xd_p_reg_ofsm_read_rbc_en,
125                                               reg_ofsm_read_rbc_en_pos,
126                                               reg_ofsm_read_rbc_en_len, &temp);
127                 if (ret)
128                         return ret;
129                 if ((temp & 1) == 0)
130                         *available = true;
131
132         }
133         return 0;
134 }
135
136 static int af9005_get_post_vit_err_cw_count(struct dvb_frontend *fe,
137                                             u32 * post_err_count,
138                                             u32 * post_cw_count,
139                                             u16 * abort_count)
140 {
141         struct af9005_fe_state *state = fe->demodulator_priv;
142         int ret;
143         u32 err_count;
144         u32 cw_count;
145         u8 temp, temp0, temp1, temp2;
146         u16 loc_abort_count;
147
148         *post_err_count = 0;
149         *post_cw_count = 0;
150
151         /* check if error bit count is ready */
152         ret =
153             af9005_read_register_bits(state->d, xd_r_fec_rsd_ber_rdy,
154                                       fec_rsd_ber_rdy_pos, fec_rsd_ber_rdy_len,
155                                       &temp);
156         if (ret)
157                 return ret;
158         if (!temp) {
159                 deb_info("rsd counter not ready\n");
160                 return 100;
161         }
162         /* get abort count */
163         ret =
164             af9005_read_ofdm_register(state->d,
165                                       xd_r_fec_rsd_abort_packet_cnt_7_0,
166                                       &temp0);
167         if (ret)
168                 return ret;
169         ret =
170             af9005_read_ofdm_register(state->d,
171                                       xd_r_fec_rsd_abort_packet_cnt_15_8,
172                                       &temp1);
173         if (ret)
174                 return ret;
175         loc_abort_count = ((u16) temp1 << 8) + temp0;
176
177         /* get error count */
178         ret =
179             af9005_read_ofdm_register(state->d, xd_r_fec_rsd_bit_err_cnt_7_0,
180                                       &temp0);
181         if (ret)
182                 return ret;
183         ret =
184             af9005_read_ofdm_register(state->d, xd_r_fec_rsd_bit_err_cnt_15_8,
185                                       &temp1);
186         if (ret)
187                 return ret;
188         ret =
189             af9005_read_ofdm_register(state->d, xd_r_fec_rsd_bit_err_cnt_23_16,
190                                       &temp2);
191         if (ret)
192                 return ret;
193         err_count = ((u32) temp2 << 16) + ((u32) temp1 << 8) + temp0;
194         *post_err_count = err_count - (u32) loc_abort_count *8 * 8;
195
196         /* get RSD packet number */
197         ret =
198             af9005_read_ofdm_register(state->d, xd_p_fec_rsd_packet_unit_7_0,
199                                       &temp0);
200         if (ret)
201                 return ret;
202         ret =
203             af9005_read_ofdm_register(state->d, xd_p_fec_rsd_packet_unit_15_8,
204                                       &temp1);
205         if (ret)
206                 return ret;
207         cw_count = ((u32) temp1 << 8) + temp0;
208         if (cw_count == 0) {
209                 err("wrong RSD packet count");
210                 return -EIO;
211         }
212         deb_info("POST abort count %d err count %d rsd packets %d\n",
213                  loc_abort_count, err_count, cw_count);
214         *post_cw_count = cw_count - (u32) loc_abort_count;
215         *abort_count = loc_abort_count;
216         return 0;
217
218 }
219
220 static int af9005_get_post_vit_ber(struct dvb_frontend *fe,
221                                    u32 * post_err_count, u32 * post_cw_count,
222                                    u16 * abort_count)
223 {
224         u32 loc_cw_count = 0, loc_err_count;
225         u16 loc_abort_count;
226         int ret;
227
228         ret =
229             af9005_get_post_vit_err_cw_count(fe, &loc_err_count, &loc_cw_count,
230                                              &loc_abort_count);
231         if (ret)
232                 return ret;
233         *post_err_count = loc_err_count;
234         *post_cw_count = loc_cw_count * 204 * 8;
235         *abort_count = loc_abort_count;
236
237         return 0;
238 }
239
240 static int af9005_get_pre_vit_err_bit_count(struct dvb_frontend *fe,
241                                             u32 * pre_err_count,
242                                             u32 * pre_bit_count)
243 {
244         struct af9005_fe_state *state = fe->demodulator_priv;
245         u8 temp, temp0, temp1, temp2;
246         u32 super_frame_count, x, bits;
247         int ret;
248
249         ret =
250             af9005_read_register_bits(state->d, xd_r_fec_vtb_ber_rdy,
251                                       fec_vtb_ber_rdy_pos, fec_vtb_ber_rdy_len,
252                                       &temp);
253         if (ret)
254                 return ret;
255         if (!temp) {
256                 deb_info("viterbi counter not ready\n");
257                 return 101;     /* ERR_APO_VTB_COUNTER_NOT_READY; */
258         }
259         ret =
260             af9005_read_ofdm_register(state->d, xd_r_fec_vtb_err_bit_cnt_7_0,
261                                       &temp0);
262         if (ret)
263                 return ret;
264         ret =
265             af9005_read_ofdm_register(state->d, xd_r_fec_vtb_err_bit_cnt_15_8,
266                                       &temp1);
267         if (ret)
268                 return ret;
269         ret =
270             af9005_read_ofdm_register(state->d, xd_r_fec_vtb_err_bit_cnt_23_16,
271                                       &temp2);
272         if (ret)
273                 return ret;
274         *pre_err_count = ((u32) temp2 << 16) + ((u32) temp1 << 8) + temp0;
275
276         ret =
277             af9005_read_ofdm_register(state->d, xd_p_fec_super_frm_unit_7_0,
278                                       &temp0);
279         if (ret)
280                 return ret;
281         ret =
282             af9005_read_ofdm_register(state->d, xd_p_fec_super_frm_unit_15_8,
283                                       &temp1);
284         if (ret)
285                 return ret;
286         super_frame_count = ((u32) temp1 << 8) + temp0;
287         if (super_frame_count == 0) {
288                 deb_info("super frame count 0\n");
289                 return 102;
290         }
291
292         /* read fft mode */
293         ret =
294             af9005_read_register_bits(state->d, xd_g_reg_tpsd_txmod,
295                                       reg_tpsd_txmod_pos, reg_tpsd_txmod_len,
296                                       &temp);
297         if (ret)
298                 return ret;
299         if (temp == 0) {
300                 /* 2K */
301                 x = 1512;
302         } else if (temp == 1) {
303                 /* 8k */
304                 x = 6048;
305         } else {
306                 err("Invalid fft mode");
307                 return -EINVAL;
308         }
309
310         /* read constellation mode */
311         ret =
312             af9005_read_register_bits(state->d, xd_g_reg_tpsd_const,
313                                       reg_tpsd_const_pos, reg_tpsd_const_len,
314                                       &temp);
315         if (ret)
316                 return ret;
317         switch (temp) {
318         case 0:         /* QPSK */
319                 bits = 2;
320                 break;
321         case 1:         /* QAM_16 */
322                 bits = 4;
323                 break;
324         case 2:         /* QAM_64 */
325                 bits = 6;
326                 break;
327         default:
328                 err("invalid constellation mode");
329                 return -EINVAL;
330         }
331         *pre_bit_count = super_frame_count * 68 * 4 * x * bits;
332         deb_info("PRE err count %d frame count %d bit count %d\n",
333                  *pre_err_count, super_frame_count, *pre_bit_count);
334         return 0;
335 }
336
337 static int af9005_reset_pre_viterbi(struct dvb_frontend *fe)
338 {
339         struct af9005_fe_state *state = fe->demodulator_priv;
340         int ret;
341
342         /* set super frame count to 1 */
343         ret =
344             af9005_write_ofdm_register(state->d, xd_p_fec_super_frm_unit_7_0,
345                                        1 & 0xff);
346         if (ret)
347                 return ret;
348         af9005_write_ofdm_register(state->d, xd_p_fec_super_frm_unit_15_8,
349                                    1 >> 8);
350         if (ret)
351                 return ret;
352         /* reset pre viterbi error count */
353         ret =
354             af9005_write_register_bits(state->d, xd_p_fec_vtb_ber_rst,
355                                        fec_vtb_ber_rst_pos, fec_vtb_ber_rst_len,
356                                        1);
357
358         return ret;
359 }
360
361 static int af9005_reset_post_viterbi(struct dvb_frontend *fe)
362 {
363         struct af9005_fe_state *state = fe->demodulator_priv;
364         int ret;
365
366         /* set packet unit */
367         ret =
368             af9005_write_ofdm_register(state->d, xd_p_fec_rsd_packet_unit_7_0,
369                                        10000 & 0xff);
370         if (ret)
371                 return ret;
372         ret =
373             af9005_write_ofdm_register(state->d, xd_p_fec_rsd_packet_unit_15_8,
374                                        10000 >> 8);
375         if (ret)
376                 return ret;
377         /* reset post viterbi error count */
378         ret =
379             af9005_write_register_bits(state->d, xd_p_fec_rsd_ber_rst,
380                                        fec_rsd_ber_rst_pos, fec_rsd_ber_rst_len,
381                                        1);
382
383         return ret;
384 }
385
386 static int af9005_get_statistic(struct dvb_frontend *fe)
387 {
388         struct af9005_fe_state *state = fe->demodulator_priv;
389         int ret, fecavailable;
390         u64 numerator, denominator;
391
392         deb_info("GET STATISTIC\n");
393         ret = af9005_is_fecmon_available(fe, &fecavailable);
394         if (ret)
395                 return ret;
396         if (!fecavailable) {
397                 deb_info("fecmon not available\n");
398                 return 0;
399         }
400
401         ret = af9005_get_pre_vit_err_bit_count(fe, &state->pre_vit_error_count,
402                                                &state->pre_vit_bit_count);
403         if (ret == 0) {
404                 af9005_reset_pre_viterbi(fe);
405                 if (state->pre_vit_bit_count > 0) {
406                         /* according to v 0.0.4 of the dvb api ber should be a multiple
407                            of 10E-9 so we have to multiply the error count by
408                            10E9=1000000000 */
409                         numerator =
410                             (u64) state->pre_vit_error_count * (u64) 1000000000;
411                         denominator = (u64) state->pre_vit_bit_count;
412                         state->ber = do_div(numerator, denominator);
413                 } else {
414                         state->ber = 0xffffffff;
415                 }
416         }
417
418         ret = af9005_get_post_vit_ber(fe, &state->post_vit_error_count,
419                                       &state->post_vit_bit_count,
420                                       &state->abort_count);
421         if (ret == 0) {
422                 ret = af9005_reset_post_viterbi(fe);
423                 state->unc += state->abort_count;
424                 if (ret)
425                         return ret;
426         }
427         return 0;
428 }
429
430 static int af9005_fe_refresh_state(struct dvb_frontend *fe)
431 {
432         struct af9005_fe_state *state = fe->demodulator_priv;
433         if (time_after(jiffies, state->next_status_check)) {
434                 deb_info("REFRESH STATE\n");
435
436                 /* statistics */
437                 if (af9005_get_statistic(fe))
438                         err("get_statistic_failed");
439                 state->next_status_check = jiffies + 250 * HZ / 1000;
440         }
441         return 0;
442 }
443
444 static int af9005_fe_read_status(struct dvb_frontend *fe, fe_status_t * stat)
445 {
446         struct af9005_fe_state *state = fe->demodulator_priv;
447         u8 temp;
448         int ret;
449
450         if (state->tuner == NULL)
451                 return -ENODEV;
452
453         *stat = 0;
454         ret = af9005_read_register_bits(state->d, xd_p_agc_lock,
455                                         agc_lock_pos, agc_lock_len, &temp);
456         if (ret)
457                 return ret;
458         if (temp)
459                 *stat |= FE_HAS_SIGNAL;
460
461         ret = af9005_read_register_bits(state->d, xd_p_fd_tpsd_lock,
462                                         fd_tpsd_lock_pos, fd_tpsd_lock_len,
463                                         &temp);
464         if (ret)
465                 return ret;
466         if (temp)
467                 *stat |= FE_HAS_CARRIER;
468
469         ret = af9005_read_register_bits(state->d,
470                                         xd_r_mp2if_sync_byte_locked,
471                                         mp2if_sync_byte_locked_pos,
472                                         mp2if_sync_byte_locked_pos, &temp);
473         if (ret)
474                 return ret;
475         if (temp)
476                 *stat |= FE_HAS_SYNC | FE_HAS_VITERBI | FE_HAS_LOCK;
477         if (state->opened)
478                 af9005_led_control(state->d, *stat & FE_HAS_LOCK);
479
480         ret =
481             af9005_read_register_bits(state->d, xd_p_reg_strong_sginal_detected,
482                                       reg_strong_sginal_detected_pos,
483                                       reg_strong_sginal_detected_len, &temp);
484         if (ret)
485                 return ret;
486         if (temp != state->strong) {
487                 deb_info("adjust for strong signal %d\n", temp);
488                         state->strong = temp;
489         }
490         return 0;
491 }
492
493 static int af9005_fe_read_ber(struct dvb_frontend *fe, u32 * ber)
494 {
495         struct af9005_fe_state *state = fe->demodulator_priv;
496         if (state->tuner == NULL)
497                 return -ENODEV;
498         af9005_fe_refresh_state(fe);
499         *ber = state->ber;
500         return 0;
501 }
502
503 static int af9005_fe_read_unc_blocks(struct dvb_frontend *fe, u32 * unc)
504 {
505         struct af9005_fe_state *state = fe->demodulator_priv;
506         if (state->tuner == NULL)
507                 return -ENODEV;
508         af9005_fe_refresh_state(fe);
509         *unc = state->unc;
510         return 0;
511 }
512
513 static int af9005_fe_read_signal_strength(struct dvb_frontend *fe,
514                                           u16 * strength)
515 {
516         struct af9005_fe_state *state = fe->demodulator_priv;
517         int ret;
518         u8 if_gain, rf_gain;
519
520         if (state->tuner == NULL)
521                 return -ENODEV;
522         ret =
523             af9005_read_ofdm_register(state->d, xd_r_reg_aagc_rf_gain,
524                                       &rf_gain);
525         if (ret)
526                 return ret;
527         ret =
528             af9005_read_ofdm_register(state->d, xd_r_reg_aagc_if_gain,
529                                       &if_gain);
530         if (ret)
531                 return ret;
532         /* this value has no real meaning, but i don't have the tables that relate
533            the rf and if gain with the dbm, so I just scale the value */
534         *strength = (512 - rf_gain - if_gain) << 7;
535         return 0;
536 }
537
538 static int af9005_fe_read_snr(struct dvb_frontend *fe, u16 * snr)
539 {
540         /* the snr can be derived from the ber and the constellation
541            but I don't think this kind of complex calculations belong
542            in the driver. I may be wrong.... */
543         return -ENOSYS;
544 }
545
546 static int af9005_fe_program_cfoe(struct dvb_usb_device *d, fe_bandwidth_t bw)
547 {
548         u8 temp0, temp1, temp2, temp3, buf[4];
549         int ret;
550         u32 NS_coeff1_2048Nu;
551         u32 NS_coeff1_8191Nu;
552         u32 NS_coeff1_8192Nu;
553         u32 NS_coeff1_8193Nu;
554         u32 NS_coeff2_2k;
555         u32 NS_coeff2_8k;
556
557         switch (bw) {
558         case BANDWIDTH_6_MHZ:
559                 NS_coeff1_2048Nu = 0x2ADB6DC;
560                 NS_coeff1_8191Nu = 0xAB7313;
561                 NS_coeff1_8192Nu = 0xAB6DB7;
562                 NS_coeff1_8193Nu = 0xAB685C;
563                 NS_coeff2_2k = 0x156DB6E;
564                 NS_coeff2_8k = 0x55B6DC;
565                 break;
566
567         case BANDWIDTH_7_MHZ:
568                 NS_coeff1_2048Nu = 0x3200001;
569                 NS_coeff1_8191Nu = 0xC80640;
570                 NS_coeff1_8192Nu = 0xC80000;
571                 NS_coeff1_8193Nu = 0xC7F9C0;
572                 NS_coeff2_2k = 0x1900000;
573                 NS_coeff2_8k = 0x640000;
574                 break;
575
576         case BANDWIDTH_8_MHZ:
577                 NS_coeff1_2048Nu = 0x3924926;
578                 NS_coeff1_8191Nu = 0xE4996E;
579                 NS_coeff1_8192Nu = 0xE49249;
580                 NS_coeff1_8193Nu = 0xE48B25;
581                 NS_coeff2_2k = 0x1C92493;
582                 NS_coeff2_8k = 0x724925;
583                 break;
584         default:
585                 err("Invalid bandwith %d.", bw);
586                 return -EINVAL;
587         }
588
589         /*
590          *  write NS_coeff1_2048Nu
591          */
592
593         temp0 = (u8) (NS_coeff1_2048Nu & 0x000000FF);
594         temp1 = (u8) ((NS_coeff1_2048Nu & 0x0000FF00) >> 8);
595         temp2 = (u8) ((NS_coeff1_2048Nu & 0x00FF0000) >> 16);
596         temp3 = (u8) ((NS_coeff1_2048Nu & 0x03000000) >> 24);
597
598         /*  big endian to make 8051 happy */
599         buf[0] = temp3;
600         buf[1] = temp2;
601         buf[2] = temp1;
602         buf[3] = temp0;
603
604         /*  cfoe_NS_2k_coeff1_25_24 */
605         ret = af9005_write_ofdm_register(d, 0xAE00, buf[0]);
606         if (ret)
607                 return ret;
608
609         /*  cfoe_NS_2k_coeff1_23_16 */
610         ret = af9005_write_ofdm_register(d, 0xAE01, buf[1]);
611         if (ret)
612                 return ret;
613
614         /*  cfoe_NS_2k_coeff1_15_8 */
615         ret = af9005_write_ofdm_register(d, 0xAE02, buf[2]);
616         if (ret)
617                 return ret;
618
619         /*  cfoe_NS_2k_coeff1_7_0 */
620         ret = af9005_write_ofdm_register(d, 0xAE03, buf[3]);
621         if (ret)
622                 return ret;
623
624         /*
625          *  write NS_coeff2_2k
626          */
627
628         temp0 = (u8) ((NS_coeff2_2k & 0x0000003F));
629         temp1 = (u8) ((NS_coeff2_2k & 0x00003FC0) >> 6);
630         temp2 = (u8) ((NS_coeff2_2k & 0x003FC000) >> 14);
631         temp3 = (u8) ((NS_coeff2_2k & 0x01C00000) >> 22);
632
633         /*  big endian to make 8051 happy */
634         buf[0] = temp3;
635         buf[1] = temp2;
636         buf[2] = temp1;
637         buf[3] = temp0;
638
639         ret = af9005_write_ofdm_register(d, 0xAE04, buf[0]);
640         if (ret)
641                 return ret;
642
643         ret = af9005_write_ofdm_register(d, 0xAE05, buf[1]);
644         if (ret)
645                 return ret;
646
647         ret = af9005_write_ofdm_register(d, 0xAE06, buf[2]);
648         if (ret)
649                 return ret;
650
651         ret = af9005_write_ofdm_register(d, 0xAE07, buf[3]);
652         if (ret)
653                 return ret;
654
655         /*
656          *  write NS_coeff1_8191Nu
657          */
658
659         temp0 = (u8) ((NS_coeff1_8191Nu & 0x000000FF));
660         temp1 = (u8) ((NS_coeff1_8191Nu & 0x0000FF00) >> 8);
661         temp2 = (u8) ((NS_coeff1_8191Nu & 0x00FFC000) >> 16);
662         temp3 = (u8) ((NS_coeff1_8191Nu & 0x03000000) >> 24);
663
664         /*  big endian to make 8051 happy */
665         buf[0] = temp3;
666         buf[1] = temp2;
667         buf[2] = temp1;
668         buf[3] = temp0;
669
670         ret = af9005_write_ofdm_register(d, 0xAE08, buf[0]);
671         if (ret)
672                 return ret;
673
674         ret = af9005_write_ofdm_register(d, 0xAE09, buf[1]);
675         if (ret)
676                 return ret;
677
678         ret = af9005_write_ofdm_register(d, 0xAE0A, buf[2]);
679         if (ret)
680                 return ret;
681
682         ret = af9005_write_ofdm_register(d, 0xAE0B, buf[3]);
683         if (ret)
684                 return ret;
685
686         /*
687          *  write NS_coeff1_8192Nu
688          */
689
690         temp0 = (u8) (NS_coeff1_8192Nu & 0x000000FF);
691         temp1 = (u8) ((NS_coeff1_8192Nu & 0x0000FF00) >> 8);
692         temp2 = (u8) ((NS_coeff1_8192Nu & 0x00FFC000) >> 16);
693         temp3 = (u8) ((NS_coeff1_8192Nu & 0x03000000) >> 24);
694
695         /*  big endian to make 8051 happy */
696         buf[0] = temp3;
697         buf[1] = temp2;
698         buf[2] = temp1;
699         buf[3] = temp0;
700
701         ret = af9005_write_ofdm_register(d, 0xAE0C, buf[0]);
702         if (ret)
703                 return ret;
704
705         ret = af9005_write_ofdm_register(d, 0xAE0D, buf[1]);
706         if (ret)
707                 return ret;
708
709         ret = af9005_write_ofdm_register(d, 0xAE0E, buf[2]);
710         if (ret)
711                 return ret;
712
713         ret = af9005_write_ofdm_register(d, 0xAE0F, buf[3]);
714         if (ret)
715                 return ret;
716
717         /*
718          *  write NS_coeff1_8193Nu
719          */
720
721         temp0 = (u8) ((NS_coeff1_8193Nu & 0x000000FF));
722         temp1 = (u8) ((NS_coeff1_8193Nu & 0x0000FF00) >> 8);
723         temp2 = (u8) ((NS_coeff1_8193Nu & 0x00FFC000) >> 16);
724         temp3 = (u8) ((NS_coeff1_8193Nu & 0x03000000) >> 24);
725
726         /*  big endian to make 8051 happy */
727         buf[0] = temp3;
728         buf[1] = temp2;
729         buf[2] = temp1;
730         buf[3] = temp0;
731
732         ret = af9005_write_ofdm_register(d, 0xAE10, buf[0]);
733         if (ret)
734                 return ret;
735
736         ret = af9005_write_ofdm_register(d, 0xAE11, buf[1]);
737         if (ret)
738                 return ret;
739
740         ret = af9005_write_ofdm_register(d, 0xAE12, buf[2]);
741         if (ret)
742                 return ret;
743
744         ret = af9005_write_ofdm_register(d, 0xAE13, buf[3]);
745         if (ret)
746                 return ret;
747
748         /*
749          *  write NS_coeff2_8k
750          */
751
752         temp0 = (u8) ((NS_coeff2_8k & 0x0000003F));
753         temp1 = (u8) ((NS_coeff2_8k & 0x00003FC0) >> 6);
754         temp2 = (u8) ((NS_coeff2_8k & 0x003FC000) >> 14);
755         temp3 = (u8) ((NS_coeff2_8k & 0x01C00000) >> 22);
756
757         /*  big endian to make 8051 happy */
758         buf[0] = temp3;
759         buf[1] = temp2;
760         buf[2] = temp1;
761         buf[3] = temp0;
762
763         ret = af9005_write_ofdm_register(d, 0xAE14, buf[0]);
764         if (ret)
765                 return ret;
766
767         ret = af9005_write_ofdm_register(d, 0xAE15, buf[1]);
768         if (ret)
769                 return ret;
770
771         ret = af9005_write_ofdm_register(d, 0xAE16, buf[2]);
772         if (ret)
773                 return ret;
774
775         ret = af9005_write_ofdm_register(d, 0xAE17, buf[3]);
776         return ret;
777
778 }
779
780 static int af9005_fe_select_bw(struct dvb_usb_device *d, fe_bandwidth_t bw)
781 {
782         u8 temp;
783         switch (bw) {
784         case BANDWIDTH_6_MHZ:
785                 temp = 0;
786                 break;
787         case BANDWIDTH_7_MHZ:
788                 temp = 1;
789                 break;
790         case BANDWIDTH_8_MHZ:
791                 temp = 2;
792                 break;
793         default:
794                 err("Invalid bandwith %d.", bw);
795                 return -EINVAL;
796         }
797         return af9005_write_register_bits(d, xd_g_reg_bw, reg_bw_pos,
798                                           reg_bw_len, temp);
799 }
800
801 static int af9005_fe_power(struct dvb_frontend *fe, int on)
802 {
803         struct af9005_fe_state *state = fe->demodulator_priv;
804         u8 temp = on;
805         int ret;
806         deb_info("power %s tuner\n", on ? "on" : "off");
807         ret = af9005_send_command(state->d, 0x03, &temp, 1, NULL, 0);
808         return ret;
809 }
810
811 static struct mt2060_config af9005_mt2060_config = {
812         0xC0
813 };
814
815 static struct qt1010_config af9005_qt1010_config = {
816         0xC4
817 };
818
819 static int af9005_fe_init(struct dvb_frontend *fe)
820 {
821         struct af9005_fe_state *state = fe->demodulator_priv;
822         struct dvb_usb_adapter *adap = fe->dvb->priv;
823         int ret, i, scriptlen;
824         u8 temp, temp0 = 0, temp1 = 0, temp2 = 0;
825         u8 buf[2];
826         u16 if1;
827
828         deb_info("in af9005_fe_init\n");
829
830         /* reset */
831         deb_info("reset\n");
832         if ((ret =
833              af9005_write_register_bits(state->d, xd_I2C_reg_ofdm_rst_en,
834                                         4, 1, 0x01)))
835                 return ret;
836         if ((ret = af9005_write_ofdm_register(state->d, APO_REG_RESET, 0)))
837                 return ret;
838         /* clear ofdm reset */
839         deb_info("clear ofdm reset\n");
840         for (i = 0; i < 150; i++) {
841                 if ((ret =
842                      af9005_read_ofdm_register(state->d,
843                                                xd_I2C_reg_ofdm_rst, &temp)))
844                         return ret;
845                 if (temp & (regmask[reg_ofdm_rst_len - 1] << reg_ofdm_rst_pos))
846                         break;
847                 msleep(10);
848         }
849         if (i == 150)
850                 return -ETIMEDOUT;
851
852         /*FIXME in the dump
853            write B200 A9
854            write xd_g_reg_ofsm_clk 7
855            read eepr c6 (2)
856            read eepr c7 (2)
857            misc ctrl 3 -> 1
858            read eepr ca (6)
859            write xd_g_reg_ofsm_clk 0
860            write B200 a1
861          */
862         ret = af9005_write_ofdm_register(state->d, 0xb200, 0xa9);
863         if (ret)
864                 return ret;
865         ret = af9005_write_ofdm_register(state->d, xd_g_reg_ofsm_clk, 0x07);
866         if (ret)
867                 return ret;
868         temp = 0x01;
869         ret = af9005_send_command(state->d, 0x03, &temp, 1, NULL, 0);
870         if (ret)
871                 return ret;
872         ret = af9005_write_ofdm_register(state->d, xd_g_reg_ofsm_clk, 0x00);
873         if (ret)
874                 return ret;
875         ret = af9005_write_ofdm_register(state->d, 0xb200, 0xa1);
876         if (ret)
877                 return ret;
878
879         temp = regmask[reg_ofdm_rst_len - 1] << reg_ofdm_rst_pos;
880         if ((ret =
881              af9005_write_register_bits(state->d, xd_I2C_reg_ofdm_rst,
882                                         reg_ofdm_rst_pos, reg_ofdm_rst_len, 1)))
883                 return ret;
884         if ((ret =
885              af9005_write_register_bits(state->d, xd_I2C_reg_ofdm_rst,
886                                         reg_ofdm_rst_pos, reg_ofdm_rst_len, 0)))
887                 return ret;
888
889         if (ret)
890                 return ret;
891         /* don't know what register aefc is, but this is what the windows driver does */
892         ret = af9005_write_ofdm_register(state->d, 0xaefc, 0);
893         if (ret)
894                 return ret;
895
896         /* set stand alone chip */
897         deb_info("set stand alone chip\n");
898         if ((ret =
899              af9005_write_register_bits(state->d, xd_p_reg_dca_stand_alone,
900                                         reg_dca_stand_alone_pos,
901                                         reg_dca_stand_alone_len, 1)))
902                 return ret;
903
904         /* set dca upper & lower chip */
905         deb_info("set dca upper & lower chip\n");
906         if ((ret =
907              af9005_write_register_bits(state->d, xd_p_reg_dca_upper_chip,
908                                         reg_dca_upper_chip_pos,
909                                         reg_dca_upper_chip_len, 0)))
910                 return ret;
911         if ((ret =
912              af9005_write_register_bits(state->d, xd_p_reg_dca_lower_chip,
913                                         reg_dca_lower_chip_pos,
914                                         reg_dca_lower_chip_len, 0)))
915                 return ret;
916
917         /* set 2wire master clock to 0x14 (for 60KHz) */
918         deb_info("set 2wire master clock to 0x14 (for 60KHz)\n");
919         if ((ret =
920              af9005_write_ofdm_register(state->d, xd_I2C_i2c_m_period, 0x14)))
921                 return ret;
922
923         /* clear dca enable chip */
924         deb_info("clear dca enable chip\n");
925         if ((ret =
926              af9005_write_register_bits(state->d, xd_p_reg_dca_en,
927                                         reg_dca_en_pos, reg_dca_en_len, 0)))
928                 return ret;
929         /* FIXME these are register bits, but I don't know which ones */
930         ret = af9005_write_ofdm_register(state->d, 0xa16c, 1);
931         if (ret)
932                 return ret;
933         ret = af9005_write_ofdm_register(state->d, 0xa3c1, 0);
934         if (ret)
935                 return ret;
936
937         /* init other parameters: program cfoe and select bandwith */
938         deb_info("program cfoe\n");
939         if ((ret = af9005_fe_program_cfoe(state->d, BANDWIDTH_6_MHZ)))
940                 return ret;
941         /* set read-update bit for constellation */
942         deb_info("set read-update bit for constellation\n");
943         if ((ret =
944              af9005_write_register_bits(state->d, xd_p_reg_feq_read_update,
945                                         reg_feq_read_update_pos,
946                                         reg_feq_read_update_len, 1)))
947                 return ret;
948
949         /* sample code has a set MPEG TS code here
950            but sniffing reveals that it doesn't do it */
951
952         /* set read-update bit to 1 for DCA constellation */
953         deb_info("set read-update bit 1 for DCA constellation\n");
954         if ((ret =
955              af9005_write_register_bits(state->d, xd_p_reg_dca_read_update,
956                                         reg_dca_read_update_pos,
957                                         reg_dca_read_update_len, 1)))
958                 return ret;
959
960         /* enable fec monitor */
961         deb_info("enable fec monitor\n");
962         if ((ret =
963              af9005_write_register_bits(state->d, xd_p_fec_vtb_rsd_mon_en,
964                                         fec_vtb_rsd_mon_en_pos,
965                                         fec_vtb_rsd_mon_en_len, 1)))
966                 return ret;
967
968         /* FIXME should be register bits, I don't know which ones */
969         ret = af9005_write_ofdm_register(state->d, 0xa601, 0);
970
971         /* set api_retrain_never_freeze */
972         deb_info("set api_retrain_never_freeze\n");
973         if ((ret = af9005_write_ofdm_register(state->d, 0xaefb, 0x01)))
974                 return ret;
975
976         /* load init script */
977         deb_info("load init script\n");
978         scriptlen = sizeof(script) / sizeof(RegDesc);
979         for (i = 0; i < scriptlen; i++) {
980                 if ((ret =
981                      af9005_write_register_bits(state->d, script[i].reg,
982                                                 script[i].pos,
983                                                 script[i].len, script[i].val)))
984                         return ret;
985                 /* save 3 bytes of original fcw */
986                 if (script[i].reg == 0xae18)
987                         temp2 = script[i].val;
988                 if (script[i].reg == 0xae19)
989                         temp1 = script[i].val;
990                 if (script[i].reg == 0xae1a)
991                         temp0 = script[i].val;
992
993                 /* save original unplug threshold */
994                 if (script[i].reg == xd_p_reg_unplug_th)
995                         state->original_if_unplug_th = script[i].val;
996                 if (script[i].reg == xd_p_reg_unplug_rf_gain_th)
997                         state->original_rf_unplug_th = script[i].val;
998                 if (script[i].reg == xd_p_reg_unplug_dtop_if_gain_th)
999                         state->original_dtop_if_unplug_th = script[i].val;
1000                 if (script[i].reg == xd_p_reg_unplug_dtop_rf_gain_th)
1001                         state->original_dtop_rf_unplug_th = script[i].val;
1002
1003         }
1004         state->original_fcw =
1005             ((u32) temp2 << 16) + ((u32) temp1 << 8) + (u32) temp0;
1006
1007
1008         /* save original TOPs */
1009         deb_info("save original TOPs\n");
1010
1011         /*  RF TOP */
1012         ret =
1013             af9005_read_word_agc(state->d,
1014                                  xd_p_reg_aagc_rf_top_numerator_9_8,
1015                                  xd_p_reg_aagc_rf_top_numerator_7_0, 0, 2,
1016                                  &state->original_rf_top);
1017         if (ret)
1018                 return ret;
1019
1020         /*  IF TOP */
1021         ret =
1022             af9005_read_word_agc(state->d,
1023                                  xd_p_reg_aagc_if_top_numerator_9_8,
1024                                  xd_p_reg_aagc_if_top_numerator_7_0, 0, 2,
1025                                  &state->original_if_top);
1026         if (ret)
1027                 return ret;
1028
1029         /*  ACI 0 IF TOP */
1030         ret =
1031             af9005_read_word_agc(state->d, 0xA60E, 0xA60A, 4, 2,
1032                                  &state->original_aci0_if_top);
1033         if (ret)
1034                 return ret;
1035
1036         /*  ACI 1 IF TOP */
1037         ret =
1038             af9005_read_word_agc(state->d, 0xA60E, 0xA60B, 6, 2,
1039                                  &state->original_aci1_if_top);
1040         if (ret)
1041                 return ret;
1042
1043         /* attach tuner and init */
1044         if (state->tuner == NULL) {
1045                 /* read tuner and board id from eeprom */
1046                 ret = af9005_read_eeprom(adap->dev, 0xc6, buf, 2);
1047                 if (ret) {
1048                         err("Impossible to read EEPROM\n");
1049                         return ret;
1050                 }
1051                 deb_info("Tuner id %d, board id %d\n", buf[0], buf[1]);
1052                 switch (buf[0]) {
1053                 case 2: /* MT2060 */
1054                         /* read if1 from eeprom */
1055                         ret = af9005_read_eeprom(adap->dev, 0xc8, buf, 2);
1056                         if (ret) {
1057                                 err("Impossible to read EEPROM\n");
1058                                 return ret;
1059                         }
1060                         if1 = (u16) (buf[0] << 8) + buf[1];
1061                         state->tuner =
1062                             dvb_attach(mt2060_attach, fe, &adap->dev->i2c_adap,
1063                                        &af9005_mt2060_config, if1);
1064                         if (state->tuner == NULL) {
1065                                 deb_info("MT2060 attach failed\n");
1066                                 return -ENODEV;
1067                         }
1068                         break;
1069                 case 3: /* QT1010 */
1070                 case 9: /* QT1010B */
1071                         state->tuner =
1072                             dvb_attach(qt1010_attach, fe, &adap->dev->i2c_adap,
1073                                        &af9005_qt1010_config);
1074                         if (state->tuner == NULL) {
1075                                 deb_info("QT1010 attach failed\n");
1076                                 return -ENODEV;
1077                         }
1078                         break;
1079                 default:
1080                         err("Unsupported tuner type %d", buf[0]);
1081                         return -ENODEV;
1082                 }
1083                 ret = state->tuner->ops.tuner_ops.init(state->tuner);
1084                 if (ret)
1085                         return ret;
1086         }
1087
1088         deb_info("profit!\n");
1089         return 0;
1090 }
1091
1092 static int af9005_fe_sleep(struct dvb_frontend *fe)
1093 {
1094         return af9005_fe_power(fe, 0);
1095 }
1096
1097 static int af9005_ts_bus_ctrl(struct dvb_frontend *fe, int acquire)
1098 {
1099         struct af9005_fe_state *state = fe->demodulator_priv;
1100
1101         if (acquire) {
1102                 state->opened++;
1103         } else {
1104
1105                 state->opened--;
1106                 if (!state->opened)
1107                         af9005_led_control(state->d, 0);
1108         }
1109         return 0;
1110 }
1111
1112 static int af9005_fe_set_frontend(struct dvb_frontend *fe,
1113                                   struct dvb_frontend_parameters *fep)
1114 {
1115         struct af9005_fe_state *state = fe->demodulator_priv;
1116         int ret;
1117         u8 temp, temp0, temp1, temp2;
1118
1119         deb_info("af9005_fe_set_frontend freq %d bw %d\n", fep->frequency,
1120                  fep->u.ofdm.bandwidth);
1121         if (state->tuner == NULL) {
1122                 err("Tuner not attached");
1123                 return -ENODEV;
1124         }
1125
1126         deb_info("turn off led\n");
1127         /* not in the log */
1128         ret = af9005_led_control(state->d, 0);
1129         if (ret)
1130                 return ret;
1131         /* not sure about the bits */
1132         ret = af9005_write_register_bits(state->d, XD_MP2IF_MISC, 2, 1, 0);
1133         if (ret)
1134                 return ret;
1135
1136         /* set FCW to default value */
1137         deb_info("set FCW to default value\n");
1138         temp0 = (u8) (state->original_fcw & 0x000000ff);
1139         temp1 = (u8) ((state->original_fcw & 0x0000ff00) >> 8);
1140         temp2 = (u8) ((state->original_fcw & 0x00ff0000) >> 16);
1141         ret = af9005_write_ofdm_register(state->d, 0xae1a, temp0);
1142         if (ret)
1143                 return ret;
1144         ret = af9005_write_ofdm_register(state->d, 0xae19, temp1);
1145         if (ret)
1146                 return ret;
1147         ret = af9005_write_ofdm_register(state->d, 0xae18, temp2);
1148         if (ret)
1149                 return ret;
1150
1151         /* restore original TOPs */
1152         deb_info("restore original TOPs\n");
1153         ret =
1154             af9005_write_word_agc(state->d,
1155                                   xd_p_reg_aagc_rf_top_numerator_9_8,
1156                                   xd_p_reg_aagc_rf_top_numerator_7_0, 0, 2,
1157                                   state->original_rf_top);
1158         if (ret)
1159                 return ret;
1160         ret =
1161             af9005_write_word_agc(state->d,
1162                                   xd_p_reg_aagc_if_top_numerator_9_8,
1163                                   xd_p_reg_aagc_if_top_numerator_7_0, 0, 2,
1164                                   state->original_if_top);
1165         if (ret)
1166                 return ret;
1167         ret =
1168             af9005_write_word_agc(state->d, 0xA60E, 0xA60A, 4, 2,
1169                                   state->original_aci0_if_top);
1170         if (ret)
1171                 return ret;
1172         ret =
1173             af9005_write_word_agc(state->d, 0xA60E, 0xA60B, 6, 2,
1174                                   state->original_aci1_if_top);
1175         if (ret)
1176                 return ret;
1177
1178         /* select bandwith */
1179         deb_info("select bandwidth");
1180         ret = af9005_fe_select_bw(state->d, fep->u.ofdm.bandwidth);
1181         if (ret)
1182                 return ret;
1183         ret = af9005_fe_program_cfoe(state->d, fep->u.ofdm.bandwidth);
1184         if (ret)
1185                 return ret;
1186
1187         /* clear easy mode flag */
1188         deb_info("clear easy mode flag\n");
1189         ret = af9005_write_ofdm_register(state->d, 0xaefd, 0);
1190         if (ret)
1191                 return ret;
1192
1193         /* set unplug threshold to original value */
1194         deb_info("set unplug threshold to original value\n");
1195         ret =
1196             af9005_write_ofdm_register(state->d, xd_p_reg_unplug_th,
1197                                        state->original_if_unplug_th);
1198         if (ret)
1199                 return ret;
1200         /* set tuner */
1201         deb_info("set tuner\n");
1202         ret = state->tuner->ops.tuner_ops.set_params(state->tuner, fep);
1203         if (ret)
1204                 return ret;
1205
1206         /* trigger ofsm */
1207         deb_info("trigger ofsm\n");
1208         temp = 0;
1209         ret = af9005_write_tuner_registers(state->d, 0xffff, &temp, 1);
1210         if (ret)
1211                 return ret;
1212
1213         /* clear retrain and freeze flag */
1214         deb_info("clear retrain and freeze flag\n");
1215         ret =
1216             af9005_write_register_bits(state->d,
1217                                        xd_p_reg_api_retrain_request,
1218                                        reg_api_retrain_request_pos, 2, 0);
1219         if (ret)
1220                 return ret;
1221
1222         /* reset pre viterbi and post viterbi registers and statistics */
1223         af9005_reset_pre_viterbi(fe);
1224         af9005_reset_post_viterbi(fe);
1225         state->pre_vit_error_count = 0;
1226         state->pre_vit_bit_count = 0;
1227         state->ber = 0;
1228         state->post_vit_error_count = 0;
1229         /* state->unc = 0; commented out since it should be ever increasing */
1230         state->abort_count = 0;
1231
1232         state->next_status_check = jiffies;
1233         state->strong = -1;
1234
1235         return 0;
1236 }
1237
1238 static int af9005_fe_get_frontend(struct dvb_frontend *fe,
1239                                   struct dvb_frontend_parameters *fep)
1240 {
1241         struct af9005_fe_state *state = fe->demodulator_priv;
1242         int ret;
1243         u8 temp;
1244
1245         /* mode */
1246         ret =
1247             af9005_read_register_bits(state->d, xd_g_reg_tpsd_const,
1248                                       reg_tpsd_const_pos, reg_tpsd_const_len,
1249                                       &temp);
1250         if (ret)
1251                 return ret;
1252         deb_info("===== fe_get_frontend ==============\n");
1253         deb_info("CONSTELLATION ");
1254         switch (temp) {
1255         case 0:
1256                 fep->u.ofdm.constellation = QPSK;
1257                 deb_info("QPSK\n");
1258                 break;
1259         case 1:
1260                 fep->u.ofdm.constellation = QAM_16;
1261                 deb_info("QAM_16\n");
1262                 break;
1263         case 2:
1264                 fep->u.ofdm.constellation = QAM_64;
1265                 deb_info("QAM_64\n");
1266                 break;
1267         }
1268
1269         /* tps hierarchy and alpha value */
1270         ret =
1271             af9005_read_register_bits(state->d, xd_g_reg_tpsd_hier,
1272                                       reg_tpsd_hier_pos, reg_tpsd_hier_len,
1273                                       &temp);
1274         if (ret)
1275                 return ret;
1276         deb_info("HIERARCHY ");
1277         switch (temp) {
1278         case 0:
1279                 fep->u.ofdm.hierarchy_information = HIERARCHY_NONE;
1280                 deb_info("NONE\n");
1281                 break;
1282         case 1:
1283                 fep->u.ofdm.hierarchy_information = HIERARCHY_1;
1284                 deb_info("1\n");
1285                 break;
1286         case 2:
1287                 fep->u.ofdm.hierarchy_information = HIERARCHY_2;
1288                 deb_info("2\n");
1289                 break;
1290         case 3:
1291                 fep->u.ofdm.hierarchy_information = HIERARCHY_4;
1292                 deb_info("4\n");
1293                 break;
1294         }
1295
1296         /*  high/low priority     */
1297         ret =
1298             af9005_read_register_bits(state->d, xd_g_reg_dec_pri,
1299                                       reg_dec_pri_pos, reg_dec_pri_len, &temp);
1300         if (ret)
1301                 return ret;
1302         /* if temp is set = high priority */
1303         deb_info("PRIORITY %s\n", temp ? "high" : "low");
1304
1305         /* high coderate */
1306         ret =
1307             af9005_read_register_bits(state->d, xd_g_reg_tpsd_hpcr,
1308                                       reg_tpsd_hpcr_pos, reg_tpsd_hpcr_len,
1309                                       &temp);
1310         if (ret)
1311                 return ret;
1312         deb_info("CODERATE HP ");
1313         switch (temp) {
1314         case 0:
1315                 fep->u.ofdm.code_rate_HP = FEC_1_2;
1316                 deb_info("FEC_1_2\n");
1317                 break;
1318         case 1:
1319                 fep->u.ofdm.code_rate_HP = FEC_2_3;
1320                 deb_info("FEC_2_3\n");
1321                 break;
1322         case 2:
1323                 fep->u.ofdm.code_rate_HP = FEC_3_4;
1324                 deb_info("FEC_3_4\n");
1325                 break;
1326         case 3:
1327                 fep->u.ofdm.code_rate_HP = FEC_5_6;
1328                 deb_info("FEC_5_6\n");
1329                 break;
1330         case 4:
1331                 fep->u.ofdm.code_rate_HP = FEC_7_8;
1332                 deb_info("FEC_7_8\n");
1333                 break;
1334         }
1335
1336         /* low coderate */
1337         ret =
1338             af9005_read_register_bits(state->d, xd_g_reg_tpsd_lpcr,
1339                                       reg_tpsd_lpcr_pos, reg_tpsd_lpcr_len,
1340                                       &temp);
1341         if (ret)
1342                 return ret;
1343         deb_info("CODERATE LP ");
1344         switch (temp) {
1345         case 0:
1346                 fep->u.ofdm.code_rate_LP = FEC_1_2;
1347                 deb_info("FEC_1_2\n");
1348                 break;
1349         case 1:
1350                 fep->u.ofdm.code_rate_LP = FEC_2_3;
1351                 deb_info("FEC_2_3\n");
1352                 break;
1353         case 2:
1354                 fep->u.ofdm.code_rate_LP = FEC_3_4;
1355                 deb_info("FEC_3_4\n");
1356                 break;
1357         case 3:
1358                 fep->u.ofdm.code_rate_LP = FEC_5_6;
1359                 deb_info("FEC_5_6\n");
1360                 break;
1361         case 4:
1362                 fep->u.ofdm.code_rate_LP = FEC_7_8;
1363                 deb_info("FEC_7_8\n");
1364                 break;
1365         }
1366
1367         /* guard interval */
1368         ret =
1369             af9005_read_register_bits(state->d, xd_g_reg_tpsd_gi,
1370                                       reg_tpsd_gi_pos, reg_tpsd_gi_len, &temp);
1371         if (ret)
1372                 return ret;
1373         deb_info("GUARD INTERVAL ");
1374         switch (temp) {
1375         case 0:
1376                 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
1377                 deb_info("1_32\n");
1378                 break;
1379         case 1:
1380                 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
1381                 deb_info("1_16\n");
1382                 break;
1383         case 2:
1384                 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
1385                 deb_info("1_8\n");
1386                 break;
1387         case 3:
1388                 fep->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
1389                 deb_info("1_4\n");
1390                 break;
1391         }
1392
1393         /* fft */
1394         ret =
1395             af9005_read_register_bits(state->d, xd_g_reg_tpsd_txmod,
1396                                       reg_tpsd_txmod_pos, reg_tpsd_txmod_len,
1397                                       &temp);
1398         if (ret)
1399                 return ret;
1400         deb_info("TRANSMISSION MODE ");
1401         switch (temp) {
1402         case 0:
1403                 fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
1404                 deb_info("2K\n");
1405                 break;
1406         case 1:
1407                 fep->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
1408                 deb_info("8K\n");
1409                 break;
1410         }
1411
1412         /* bandwidth      */
1413         ret =
1414             af9005_read_register_bits(state->d, xd_g_reg_bw, reg_bw_pos,
1415                                       reg_bw_len, &temp);
1416         deb_info("BANDWIDTH ");
1417         switch (temp) {
1418         case 0:
1419                 fep->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
1420                 deb_info("6\n");
1421                 break;
1422         case 1:
1423                 fep->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
1424                 deb_info("7\n");
1425                 break;
1426         case 2:
1427                 fep->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
1428                 deb_info("8\n");
1429                 break;
1430         }
1431         return 0;
1432 }
1433
1434 static void af9005_fe_release(struct dvb_frontend *fe)
1435 {
1436         struct af9005_fe_state *state =
1437             (struct af9005_fe_state *)fe->demodulator_priv;
1438         if (state->tuner != NULL && state->tuner->ops.tuner_ops.release != NULL) {
1439                 state->tuner->ops.tuner_ops.release(state->tuner);
1440 #ifdef CONFIG_DVB_CORE_ATTACH
1441                 symbol_put_addr(state->tuner->ops.tuner_ops.release);
1442 #endif
1443         }
1444         kfree(state);
1445 }
1446
1447 static struct dvb_frontend_ops af9005_fe_ops;
1448
1449 struct dvb_frontend *af9005_fe_attach(struct dvb_usb_device *d)
1450 {
1451         struct af9005_fe_state *state = NULL;
1452
1453         /* allocate memory for the internal state */
1454         state = kzalloc(sizeof(struct af9005_fe_state), GFP_KERNEL);
1455         if (state == NULL)
1456                 goto error;
1457
1458         deb_info("attaching frontend af9005\n");
1459
1460         state->d = d;
1461         state->tuner = NULL;
1462         state->opened = 0;
1463
1464         memcpy(&state->frontend.ops, &af9005_fe_ops,
1465                sizeof(struct dvb_frontend_ops));
1466         state->frontend.demodulator_priv = state;
1467
1468         return &state->frontend;
1469       error:
1470         return NULL;
1471 }
1472
1473 static struct dvb_frontend_ops af9005_fe_ops = {
1474         .info = {
1475                  .name = "AF9005 USB DVB-T",
1476                  .type = FE_OFDM,
1477                  .frequency_min = 44250000,
1478                  .frequency_max = 867250000,
1479                  .frequency_stepsize = 250000,
1480                  .caps = FE_CAN_INVERSION_AUTO |
1481                  FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1482                  FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1483                  FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
1484                  FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
1485                  FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_RECOVER |
1486                  FE_CAN_HIERARCHY_AUTO,
1487                  },
1488
1489         .release = af9005_fe_release,
1490
1491         .init = af9005_fe_init,
1492         .sleep = af9005_fe_sleep,
1493         .ts_bus_ctrl = af9005_ts_bus_ctrl,
1494
1495         .set_frontend = af9005_fe_set_frontend,
1496         .get_frontend = af9005_fe_get_frontend,
1497
1498         .read_status = af9005_fe_read_status,
1499         .read_ber = af9005_fe_read_ber,
1500         .read_signal_strength = af9005_fe_read_signal_strength,
1501         .read_snr = af9005_fe_read_snr,
1502         .read_ucblocks = af9005_fe_read_unc_blocks,
1503 };