git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/irq.c

   1 /* $Id: irq.c,v 1.114 2002/01/11 08:45:38 davem Exp $
   2  * irq.c: UltraSparc IRQ handling/init/registry.
   3  *
   4  * Copyright (C) 1997  David S. Miller  (davem@caip.rutgers.edu)
   5  * Copyright (C) 1998  Eddie C. Dost    (ecd@skynet.be)
   6  * Copyright (C) 1998  Jakub Jelinek    (jj@ultra.linux.cz)
   7  */
   8
   9 #include <linux/config.h>
  10 #include <linux/module.h>
  11 #include <linux/sched.h>
  12 #include <linux/ptrace.h>
  13 #include <linux/errno.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/signal.h>
  16 #include <linux/mm.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/slab.h>
  19 #include <linux/random.h>
  20 #include <linux/init.h>
  21 #include <linux/delay.h>
  22 #include <linux/proc_fs.h>
  23 #include <linux/seq_file.h>
  24 #include <linux/bootmem.h>
  25 #include <linux/irq.h>
  26
  27 #include <asm/ptrace.h>
  28 #include <asm/processor.h>
  29 #include <asm/atomic.h>
  30 #include <asm/system.h>
  31 #include <asm/irq.h>
  32 #include <asm/io.h>
  33 #include <asm/sbus.h>
  34 #include <asm/iommu.h>
  35 #include <asm/upa.h>
  36 #include <asm/oplib.h>
  37 #include <asm/prom.h>
  38 #include <asm/timer.h>
  39 #include <asm/smp.h>
  40 #include <asm/starfire.h>
  41 #include <asm/uaccess.h>
  42 #include <asm/cache.h>
  43 #include <asm/cpudata.h>
  44 #include <asm/auxio.h>
  45 #include <asm/head.h>
  46
  47 /* UPA nodes send interrupt packet to UltraSparc with first data reg
  48  * value low 5 (7 on Starfire) bits holding the IRQ identifier being
  49  * delivered.  We must translate this into a non-vector IRQ so we can
  50  * set the softint on this cpu.
  51  *
  52  * To make processing these packets efficient and race free we use
  53  * an array of irq buckets below.  The interrupt vector handler in
  54  * entry.S feeds incoming packets into per-cpu pil-indexed lists.
  55  * The IVEC handler does not need to act atomically, the PIL dispatch
  56  * code uses CAS to get an atomic snapshot of the list and clear it
  57  * at the same time.
  58  *
  59  * If you make changes to ino_bucket, please update hand coded assembler
  60  * of the vectored interrupt trap handler(s) in entry.S and sun4v_ivec.S
  61  */
  62 struct ino_bucket {
  63         /* Next handler in per-CPU IRQ worklist.  We know that
  64          * bucket pointers have the high 32-bits clear, so to
  65          * save space we only store the bits we need.
  66          */
  67 /*0x00*/unsigned int irq_chain;
  68
  69         /* Virtual interrupt number assigned to this INO.  */
  70 /*0x04*/unsigned int virt_irq;
  71 };
  72
  73 #define NUM_IVECS       (IMAP_INR + 1)
  74 struct ino_bucket ivector_table[NUM_IVECS] __attribute__ ((aligned (SMP_CACHE_BYTES)));
  75
  76 #define __irq_ino(irq) \
  77         (((struct ino_bucket *)(unsigned long)(irq)) - &ivector_table[0])
  78 #define __bucket(irq) ((struct ino_bucket *)(unsigned long)(irq))
  79 #define __irq(bucket) ((unsigned int)(unsigned long)(bucket))
  80
  81 /* This has to be in the main kernel image, it cannot be
  82  * turned into per-cpu data.  The reason is that the main
  83  * kernel image is locked into the TLB and this structure
  84  * is accessed from the vectored interrupt trap handler.  If
  85  * access to this structure takes a TLB miss it could cause
  86  * the 5-level sparc v9 trap stack to overflow.
  87  */
  88 #define irq_work(__cpu) &(trap_block[(__cpu)].irq_worklist)
  89
  90 static unsigned int virt_to_real_irq_table[NR_IRQS];
  91 static unsigned char virt_irq_cur = 1;
  92
  93 static unsigned char virt_irq_alloc(unsigned int real_irq)
  94 {
  95         unsigned char ent;
  96
  97         BUILD_BUG_ON(NR_IRQS >= 256);
  98
  99         ent = virt_irq_cur;
 100         if (ent >= NR_IRQS) {
 101                 printk(KERN_ERR "IRQ: Out of virtual IRQs.\n");
 102                 return 0;
 103         }
 104
 105         virt_irq_cur = ent + 1;
 106         virt_to_real_irq_table[ent] = real_irq;
 107
 108         return ent;
 109 }
 110
 111 #if 0 /* Currently unused. */
 112 static unsigned char real_to_virt_irq(unsigned int real_irq)
 113 {
 114         struct ino_bucket *bucket = __bucket(real_irq);
 115
 116         return bucket->virt_irq;
 117 }
 118 #endif
 119
 120 static unsigned int virt_to_real_irq(unsigned char virt_irq)
 121 {
 122         return virt_to_real_irq_table[virt_irq];
 123 }
 124
 125 /*
 126  * /proc/interrupts printing:
 127  */
 128
 129 int show_interrupts(struct seq_file *p, void *v)
 130 {
 131         int i = *(loff_t *) v, j;
 132         struct irqaction * action;
 133         unsigned long flags;
 134
 135         if (i == 0) {
 136                 seq_printf(p, "           ");
 137                 for_each_online_cpu(j)
 138                         seq_printf(p, "CPU%d       ",j);
 139                 seq_putc(p, '\n');
 140         }
 141
 142         if (i < NR_IRQS) {
 143                 spin_lock_irqsave(&irq_desc[i].lock, flags);
 144                 action = irq_desc[i].action;
 145                 if (!action)
 146                         goto skip;
 147                 seq_printf(p, "%3d: ",i);
 148 #ifndef CONFIG_SMP
 149                 seq_printf(p, "%10u ", kstat_irqs(i));
 150 #else
 151                 for_each_online_cpu(j)
 152                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 153 #endif
 154                 seq_printf(p, " %9s", irq_desc[i].handler->typename);
 155                 seq_printf(p, "  %s", action->name);
 156
 157                 for (action=action->next; action; action = action->next)
 158                         seq_printf(p, ", %s", action->name);
 159
 160                 seq_putc(p, '\n');
 161 skip:
 162                 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
 163         }
 164         return 0;
 165 }
 166
 167 extern unsigned long real_hard_smp_processor_id(void);
 168
 169 static unsigned int sun4u_compute_tid(unsigned long imap, unsigned long cpuid)
 170 {
 171         unsigned int tid;
 172
 173         if (this_is_starfire) {
 174                 tid = starfire_translate(imap, cpuid);
 175                 tid <<= IMAP_TID_SHIFT;
 176                 tid &= IMAP_TID_UPA;
 177         } else {
 178                 if (tlb_type == cheetah || tlb_type == cheetah_plus) {
 179                         unsigned long ver;
 180
 181                         __asm__ ("rdpr %%ver, %0" : "=r" (ver));
 182                         if ((ver >> 32UL) == __JALAPENO_ID ||
 183                             (ver >> 32UL) == __SERRANO_ID) {
 184                                 tid = cpuid << IMAP_TID_SHIFT;
 185                                 tid &= IMAP_TID_JBUS;
 186                         } else {
 187                                 unsigned int a = cpuid & 0x1f;
 188                                 unsigned int n = (cpuid >> 5) & 0x1f;
 189
 190                                 tid = ((a << IMAP_AID_SHIFT) |
 191                                        (n << IMAP_NID_SHIFT));
 192                                 tid &= (IMAP_AID_SAFARI |
 193                                         IMAP_NID_SAFARI);;
 194                         }
 195                 } else {
 196                         tid = cpuid << IMAP_TID_SHIFT;
 197                         tid &= IMAP_TID_UPA;
 198                 }
 199         }
 200
 201         return tid;
 202 }
 203
 204 struct irq_handler_data {
 205         unsigned long   iclr;
 206         unsigned long   imap;
 207
 208         void            (*pre_handler)(unsigned int, void *, void *);
 209         void            *pre_handler_arg1;
 210         void            *pre_handler_arg2;
 211 };
 212
 213 static inline struct ino_bucket *virt_irq_to_bucket(unsigned int virt_irq)
 214 {
 215         unsigned int real_irq = virt_to_real_irq(virt_irq);
 216         struct ino_bucket *bucket = NULL;
 217
 218         if (likely(real_irq))
 219                 bucket = __bucket(real_irq);
 220
 221         return bucket;
 222 }
 223
 224 #ifdef CONFIG_SMP
 225 static int irq_choose_cpu(unsigned int virt_irq)
 226 {
 227         cpumask_t mask = irq_affinity[virt_irq];
 228         int cpuid;
 229
 230         if (cpus_equal(mask, CPU_MASK_ALL)) {
 231                 static int irq_rover;
 232                 static DEFINE_SPINLOCK(irq_rover_lock);
 233                 unsigned long flags;
 234
 235                 /* Round-robin distribution... */
 236         do_round_robin:
 237                 spin_lock_irqsave(&irq_rover_lock, flags);
 238
 239                 while (!cpu_online(irq_rover)) {
 240                         if (++irq_rover >= NR_CPUS)
 241                                 irq_rover = 0;
 242                 }
 243                 cpuid = irq_rover;
 244                 do {
 245                         if (++irq_rover >= NR_CPUS)
 246                                 irq_rover = 0;
 247                 } while (!cpu_online(irq_rover));
 248
 249                 spin_unlock_irqrestore(&irq_rover_lock, flags);
 250         } else {
 251                 cpumask_t tmp;
 252
 253                 cpus_and(tmp, cpu_online_map, mask);
 254
 255                 if (cpus_empty(tmp))
 256                         goto do_round_robin;
 257
 258                 cpuid = first_cpu(tmp);
 259         }
 260
 261         return cpuid;
 262 }
 263 #else
 264 static int irq_choose_cpu(unsigned int virt_irq)
 265 {
 266         return real_hard_smp_processor_id();
 267 }
 268 #endif
 269
 270 static void sun4u_irq_enable(unsigned int virt_irq)
 271 {
 272         irq_desc_t *desc = irq_desc + virt_irq;
 273         struct irq_handler_data *data = desc->handler_data;
 274
 275         if (likely(data)) {
 276                 unsigned long cpuid, imap;
 277                 unsigned int tid;
 278
 279                 cpuid = irq_choose_cpu(virt_irq);
 280                 imap = data->imap;
 281
 282                 tid = sun4u_compute_tid(imap, cpuid);
 283
 284                 upa_writel(tid | IMAP_VALID, imap);
 285         }
 286 }
 287
 288 static void sun4u_irq_disable(unsigned int virt_irq)
 289 {
 290         irq_desc_t *desc = irq_desc + virt_irq;
 291         struct irq_handler_data *data = desc->handler_data;
 292
 293         if (likely(data)) {
 294                 unsigned long imap = data->imap;
 295                 u32 tmp = upa_readl(imap);
 296
 297                 tmp &= ~IMAP_VALID;
 298                 upa_writel(tmp, imap);
 299         }
 300 }
 301
 302 static void sun4u_irq_end(unsigned int virt_irq)
 303 {
 304         irq_desc_t *desc = irq_desc + virt_irq;
 305         struct irq_handler_data *data = desc->handler_data;
 306
 307         if (likely(data))
 308                 upa_writel(ICLR_IDLE, data->iclr);
 309 }
 310
 311 static void sun4v_irq_enable(unsigned int virt_irq)
 312 {
 313         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 314         unsigned int ino = bucket - &ivector_table[0];
 315
 316         if (likely(bucket)) {
 317                 unsigned long cpuid;
 318                 int err;
 319
 320                 cpuid = irq_choose_cpu(virt_irq);
 321
 322                 err = sun4v_intr_settarget(ino, cpuid);
 323                 if (err != HV_EOK)
 324                         printk("sun4v_intr_settarget(%x,%lu): err(%d)\n",
 325                                ino, cpuid, err);
 326                 err = sun4v_intr_setenabled(ino, HV_INTR_ENABLED);
 327                 if (err != HV_EOK)
 328                         printk("sun4v_intr_setenabled(%x): err(%d)\n",
 329                                ino, err);
 330         }
 331 }
 332
 333 static void sun4v_irq_disable(unsigned int virt_irq)
 334 {
 335         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 336         unsigned int ino = bucket - &ivector_table[0];
 337
 338         if (likely(bucket)) {
 339                 int err;
 340
 341                 err = sun4v_intr_setenabled(ino, HV_INTR_DISABLED);
 342                 if (err != HV_EOK)
 343                         printk("sun4v_intr_setenabled(%x): "
 344                                "err(%d)\n", ino, err);
 345         }
 346 }
 347
 348 static void sun4v_irq_end(unsigned int virt_irq)
 349 {
 350         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 351         unsigned int ino = bucket - &ivector_table[0];
 352
 353         if (likely(bucket)) {
 354                 int err;
 355
 356                 err = sun4v_intr_setstate(ino, HV_INTR_STATE_IDLE);
 357                 if (err != HV_EOK)
 358                         printk("sun4v_intr_setstate(%x): "
 359                                "err(%d)\n", ino, err);
 360         }
 361 }
 362
 363 static void run_pre_handler(unsigned int virt_irq)
 364 {
 365         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 366         irq_desc_t *desc = irq_desc + virt_irq;
 367         struct irq_handler_data *data = desc->handler_data;
 368
 369         if (likely(data->pre_handler)) {
 370                 data->pre_handler(__irq_ino(__irq(bucket)),
 371                                   data->pre_handler_arg1,
 372                                   data->pre_handler_arg2);
 373         }
 374 }
 375
 376 static struct hw_interrupt_type sun4u_irq = {
 377         .typename       = "sun4u",
 378         .enable         = sun4u_irq_enable,
 379         .disable        = sun4u_irq_disable,
 380         .end            = sun4u_irq_end,
 381 };
 382
 383 static struct hw_interrupt_type sun4u_irq_ack = {
 384         .typename       = "sun4u+ack",
 385         .enable         = sun4u_irq_enable,
 386         .disable        = sun4u_irq_disable,
 387         .ack            = run_pre_handler,
 388         .end            = sun4u_irq_end,
 389 };
 390
 391 static struct hw_interrupt_type sun4v_irq = {
 392         .typename       = "sun4v",
 393         .enable         = sun4v_irq_enable,
 394         .disable        = sun4v_irq_disable,
 395         .end            = sun4v_irq_end,
 396 };
 397
 398 static struct hw_interrupt_type sun4v_irq_ack = {
 399         .typename       = "sun4v+ack",
 400         .enable         = sun4v_irq_enable,
 401         .disable        = sun4v_irq_disable,
 402         .ack            = run_pre_handler,
 403         .end            = sun4v_irq_end,
 404 };
 405
 406 void irq_install_pre_handler(int virt_irq,
 407                              void (*func)(unsigned int, void *, void *),
 408                              void *arg1, void *arg2)
 409 {
 410         irq_desc_t *desc = irq_desc + virt_irq;
 411         struct irq_handler_data *data = desc->handler_data;
 412
 413         data->pre_handler = func;
 414         data->pre_handler_arg1 = arg1;
 415         data->pre_handler_arg2 = arg2;
 416
 417         desc->handler = (desc->handler == &sun4u_irq ?
 418                          &sun4u_irq_ack : &sun4v_irq_ack);
 419 }
 420
 421 unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap)
 422 {
 423         struct ino_bucket *bucket;
 424         struct irq_handler_data *data;
 425         irq_desc_t *desc;
 426         int ino;
 427
 428         BUG_ON(tlb_type == hypervisor);
 429
 430         ino = (upa_readl(imap) & (IMAP_IGN | IMAP_INO)) + inofixup;
 431         bucket = &ivector_table[ino];
 432         if (!bucket->virt_irq) {
 433                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 434                 irq_desc[bucket->virt_irq].handler = &sun4u_irq;
 435         }
 436
 437         desc = irq_desc + bucket->virt_irq;
 438         if (unlikely(desc->handler_data))
 439                 goto out;
 440
 441         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 442         if (unlikely(!data)) {
 443                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 444                 prom_halt();
 445         }
 446         desc->handler_data = data;
 447
 448         data->imap  = imap;
 449         data->iclr  = iclr;
 450
 451 out:
 452         return bucket->virt_irq;
 453 }
 454
 455 unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino)
 456 {
 457         struct ino_bucket *bucket;
 458         struct irq_handler_data *data;
 459         unsigned long sysino;
 460         irq_desc_t *desc;
 461
 462         BUG_ON(tlb_type != hypervisor);
 463
 464         sysino = sun4v_devino_to_sysino(devhandle, devino);
 465         bucket = &ivector_table[sysino];
 466         if (!bucket->virt_irq) {
 467                 bucket->virt_irq = virt_irq_alloc(__irq(bucket));
 468                 irq_desc[bucket->virt_irq].handler = &sun4v_irq;
 469         }
 470
 471         desc = irq_desc + bucket->virt_irq;
 472         if (unlikely(desc->handler_data))
 473                 goto out;
 474
 475         data = kzalloc(sizeof(struct irq_handler_data), GFP_ATOMIC);
 476         if (unlikely(!data)) {
 477                 prom_printf("IRQ: kzalloc(irq_handler_data) failed.\n");
 478                 prom_halt();
 479         }
 480         desc->handler_data = data;
 481
 482         /* Catch accidental accesses to these things.  IMAP/ICLR handling
 483          * is done by hypervisor calls on sun4v platforms, not by direct
 484          * register accesses.
 485          */
 486         data->imap = ~0UL;
 487         data->iclr = ~0UL;
 488
 489 out:
 490         return bucket->virt_irq;
 491 }
 492
 493 void hw_resend_irq(struct hw_interrupt_type *handler, unsigned int virt_irq)
 494 {
 495         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 496         unsigned long pstate;
 497         unsigned int *ent;
 498
 499         __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate));
 500         __asm__ __volatile__("wrpr %0, %1, %%pstate"
 501                              : : "r" (pstate), "i" (PSTATE_IE));
 502         ent = irq_work(smp_processor_id());
 503         bucket->irq_chain = *ent;
 504         *ent = __irq(bucket);
 505         set_softint(1 << PIL_DEVICE_IRQ);
 506         __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate));
 507 }
 508
 509 void ack_bad_irq(unsigned int virt_irq)
 510 {
 511         struct ino_bucket *bucket = virt_irq_to_bucket(virt_irq);
 512         unsigned int ino = 0xdeadbeef;
 513
 514         if (bucket)
 515                 ino = bucket - &ivector_table[0];
 516
 517         printk(KERN_CRIT "Unexpected IRQ from ino[%x] virt_irq[%u]\n",
 518                ino, virt_irq);
 519 }
 520
 521 #ifndef CONFIG_SMP
 522 extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
 523
 524 void timer_irq(int irq, struct pt_regs *regs)
 525 {
 526         unsigned long clr_mask = 1 << irq;
 527         unsigned long tick_mask = tick_ops->softint_mask;
 528
 529         if (get_softint() & tick_mask) {
 530                 irq = 0;
 531                 clr_mask = tick_mask;
 532         }
 533         clear_softint(clr_mask);
 534
 535         irq_enter();
 536
 537         kstat_this_cpu.irqs[0]++;
 538         timer_interrupt(irq, NULL, regs);
 539
 540         irq_exit();
 541 }
 542 #endif
 543
 544 void handler_irq(int irq, struct pt_regs *regs)
 545 {
 546         struct ino_bucket *bucket;
 547
 548         clear_softint(1 << irq);
 549
 550         irq_enter();
 551
 552         /* Sliiiick... */
 553         bucket = __bucket(xchg32(irq_work(smp_processor_id()), 0));
 554         while (bucket) {
 555                 struct ino_bucket *next = __bucket(bucket->irq_chain);
 556
 557                 bucket->irq_chain = 0;
 558                 __do_IRQ(bucket->virt_irq, regs);
 559
 560                 bucket = next;
 561         }
 562
 563         irq_exit();
 564 }
 565
 566 #ifdef CONFIG_BLK_DEV_FD
 567 extern irqreturn_t floppy_interrupt(int, void *, struct pt_regs *);
 568
 569 /* XXX No easy way to include asm/floppy.h XXX */
 570 extern unsigned char *pdma_vaddr;
 571 extern unsigned long pdma_size;
 572 extern volatile int doing_pdma;
 573 extern unsigned long fdc_status;
 574
 575 irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie, struct pt_regs *regs)
 576 {
 577         if (likely(doing_pdma)) {
 578                 void __iomem *stat = (void __iomem *) fdc_status;
 579                 unsigned char *vaddr = pdma_vaddr;
 580                 unsigned long size = pdma_size;
 581                 u8 val;
 582
 583                 while (size) {
 584                         val = readb(stat);
 585                         if (unlikely(!(val & 0x80))) {
 586                                 pdma_vaddr = vaddr;
 587                                 pdma_size = size;
 588                                 return IRQ_HANDLED;
 589                         }
 590                         if (unlikely(!(val & 0x20))) {
 591                                 pdma_vaddr = vaddr;
 592                                 pdma_size = size;
 593                                 doing_pdma = 0;
 594                                 goto main_interrupt;
 595                         }
 596                         if (val & 0x40) {
 597                                 /* read */
 598                                 *vaddr++ = readb(stat + 1);
 599                         } else {
 600                                 unsigned char data = *vaddr++;
 601
 602                                 /* write */
 603                                 writeb(data, stat + 1);
 604                         }
 605                         size--;
 606                 }
 607
 608                 pdma_vaddr = vaddr;
 609                 pdma_size = size;
 610
 611                 /* Send Terminal Count pulse to floppy controller. */
 612                 val = readb(auxio_register);
 613                 val |= AUXIO_AUX1_FTCNT;
 614                 writeb(val, auxio_register);
 615                 val &= ~AUXIO_AUX1_FTCNT;
 616                 writeb(val, auxio_register);
 617
 618                 doing_pdma = 0;
 619         }
 620
 621 main_interrupt:
 622         return floppy_interrupt(irq, dev_cookie, regs);
 623 }
 624 EXPORT_SYMBOL(sparc_floppy_irq);
 625 #endif
 626
 627 struct sun5_timer {
 628         u64     count0;
 629         u64     limit0;
 630         u64     count1;
 631         u64     limit1;
 632 };
 633
 634 static struct sun5_timer *prom_timers;
 635 static u64 prom_limit0, prom_limit1;
 636
 637 static void map_prom_timers(void)
 638 {
 639         struct device_node *dp;
 640         unsigned int *addr;
 641
 642         /* PROM timer node hangs out in the top level of device siblings... */
 643         dp = of_find_node_by_path("/");
 644         dp = dp->child;
 645         while (dp) {
 646                 if (!strcmp(dp->name, "counter-timer"))
 647                         break;
 648                 dp = dp->sibling;
 649         }
 650
 651         /* Assume if node is not present, PROM uses different tick mechanism
 652          * which we should not care about.
 653          */
 654         if (!dp) {
 655                 prom_timers = (struct sun5_timer *) 0;
 656                 return;
 657         }
 658
 659         /* If PROM is really using this, it must be mapped by him. */
 660         addr = of_get_property(dp, "address", NULL);
 661         if (!addr) {
 662                 prom_printf("PROM does not have timer mapped, trying to continue.\n");
 663                 prom_timers = (struct sun5_timer *) 0;
 664                 return;
 665         }
 666         prom_timers = (struct sun5_timer *) ((unsigned long)addr[0]);
 667 }
 668
 669 static void kill_prom_timer(void)
 670 {
 671         if (!prom_timers)
 672                 return;
 673
 674         /* Save them away for later. */
 675         prom_limit0 = prom_timers->limit0;
 676         prom_limit1 = prom_timers->limit1;
 677
 678         /* Just as in sun4c/sun4m PROM uses timer which ticks at IRQ 14.
 679          * We turn both off here just to be paranoid.
 680          */
 681         prom_timers->limit0 = 0;
 682         prom_timers->limit1 = 0;
 683
 684         /* Wheee, eat the interrupt packet too... */
 685         __asm__ __volatile__(
 686 "       mov     0x40, %%g2\n"
 687 "       ldxa    [%%g0] %0, %%g1\n"
 688 "       ldxa    [%%g2] %1, %%g1\n"
 689 "       stxa    %%g0, [%%g0] %0\n"
 690 "       membar  #Sync\n"
 691         : /* no outputs */
 692         : "i" (ASI_INTR_RECEIVE), "i" (ASI_INTR_R)
 693         : "g1", "g2");
 694 }
 695
 696 void init_irqwork_curcpu(void)
 697 {
 698         int cpu = hard_smp_processor_id();
 699
 700         trap_block[cpu].irq_worklist = 0;
 701 }
 702
 703 static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type)
 704 {
 705         unsigned long num_entries = 128;
 706         unsigned long status;
 707
 708         status = sun4v_cpu_qconf(type, paddr, num_entries);
 709         if (status != HV_EOK) {
 710                 prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, "
 711                             "err %lu\n", type, paddr, num_entries, status);
 712                 prom_halt();
 713         }
 714 }
 715
 716 static void __cpuinit sun4v_register_mondo_queues(int this_cpu)
 717 {
 718         struct trap_per_cpu *tb = &trap_block[this_cpu];
 719
 720         register_one_mondo(tb->cpu_mondo_pa, HV_CPU_QUEUE_CPU_MONDO);
 721         register_one_mondo(tb->dev_mondo_pa, HV_CPU_QUEUE_DEVICE_MONDO);
 722         register_one_mondo(tb->resum_mondo_pa, HV_CPU_QUEUE_RES_ERROR);
 723         register_one_mondo(tb->nonresum_mondo_pa, HV_CPU_QUEUE_NONRES_ERROR);
 724 }
 725
 726 static void __cpuinit alloc_one_mondo(unsigned long *pa_ptr, int use_bootmem)
 727 {
 728         void *page;
 729
 730         if (use_bootmem)
 731                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 732         else
 733                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 734
 735         if (!page) {
 736                 prom_printf("SUN4V: Error, cannot allocate mondo queue.\n");
 737                 prom_halt();
 738         }
 739
 740         *pa_ptr = __pa(page);
 741 }
 742
 743 static void __cpuinit alloc_one_kbuf(unsigned long *pa_ptr, int use_bootmem)
 744 {
 745         void *page;
 746
 747         if (use_bootmem)
 748                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 749         else
 750                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 751
 752         if (!page) {
 753                 prom_printf("SUN4V: Error, cannot allocate kbuf page.\n");
 754                 prom_halt();
 755         }
 756
 757         *pa_ptr = __pa(page);
 758 }
 759
 760 static void __cpuinit init_cpu_send_mondo_info(struct trap_per_cpu *tb, int use_bootmem)
 761 {
 762 #ifdef CONFIG_SMP
 763         void *page;
 764
 765         BUILD_BUG_ON((NR_CPUS * sizeof(u16)) > (PAGE_SIZE - 64));
 766
 767         if (use_bootmem)
 768                 page = alloc_bootmem_low_pages(PAGE_SIZE);
 769         else
 770                 page = (void *) get_zeroed_page(GFP_ATOMIC);
 771
 772         if (!page) {
 773                 prom_printf("SUN4V: Error, cannot allocate cpu mondo page.\n");
 774                 prom_halt();
 775         }
 776
 777         tb->cpu_mondo_block_pa = __pa(page);
 778         tb->cpu_list_pa = __pa(page + 64);
 779 #endif
 780 }
 781
 782 /* Allocate and register the mondo and error queues for this cpu.  */
 783 void __cpuinit sun4v_init_mondo_queues(int use_bootmem, int cpu, int alloc, int load)
 784 {
 785         struct trap_per_cpu *tb = &trap_block[cpu];
 786
 787         if (alloc) {
 788                 alloc_one_mondo(&tb->cpu_mondo_pa, use_bootmem);
 789                 alloc_one_mondo(&tb->dev_mondo_pa, use_bootmem);
 790                 alloc_one_mondo(&tb->resum_mondo_pa, use_bootmem);
 791                 alloc_one_kbuf(&tb->resum_kernel_buf_pa, use_bootmem);
 792                 alloc_one_mondo(&tb->nonresum_mondo_pa, use_bootmem);
 793                 alloc_one_kbuf(&tb->nonresum_kernel_buf_pa, use_bootmem);
 794
 795                 init_cpu_send_mondo_info(tb, use_bootmem);
 796         }
 797
 798         if (load) {
 799                 if (cpu != hard_smp_processor_id()) {
 800                         prom_printf("SUN4V: init mondo on cpu %d not %d\n",
 801                                     cpu, hard_smp_processor_id());
 802                         prom_halt();
 803                 }
 804                 sun4v_register_mondo_queues(cpu);
 805         }
 806 }
 807
 808 static struct irqaction timer_irq_action = {
 809         .name = "timer",
 810 };
 811
 812 /* Only invoked on boot processor. */
 813 void __init init_IRQ(void)
 814 {
 815         map_prom_timers();
 816         kill_prom_timer();
 817         memset(&ivector_table[0], 0, sizeof(ivector_table));
 818
 819         if (tlb_type == hypervisor)
 820                 sun4v_init_mondo_queues(1, hard_smp_processor_id(), 1, 1);
 821
 822         /* We need to clear any IRQ's pending in the soft interrupt
 823          * registers, a spurious one could be left around from the
 824          * PROM timer which we just disabled.
 825          */
 826         clear_softint(get_softint());
 827
 828         /* Now that ivector table is initialized, it is safe
 829          * to receive IRQ vector traps.  We will normally take
 830          * one or two right now, in case some device PROM used
 831          * to boot us wants to speak to us.  We just ignore them.
 832          */
 833         __asm__ __volatile__("rdpr      %%pstate, %%g1\n\t"
 834                              "or        %%g1, %0, %%g1\n\t"
 835                              "wrpr      %%g1, 0x0, %%pstate"
 836                              : /* No outputs */
 837                              : "i" (PSTATE_IE)
 838                              : "g1");
 839
 840         irq_desc[0].action = &timer_irq_action;
 841 }