Pull osi into release branch
[linux-2.6] / drivers / usb / gadget / pxa2xx_udc.c
1 /*
2  * linux/drivers/usb/gadget/pxa2xx_udc.c
3  * Intel PXA25x and IXP4xx on-chip full speed USB device controllers
4  *
5  * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker)
6  * Copyright (C) 2003 Robert Schwebel, Pengutronix
7  * Copyright (C) 2003 Benedikt Spranger, Pengutronix
8  * Copyright (C) 2003 David Brownell
9  * Copyright (C) 2003 Joshua Wise
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
24  *
25  */
26
27 // #define      VERBOSE DBG_VERBOSE
28
29 #include <linux/device.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/types.h>
34 #include <linux/errno.h>
35 #include <linux/delay.h>
36 #include <linux/slab.h>
37 #include <linux/init.h>
38 #include <linux/timer.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/proc_fs.h>
42 #include <linux/mm.h>
43 #include <linux/platform_device.h>
44 #include <linux/dma-mapping.h>
45 #include <linux/irq.h>
46
47 #include <asm/byteorder.h>
48 #include <asm/dma.h>
49 #include <asm/gpio.h>
50 #include <asm/io.h>
51 #include <asm/system.h>
52 #include <asm/mach-types.h>
53 #include <asm/unaligned.h>
54 #include <asm/hardware.h>
55
56 #include <linux/usb/ch9.h>
57 #include <linux/usb_gadget.h>
58
59 #include <asm/mach/udc_pxa2xx.h>
60
61
62 /*
63  * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x
64  * series processors.  The UDC for the IXP 4xx series is very similar.
65  * There are fifteen endpoints, in addition to ep0.
66  *
67  * Such controller drivers work with a gadget driver.  The gadget driver
68  * returns descriptors, implements configuration and data protocols used
69  * by the host to interact with this device, and allocates endpoints to
70  * the different protocol interfaces.  The controller driver virtualizes
71  * usb hardware so that the gadget drivers will be more portable.
72  *
73  * This UDC hardware wants to implement a bit too much USB protocol, so
74  * it constrains the sorts of USB configuration change events that work.
75  * The errata for these chips are misleading; some "fixed" bugs from
76  * pxa250 a0/a1 b0/b1/b2 sure act like they're still there.
77  *
78  * Note that the UDC hardware supports DMA (except on IXP) but that's
79  * not used here.  IN-DMA (to host) is simple enough, when the data is
80  * suitably aligned (16 bytes) ... the network stack doesn't do that,
81  * other software can.  OUT-DMA is buggy in most chip versions, as well
82  * as poorly designed (data toggle not automatic).  So this driver won't
83  * bother using DMA.  (Mostly-working IN-DMA support was available in
84  * kernels before 2.6.23, but was never enabled or well tested.)
85  */
86
87 #define DRIVER_VERSION  "30-June-2007"
88 #define DRIVER_DESC     "PXA 25x USB Device Controller driver"
89
90
91 static const char driver_name [] = "pxa2xx_udc";
92
93 static const char ep0name [] = "ep0";
94
95
96 // #define      DISABLE_TEST_MODE
97
98 #ifdef CONFIG_ARCH_IXP4XX
99
100 /* cpu-specific register addresses are compiled in to this code */
101 #ifdef CONFIG_ARCH_PXA
102 #error "Can't configure both IXP and PXA"
103 #endif
104
105 #endif
106
107 #include "pxa2xx_udc.h"
108
109
110 #ifdef  CONFIG_USB_PXA2XX_SMALL
111 #define SIZE_STR        " (small)"
112 #else
113 #define SIZE_STR        ""
114 #endif
115
116 #ifdef DISABLE_TEST_MODE
117 /* (mode == 0) == no undocumented chip tweaks
118  * (mode & 1)  == double buffer bulk IN
119  * (mode & 2)  == double buffer bulk OUT
120  * ... so mode = 3 (or 7, 15, etc) does it for both
121  */
122 static ushort fifo_mode = 0;
123 module_param(fifo_mode, ushort, 0);
124 MODULE_PARM_DESC (fifo_mode, "pxa2xx udc fifo mode");
125 #endif
126
127 /* ---------------------------------------------------------------------------
128  *      endpoint related parts of the api to the usb controller hardware,
129  *      used by gadget driver; and the inner talker-to-hardware core.
130  * ---------------------------------------------------------------------------
131  */
132
133 static void pxa2xx_ep_fifo_flush (struct usb_ep *ep);
134 static void nuke (struct pxa2xx_ep *, int status);
135
136 /* one GPIO should be used to detect VBUS from the host */
137 static int is_vbus_present(void)
138 {
139         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
140
141         if (mach->gpio_vbus)
142                 return gpio_get_value(mach->gpio_vbus);
143         if (mach->udc_is_connected)
144                 return mach->udc_is_connected();
145         return 1;
146 }
147
148 /* one GPIO should control a D+ pullup, so host sees this device (or not) */
149 static void pullup_off(void)
150 {
151         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
152
153         if (mach->gpio_pullup)
154                 gpio_set_value(mach->gpio_pullup, 0);
155         else if (mach->udc_command)
156                 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT);
157 }
158
159 static void pullup_on(void)
160 {
161         struct pxa2xx_udc_mach_info             *mach = the_controller->mach;
162
163         if (mach->gpio_pullup)
164                 gpio_set_value(mach->gpio_pullup, 1);
165         else if (mach->udc_command)
166                 mach->udc_command(PXA2XX_UDC_CMD_CONNECT);
167 }
168
169 static void pio_irq_enable(int bEndpointAddress)
170 {
171         bEndpointAddress &= 0xf;
172         if (bEndpointAddress < 8)
173                 UICR0 &= ~(1 << bEndpointAddress);
174         else {
175                 bEndpointAddress -= 8;
176                 UICR1 &= ~(1 << bEndpointAddress);
177         }
178 }
179
180 static void pio_irq_disable(int bEndpointAddress)
181 {
182         bEndpointAddress &= 0xf;
183         if (bEndpointAddress < 8)
184                 UICR0 |= 1 << bEndpointAddress;
185         else {
186                 bEndpointAddress -= 8;
187                 UICR1 |= 1 << bEndpointAddress;
188         }
189 }
190
191 /* The UDCCR reg contains mask and interrupt status bits,
192  * so using '|=' isn't safe as it may ack an interrupt.
193  */
194 #define UDCCR_MASK_BITS         (UDCCR_REM | UDCCR_SRM | UDCCR_UDE)
195
196 static inline void udc_set_mask_UDCCR(int mask)
197 {
198         UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS);
199 }
200
201 static inline void udc_clear_mask_UDCCR(int mask)
202 {
203         UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS);
204 }
205
206 static inline void udc_ack_int_UDCCR(int mask)
207 {
208         /* udccr contains the bits we dont want to change */
209         __u32 udccr = UDCCR & UDCCR_MASK_BITS;
210
211         UDCCR = udccr | (mask & ~UDCCR_MASK_BITS);
212 }
213
214 /*
215  * endpoint enable/disable
216  *
217  * we need to verify the descriptors used to enable endpoints.  since pxa2xx
218  * endpoint configurations are fixed, and are pretty much always enabled,
219  * there's not a lot to manage here.
220  *
221  * because pxa2xx can't selectively initialize bulk (or interrupt) endpoints,
222  * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except
223  * for a single interface (with only the default altsetting) and for gadget
224  * drivers that don't halt endpoints (not reset by set_interface).  that also
225  * means that if you use ISO, you must violate the USB spec rule that all
226  * iso endpoints must be in non-default altsettings.
227  */
228 static int pxa2xx_ep_enable (struct usb_ep *_ep,
229                 const struct usb_endpoint_descriptor *desc)
230 {
231         struct pxa2xx_ep        *ep;
232         struct pxa2xx_udc       *dev;
233
234         ep = container_of (_ep, struct pxa2xx_ep, ep);
235         if (!_ep || !desc || ep->desc || _ep->name == ep0name
236                         || desc->bDescriptorType != USB_DT_ENDPOINT
237                         || ep->bEndpointAddress != desc->bEndpointAddress
238                         || ep->fifo_size < le16_to_cpu
239                                                 (desc->wMaxPacketSize)) {
240                 DMSG("%s, bad ep or descriptor\n", __FUNCTION__);
241                 return -EINVAL;
242         }
243
244         /* xfer types must match, except that interrupt ~= bulk */
245         if (ep->bmAttributes != desc->bmAttributes
246                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
247                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
248                 DMSG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
249                 return -EINVAL;
250         }
251
252         /* hardware _could_ do smaller, but driver doesn't */
253         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
254                                 && le16_to_cpu (desc->wMaxPacketSize)
255                                                 != BULK_FIFO_SIZE)
256                         || !desc->wMaxPacketSize) {
257                 DMSG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
258                 return -ERANGE;
259         }
260
261         dev = ep->dev;
262         if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
263                 DMSG("%s, bogus device state\n", __FUNCTION__);
264                 return -ESHUTDOWN;
265         }
266
267         ep->desc = desc;
268         ep->stopped = 0;
269         ep->pio_irqs = 0;
270         ep->ep.maxpacket = le16_to_cpu (desc->wMaxPacketSize);
271
272         /* flush fifo (mostly for OUT buffers) */
273         pxa2xx_ep_fifo_flush (_ep);
274
275         /* ... reset halt state too, if we could ... */
276
277         DBG(DBG_VERBOSE, "enabled %s\n", _ep->name);
278         return 0;
279 }
280
281 static int pxa2xx_ep_disable (struct usb_ep *_ep)
282 {
283         struct pxa2xx_ep        *ep;
284         unsigned long           flags;
285
286         ep = container_of (_ep, struct pxa2xx_ep, ep);
287         if (!_ep || !ep->desc) {
288                 DMSG("%s, %s not enabled\n", __FUNCTION__,
289                         _ep ? ep->ep.name : NULL);
290                 return -EINVAL;
291         }
292         local_irq_save(flags);
293
294         nuke (ep, -ESHUTDOWN);
295
296         /* flush fifo (mostly for IN buffers) */
297         pxa2xx_ep_fifo_flush (_ep);
298
299         ep->desc = NULL;
300         ep->stopped = 1;
301
302         local_irq_restore(flags);
303         DBG(DBG_VERBOSE, "%s disabled\n", _ep->name);
304         return 0;
305 }
306
307 /*-------------------------------------------------------------------------*/
308
309 /* for the pxa2xx, these can just wrap kmalloc/kfree.  gadget drivers
310  * must still pass correctly initialized endpoints, since other controller
311  * drivers may care about how it's currently set up (dma issues etc).
312  */
313
314 /*
315  *      pxa2xx_ep_alloc_request - allocate a request data structure
316  */
317 static struct usb_request *
318 pxa2xx_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags)
319 {
320         struct pxa2xx_request *req;
321
322         req = kzalloc(sizeof(*req), gfp_flags);
323         if (!req)
324                 return NULL;
325
326         INIT_LIST_HEAD (&req->queue);
327         return &req->req;
328 }
329
330
331 /*
332  *      pxa2xx_ep_free_request - deallocate a request data structure
333  */
334 static void
335 pxa2xx_ep_free_request (struct usb_ep *_ep, struct usb_request *_req)
336 {
337         struct pxa2xx_request   *req;
338
339         req = container_of (_req, struct pxa2xx_request, req);
340         WARN_ON (!list_empty (&req->queue));
341         kfree(req);
342 }
343
344 /*-------------------------------------------------------------------------*/
345
346 /*
347  *      done - retire a request; caller blocked irqs
348  */
349 static void done(struct pxa2xx_ep *ep, struct pxa2xx_request *req, int status)
350 {
351         unsigned                stopped = ep->stopped;
352
353         list_del_init(&req->queue);
354
355         if (likely (req->req.status == -EINPROGRESS))
356                 req->req.status = status;
357         else
358                 status = req->req.status;
359
360         if (status && status != -ESHUTDOWN)
361                 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n",
362                         ep->ep.name, &req->req, status,
363                         req->req.actual, req->req.length);
364
365         /* don't modify queue heads during completion callback */
366         ep->stopped = 1;
367         req->req.complete(&ep->ep, &req->req);
368         ep->stopped = stopped;
369 }
370
371
372 static inline void ep0_idle (struct pxa2xx_udc *dev)
373 {
374         dev->ep0state = EP0_IDLE;
375 }
376
377 static int
378 write_packet(volatile u32 *uddr, struct pxa2xx_request *req, unsigned max)
379 {
380         u8              *buf;
381         unsigned        length, count;
382
383         buf = req->req.buf + req->req.actual;
384         prefetch(buf);
385
386         /* how big will this packet be? */
387         length = min(req->req.length - req->req.actual, max);
388         req->req.actual += length;
389
390         count = length;
391         while (likely(count--))
392                 *uddr = *buf++;
393
394         return length;
395 }
396
397 /*
398  * write to an IN endpoint fifo, as many packets as possible.
399  * irqs will use this to write the rest later.
400  * caller guarantees at least one packet buffer is ready (or a zlp).
401  */
402 static int
403 write_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
404 {
405         unsigned                max;
406
407         max = le16_to_cpu(ep->desc->wMaxPacketSize);
408         do {
409                 unsigned        count;
410                 int             is_last, is_short;
411
412                 count = write_packet(ep->reg_uddr, req, max);
413
414                 /* last packet is usually short (or a zlp) */
415                 if (unlikely (count != max))
416                         is_last = is_short = 1;
417                 else {
418                         if (likely(req->req.length != req->req.actual)
419                                         || req->req.zero)
420                                 is_last = 0;
421                         else
422                                 is_last = 1;
423                         /* interrupt/iso maxpacket may not fill the fifo */
424                         is_short = unlikely (max < ep->fifo_size);
425                 }
426
427                 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n",
428                         ep->ep.name, count,
429                         is_last ? "/L" : "", is_short ? "/S" : "",
430                         req->req.length - req->req.actual, req);
431
432                 /* let loose that packet. maybe try writing another one,
433                  * double buffering might work.  TSP, TPC, and TFS
434                  * bit values are the same for all normal IN endpoints.
435                  */
436                 *ep->reg_udccs = UDCCS_BI_TPC;
437                 if (is_short)
438                         *ep->reg_udccs = UDCCS_BI_TSP;
439
440                 /* requests complete when all IN data is in the FIFO */
441                 if (is_last) {
442                         done (ep, req, 0);
443                         if (list_empty(&ep->queue))
444                                 pio_irq_disable (ep->bEndpointAddress);
445                         return 1;
446                 }
447
448                 // TODO experiment: how robust can fifo mode tweaking be?
449                 // double buffering is off in the default fifo mode, which
450                 // prevents TFS from being set here.
451
452         } while (*ep->reg_udccs & UDCCS_BI_TFS);
453         return 0;
454 }
455
456 /* caller asserts req->pending (ep0 irq status nyet cleared); starts
457  * ep0 data stage.  these chips want very simple state transitions.
458  */
459 static inline
460 void ep0start(struct pxa2xx_udc *dev, u32 flags, const char *tag)
461 {
462         UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR;
463         USIR0 = USIR0_IR0;
464         dev->req_pending = 0;
465         DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n",
466                 __FUNCTION__, tag, UDCCS0, flags);
467 }
468
469 static int
470 write_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
471 {
472         unsigned        count;
473         int             is_short;
474
475         count = write_packet(&UDDR0, req, EP0_FIFO_SIZE);
476         ep->dev->stats.write.bytes += count;
477
478         /* last packet "must be" short (or a zlp) */
479         is_short = (count != EP0_FIFO_SIZE);
480
481         DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count,
482                 req->req.length - req->req.actual, req);
483
484         if (unlikely (is_short)) {
485                 if (ep->dev->req_pending)
486                         ep0start(ep->dev, UDCCS0_IPR, "short IN");
487                 else
488                         UDCCS0 = UDCCS0_IPR;
489
490                 count = req->req.length;
491                 done (ep, req, 0);
492                 ep0_idle(ep->dev);
493 #ifndef CONFIG_ARCH_IXP4XX
494 #if 1
495                 /* This seems to get rid of lost status irqs in some cases:
496                  * host responds quickly, or next request involves config
497                  * change automagic, or should have been hidden, or ...
498                  *
499                  * FIXME get rid of all udelays possible...
500                  */
501                 if (count >= EP0_FIFO_SIZE) {
502                         count = 100;
503                         do {
504                                 if ((UDCCS0 & UDCCS0_OPR) != 0) {
505                                         /* clear OPR, generate ack */
506                                         UDCCS0 = UDCCS0_OPR;
507                                         break;
508                                 }
509                                 count--;
510                                 udelay(1);
511                         } while (count);
512                 }
513 #endif
514 #endif
515         } else if (ep->dev->req_pending)
516                 ep0start(ep->dev, 0, "IN");
517         return is_short;
518 }
519
520
521 /*
522  * read_fifo -  unload packet(s) from the fifo we use for usb OUT
523  * transfers and put them into the request.  caller should have made
524  * sure there's at least one packet ready.
525  *
526  * returns true if the request completed because of short packet or the
527  * request buffer having filled (and maybe overran till end-of-packet).
528  */
529 static int
530 read_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
531 {
532         for (;;) {
533                 u32             udccs;
534                 u8              *buf;
535                 unsigned        bufferspace, count, is_short;
536
537                 /* make sure there's a packet in the FIFO.
538                  * UDCCS_{BO,IO}_RPC are all the same bit value.
539                  * UDCCS_{BO,IO}_RNE are all the same bit value.
540                  */
541                 udccs = *ep->reg_udccs;
542                 if (unlikely ((udccs & UDCCS_BO_RPC) == 0))
543                         break;
544                 buf = req->req.buf + req->req.actual;
545                 prefetchw(buf);
546                 bufferspace = req->req.length - req->req.actual;
547
548                 /* read all bytes from this packet */
549                 if (likely (udccs & UDCCS_BO_RNE)) {
550                         count = 1 + (0x0ff & *ep->reg_ubcr);
551                         req->req.actual += min (count, bufferspace);
552                 } else /* zlp */
553                         count = 0;
554                 is_short = (count < ep->ep.maxpacket);
555                 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n",
556                         ep->ep.name, udccs, count,
557                         is_short ? "/S" : "",
558                         req, req->req.actual, req->req.length);
559                 while (likely (count-- != 0)) {
560                         u8      byte = (u8) *ep->reg_uddr;
561
562                         if (unlikely (bufferspace == 0)) {
563                                 /* this happens when the driver's buffer
564                                  * is smaller than what the host sent.
565                                  * discard the extra data.
566                                  */
567                                 if (req->req.status != -EOVERFLOW)
568                                         DMSG("%s overflow %d\n",
569                                                 ep->ep.name, count);
570                                 req->req.status = -EOVERFLOW;
571                         } else {
572                                 *buf++ = byte;
573                                 bufferspace--;
574                         }
575                 }
576                 *ep->reg_udccs =  UDCCS_BO_RPC;
577                 /* RPC/RSP/RNE could now reflect the other packet buffer */
578
579                 /* iso is one request per packet */
580                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
581                         if (udccs & UDCCS_IO_ROF)
582                                 req->req.status = -EHOSTUNREACH;
583                         /* more like "is_done" */
584                         is_short = 1;
585                 }
586
587                 /* completion */
588                 if (is_short || req->req.actual == req->req.length) {
589                         done (ep, req, 0);
590                         if (list_empty(&ep->queue))
591                                 pio_irq_disable (ep->bEndpointAddress);
592                         return 1;
593                 }
594
595                 /* finished that packet.  the next one may be waiting... */
596         }
597         return 0;
598 }
599
600 /*
601  * special ep0 version of the above.  no UBCR0 or double buffering; status
602  * handshaking is magic.  most device protocols don't need control-OUT.
603  * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other
604  * protocols do use them.
605  */
606 static int
607 read_ep0_fifo (struct pxa2xx_ep *ep, struct pxa2xx_request *req)
608 {
609         u8              *buf, byte;
610         unsigned        bufferspace;
611
612         buf = req->req.buf + req->req.actual;
613         bufferspace = req->req.length - req->req.actual;
614
615         while (UDCCS0 & UDCCS0_RNE) {
616                 byte = (u8) UDDR0;
617
618                 if (unlikely (bufferspace == 0)) {
619                         /* this happens when the driver's buffer
620                          * is smaller than what the host sent.
621                          * discard the extra data.
622                          */
623                         if (req->req.status != -EOVERFLOW)
624                                 DMSG("%s overflow\n", ep->ep.name);
625                         req->req.status = -EOVERFLOW;
626                 } else {
627                         *buf++ = byte;
628                         req->req.actual++;
629                         bufferspace--;
630                 }
631         }
632
633         UDCCS0 = UDCCS0_OPR | UDCCS0_IPR;
634
635         /* completion */
636         if (req->req.actual >= req->req.length)
637                 return 1;
638
639         /* finished that packet.  the next one may be waiting... */
640         return 0;
641 }
642
643 /*-------------------------------------------------------------------------*/
644
645 static int
646 pxa2xx_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
647 {
648         struct pxa2xx_request   *req;
649         struct pxa2xx_ep        *ep;
650         struct pxa2xx_udc       *dev;
651         unsigned long           flags;
652
653         req = container_of(_req, struct pxa2xx_request, req);
654         if (unlikely (!_req || !_req->complete || !_req->buf
655                         || !list_empty(&req->queue))) {
656                 DMSG("%s, bad params\n", __FUNCTION__);
657                 return -EINVAL;
658         }
659
660         ep = container_of(_ep, struct pxa2xx_ep, ep);
661         if (unlikely (!_ep || (!ep->desc && ep->ep.name != ep0name))) {
662                 DMSG("%s, bad ep\n", __FUNCTION__);
663                 return -EINVAL;
664         }
665
666         dev = ep->dev;
667         if (unlikely (!dev->driver
668                         || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
669                 DMSG("%s, bogus device state\n", __FUNCTION__);
670                 return -ESHUTDOWN;
671         }
672
673         /* iso is always one packet per request, that's the only way
674          * we can report per-packet status.  that also helps with dma.
675          */
676         if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
677                         && req->req.length > le16_to_cpu
678                                                 (ep->desc->wMaxPacketSize)))
679                 return -EMSGSIZE;
680
681         DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n",
682                 _ep->name, _req, _req->length, _req->buf);
683
684         local_irq_save(flags);
685
686         _req->status = -EINPROGRESS;
687         _req->actual = 0;
688
689         /* kickstart this i/o queue? */
690         if (list_empty(&ep->queue) && !ep->stopped) {
691                 if (ep->desc == 0 /* ep0 */) {
692                         unsigned        length = _req->length;
693
694                         switch (dev->ep0state) {
695                         case EP0_IN_DATA_PHASE:
696                                 dev->stats.write.ops++;
697                                 if (write_ep0_fifo(ep, req))
698                                         req = NULL;
699                                 break;
700
701                         case EP0_OUT_DATA_PHASE:
702                                 dev->stats.read.ops++;
703                                 /* messy ... */
704                                 if (dev->req_config) {
705                                         DBG(DBG_VERBOSE, "ep0 config ack%s\n",
706                                                 dev->has_cfr ?  "" : " raced");
707                                         if (dev->has_cfr)
708                                                 UDCCFR = UDCCFR_AREN|UDCCFR_ACM
709                                                         |UDCCFR_MB1;
710                                         done(ep, req, 0);
711                                         dev->ep0state = EP0_END_XFER;
712                                         local_irq_restore (flags);
713                                         return 0;
714                                 }
715                                 if (dev->req_pending)
716                                         ep0start(dev, UDCCS0_IPR, "OUT");
717                                 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0
718                                                 && read_ep0_fifo(ep, req))) {
719                                         ep0_idle(dev);
720                                         done(ep, req, 0);
721                                         req = NULL;
722                                 }
723                                 break;
724
725                         default:
726                                 DMSG("ep0 i/o, odd state %d\n", dev->ep0state);
727                                 local_irq_restore (flags);
728                                 return -EL2HLT;
729                         }
730                 /* can the FIFO can satisfy the request immediately? */
731                 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) {
732                         if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0
733                                         && write_fifo(ep, req))
734                                 req = NULL;
735                 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0
736                                 && read_fifo(ep, req)) {
737                         req = NULL;
738                 }
739
740                 if (likely (req && ep->desc))
741                         pio_irq_enable(ep->bEndpointAddress);
742         }
743
744         /* pio or dma irq handler advances the queue. */
745         if (likely (req != 0))
746                 list_add_tail(&req->queue, &ep->queue);
747         local_irq_restore(flags);
748
749         return 0;
750 }
751
752
753 /*
754  *      nuke - dequeue ALL requests
755  */
756 static void nuke(struct pxa2xx_ep *ep, int status)
757 {
758         struct pxa2xx_request *req;
759
760         /* called with irqs blocked */
761         while (!list_empty(&ep->queue)) {
762                 req = list_entry(ep->queue.next,
763                                 struct pxa2xx_request,
764                                 queue);
765                 done(ep, req, status);
766         }
767         if (ep->desc)
768                 pio_irq_disable (ep->bEndpointAddress);
769 }
770
771
772 /* dequeue JUST ONE request */
773 static int pxa2xx_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
774 {
775         struct pxa2xx_ep        *ep;
776         struct pxa2xx_request   *req;
777         unsigned long           flags;
778
779         ep = container_of(_ep, struct pxa2xx_ep, ep);
780         if (!_ep || ep->ep.name == ep0name)
781                 return -EINVAL;
782
783         local_irq_save(flags);
784
785         /* make sure it's actually queued on this endpoint */
786         list_for_each_entry (req, &ep->queue, queue) {
787                 if (&req->req == _req)
788                         break;
789         }
790         if (&req->req != _req) {
791                 local_irq_restore(flags);
792                 return -EINVAL;
793         }
794
795         done(ep, req, -ECONNRESET);
796
797         local_irq_restore(flags);
798         return 0;
799 }
800
801 /*-------------------------------------------------------------------------*/
802
803 static int pxa2xx_ep_set_halt(struct usb_ep *_ep, int value)
804 {
805         struct pxa2xx_ep        *ep;
806         unsigned long           flags;
807
808         ep = container_of(_ep, struct pxa2xx_ep, ep);
809         if (unlikely (!_ep
810                         || (!ep->desc && ep->ep.name != ep0name))
811                         || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
812                 DMSG("%s, bad ep\n", __FUNCTION__);
813                 return -EINVAL;
814         }
815         if (value == 0) {
816                 /* this path (reset toggle+halt) is needed to implement
817                  * SET_INTERFACE on normal hardware.  but it can't be
818                  * done from software on the PXA UDC, and the hardware
819                  * forgets to do it as part of SET_INTERFACE automagic.
820                  */
821                 DMSG("only host can clear %s halt\n", _ep->name);
822                 return -EROFS;
823         }
824
825         local_irq_save(flags);
826
827         if ((ep->bEndpointAddress & USB_DIR_IN) != 0
828                         && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0
829                            || !list_empty(&ep->queue))) {
830                 local_irq_restore(flags);
831                 return -EAGAIN;
832         }
833
834         /* FST bit is the same for control, bulk in, bulk out, interrupt in */
835         *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF;
836
837         /* ep0 needs special care */
838         if (!ep->desc) {
839                 start_watchdog(ep->dev);
840                 ep->dev->req_pending = 0;
841                 ep->dev->ep0state = EP0_STALL;
842
843         /* and bulk/intr endpoints like dropping stalls too */
844         } else {
845                 unsigned i;
846                 for (i = 0; i < 1000; i += 20) {
847                         if (*ep->reg_udccs & UDCCS_BI_SST)
848                                 break;
849                         udelay(20);
850                 }
851         }
852         local_irq_restore(flags);
853
854         DBG(DBG_VERBOSE, "%s halt\n", _ep->name);
855         return 0;
856 }
857
858 static int pxa2xx_ep_fifo_status(struct usb_ep *_ep)
859 {
860         struct pxa2xx_ep        *ep;
861
862         ep = container_of(_ep, struct pxa2xx_ep, ep);
863         if (!_ep) {
864                 DMSG("%s, bad ep\n", __FUNCTION__);
865                 return -ENODEV;
866         }
867         /* pxa can't report unclaimed bytes from IN fifos */
868         if ((ep->bEndpointAddress & USB_DIR_IN) != 0)
869                 return -EOPNOTSUPP;
870         if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN
871                         || (*ep->reg_udccs & UDCCS_BO_RFS) == 0)
872                 return 0;
873         else
874                 return (*ep->reg_ubcr & 0xfff) + 1;
875 }
876
877 static void pxa2xx_ep_fifo_flush(struct usb_ep *_ep)
878 {
879         struct pxa2xx_ep        *ep;
880
881         ep = container_of(_ep, struct pxa2xx_ep, ep);
882         if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) {
883                 DMSG("%s, bad ep\n", __FUNCTION__);
884                 return;
885         }
886
887         /* toggle and halt bits stay unchanged */
888
889         /* for OUT, just read and discard the FIFO contents. */
890         if ((ep->bEndpointAddress & USB_DIR_IN) == 0) {
891                 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0)
892                         (void) *ep->reg_uddr;
893                 return;
894         }
895
896         /* most IN status is the same, but ISO can't stall */
897         *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR
898                 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
899                         ? 0 : UDCCS_BI_SST;
900 }
901
902
903 static struct usb_ep_ops pxa2xx_ep_ops = {
904         .enable         = pxa2xx_ep_enable,
905         .disable        = pxa2xx_ep_disable,
906
907         .alloc_request  = pxa2xx_ep_alloc_request,
908         .free_request   = pxa2xx_ep_free_request,
909
910         .queue          = pxa2xx_ep_queue,
911         .dequeue        = pxa2xx_ep_dequeue,
912
913         .set_halt       = pxa2xx_ep_set_halt,
914         .fifo_status    = pxa2xx_ep_fifo_status,
915         .fifo_flush     = pxa2xx_ep_fifo_flush,
916 };
917
918
919 /* ---------------------------------------------------------------------------
920  *      device-scoped parts of the api to the usb controller hardware
921  * ---------------------------------------------------------------------------
922  */
923
924 static int pxa2xx_udc_get_frame(struct usb_gadget *_gadget)
925 {
926         return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff);
927 }
928
929 static int pxa2xx_udc_wakeup(struct usb_gadget *_gadget)
930 {
931         /* host may not have enabled remote wakeup */
932         if ((UDCCS0 & UDCCS0_DRWF) == 0)
933                 return -EHOSTUNREACH;
934         udc_set_mask_UDCCR(UDCCR_RSM);
935         return 0;
936 }
937
938 static void stop_activity(struct pxa2xx_udc *, struct usb_gadget_driver *);
939 static void udc_enable (struct pxa2xx_udc *);
940 static void udc_disable(struct pxa2xx_udc *);
941
942 /* We disable the UDC -- and its 48 MHz clock -- whenever it's not
943  * in active use.
944  */
945 static int pullup(struct pxa2xx_udc *udc, int is_active)
946 {
947         is_active = is_active && udc->vbus && udc->pullup;
948         DMSG("%s\n", is_active ? "active" : "inactive");
949         if (is_active)
950                 udc_enable(udc);
951         else {
952                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
953                         DMSG("disconnect %s\n", udc->driver
954                                 ? udc->driver->driver.name
955                                 : "(no driver)");
956                         stop_activity(udc, udc->driver);
957                 }
958                 udc_disable(udc);
959         }
960         return 0;
961 }
962
963 /* VBUS reporting logically comes from a transceiver */
964 static int pxa2xx_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
965 {
966         struct pxa2xx_udc       *udc;
967
968         udc = container_of(_gadget, struct pxa2xx_udc, gadget);
969         udc->vbus = is_active = (is_active != 0);
970         DMSG("vbus %s\n", is_active ? "supplied" : "inactive");
971         pullup(udc, is_active);
972         return 0;
973 }
974
975 /* drivers may have software control over D+ pullup */
976 static int pxa2xx_udc_pullup(struct usb_gadget *_gadget, int is_active)
977 {
978         struct pxa2xx_udc       *udc;
979
980         udc = container_of(_gadget, struct pxa2xx_udc, gadget);
981
982         /* not all boards support pullup control */
983         if (!udc->mach->udc_command)
984                 return -EOPNOTSUPP;
985
986         is_active = (is_active != 0);
987         udc->pullup = is_active;
988         pullup(udc, is_active);
989         return 0;
990 }
991
992 static const struct usb_gadget_ops pxa2xx_udc_ops = {
993         .get_frame      = pxa2xx_udc_get_frame,
994         .wakeup         = pxa2xx_udc_wakeup,
995         .vbus_session   = pxa2xx_udc_vbus_session,
996         .pullup         = pxa2xx_udc_pullup,
997
998         // .vbus_draw ... boards may consume current from VBUS, up to
999         // 100-500mA based on config.  the 500uA suspend ceiling means
1000         // that exclusively vbus-powered PXA designs violate USB specs.
1001 };
1002
1003 /*-------------------------------------------------------------------------*/
1004
1005 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
1006
1007 static const char proc_node_name [] = "driver/udc";
1008
1009 static int
1010 udc_proc_read(char *page, char **start, off_t off, int count,
1011                 int *eof, void *_dev)
1012 {
1013         char                    *buf = page;
1014         struct pxa2xx_udc       *dev = _dev;
1015         char                    *next = buf;
1016         unsigned                size = count;
1017         unsigned long           flags;
1018         int                     i, t;
1019         u32                     tmp;
1020
1021         if (off != 0)
1022                 return 0;
1023
1024         local_irq_save(flags);
1025
1026         /* basic device status */
1027         t = scnprintf(next, size, DRIVER_DESC "\n"
1028                 "%s version: %s\nGadget driver: %s\nHost %s\n\n",
1029                 driver_name, DRIVER_VERSION SIZE_STR "(pio)",
1030                 dev->driver ? dev->driver->driver.name : "(none)",
1031                 is_vbus_present() ? "full speed" : "disconnected");
1032         size -= t;
1033         next += t;
1034
1035         /* registers for device and ep0 */
1036         t = scnprintf(next, size,
1037                 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n",
1038                 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL);
1039         size -= t;
1040         next += t;
1041
1042         tmp = UDCCR;
1043         t = scnprintf(next, size,
1044                 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp,
1045                 (tmp & UDCCR_REM) ? " rem" : "",
1046                 (tmp & UDCCR_RSTIR) ? " rstir" : "",
1047                 (tmp & UDCCR_SRM) ? " srm" : "",
1048                 (tmp & UDCCR_SUSIR) ? " susir" : "",
1049                 (tmp & UDCCR_RESIR) ? " resir" : "",
1050                 (tmp & UDCCR_RSM) ? " rsm" : "",
1051                 (tmp & UDCCR_UDA) ? " uda" : "",
1052                 (tmp & UDCCR_UDE) ? " ude" : "");
1053         size -= t;
1054         next += t;
1055
1056         tmp = UDCCS0;
1057         t = scnprintf(next, size,
1058                 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp,
1059                 (tmp & UDCCS0_SA) ? " sa" : "",
1060                 (tmp & UDCCS0_RNE) ? " rne" : "",
1061                 (tmp & UDCCS0_FST) ? " fst" : "",
1062                 (tmp & UDCCS0_SST) ? " sst" : "",
1063                 (tmp & UDCCS0_DRWF) ? " dwrf" : "",
1064                 (tmp & UDCCS0_FTF) ? " ftf" : "",
1065                 (tmp & UDCCS0_IPR) ? " ipr" : "",
1066                 (tmp & UDCCS0_OPR) ? " opr" : "");
1067         size -= t;
1068         next += t;
1069
1070         if (dev->has_cfr) {
1071                 tmp = UDCCFR;
1072                 t = scnprintf(next, size,
1073                         "udccfr %02X =%s%s\n", tmp,
1074                         (tmp & UDCCFR_AREN) ? " aren" : "",
1075                         (tmp & UDCCFR_ACM) ? " acm" : "");
1076                 size -= t;
1077                 next += t;
1078         }
1079
1080         if (!is_vbus_present() || !dev->driver)
1081                 goto done;
1082
1083         t = scnprintf(next, size, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n",
1084                 dev->stats.write.bytes, dev->stats.write.ops,
1085                 dev->stats.read.bytes, dev->stats.read.ops,
1086                 dev->stats.irqs);
1087         size -= t;
1088         next += t;
1089
1090         /* dump endpoint queues */
1091         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1092                 struct pxa2xx_ep        *ep = &dev->ep [i];
1093                 struct pxa2xx_request   *req;
1094
1095                 if (i != 0) {
1096                         const struct usb_endpoint_descriptor    *d;
1097
1098                         d = ep->desc;
1099                         if (!d)
1100                                 continue;
1101                         tmp = *dev->ep [i].reg_udccs;
1102                         t = scnprintf(next, size,
1103                                 "%s max %d %s udccs %02x irqs %lu\n",
1104                                 ep->ep.name, le16_to_cpu (d->wMaxPacketSize),
1105                                 "pio", tmp, ep->pio_irqs);
1106                         /* TODO translate all five groups of udccs bits! */
1107
1108                 } else /* ep0 should only have one transfer queued */
1109                         t = scnprintf(next, size, "ep0 max 16 pio irqs %lu\n",
1110                                 ep->pio_irqs);
1111                 if (t <= 0 || t > size)
1112                         goto done;
1113                 size -= t;
1114                 next += t;
1115
1116                 if (list_empty(&ep->queue)) {
1117                         t = scnprintf(next, size, "\t(nothing queued)\n");
1118                         if (t <= 0 || t > size)
1119                                 goto done;
1120                         size -= t;
1121                         next += t;
1122                         continue;
1123                 }
1124                 list_for_each_entry(req, &ep->queue, queue) {
1125                         t = scnprintf(next, size,
1126                                         "\treq %p len %d/%d buf %p\n",
1127                                         &req->req, req->req.actual,
1128                                         req->req.length, req->req.buf);
1129                         if (t <= 0 || t > size)
1130                                 goto done;
1131                         size -= t;
1132                         next += t;
1133                 }
1134         }
1135
1136 done:
1137         local_irq_restore(flags);
1138         *eof = 1;
1139         return count - size;
1140 }
1141
1142 #define create_proc_files() \
1143         create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
1144 #define remove_proc_files() \
1145         remove_proc_entry(proc_node_name, NULL)
1146
1147 #else   /* !CONFIG_USB_GADGET_DEBUG_FILES */
1148
1149 #define create_proc_files() do {} while (0)
1150 #define remove_proc_files() do {} while (0)
1151
1152 #endif  /* CONFIG_USB_GADGET_DEBUG_FILES */
1153
1154 /*-------------------------------------------------------------------------*/
1155
1156 /*
1157  *      udc_disable - disable USB device controller
1158  */
1159 static void udc_disable(struct pxa2xx_udc *dev)
1160 {
1161         /* block all irqs */
1162         udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM);
1163         UICR0 = UICR1 = 0xff;
1164         UFNRH = UFNRH_SIM;
1165
1166         /* if hardware supports it, disconnect from usb */
1167         pullup_off();
1168
1169         udc_clear_mask_UDCCR(UDCCR_UDE);
1170
1171 #ifdef  CONFIG_ARCH_PXA
1172         /* Disable clock for USB device */
1173         pxa_set_cken(CKEN_USB, 0);
1174 #endif
1175
1176         ep0_idle (dev);
1177         dev->gadget.speed = USB_SPEED_UNKNOWN;
1178 }
1179
1180
1181 /*
1182  *      udc_reinit - initialize software state
1183  */
1184 static void udc_reinit(struct pxa2xx_udc *dev)
1185 {
1186         u32     i;
1187
1188         /* device/ep0 records init */
1189         INIT_LIST_HEAD (&dev->gadget.ep_list);
1190         INIT_LIST_HEAD (&dev->gadget.ep0->ep_list);
1191         dev->ep0state = EP0_IDLE;
1192
1193         /* basic endpoint records init */
1194         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1195                 struct pxa2xx_ep *ep = &dev->ep[i];
1196
1197                 if (i != 0)
1198                         list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list);
1199
1200                 ep->desc = NULL;
1201                 ep->stopped = 0;
1202                 INIT_LIST_HEAD (&ep->queue);
1203                 ep->pio_irqs = 0;
1204         }
1205
1206         /* the rest was statically initialized, and is read-only */
1207 }
1208
1209 /* until it's enabled, this UDC should be completely invisible
1210  * to any USB host.
1211  */
1212 static void udc_enable (struct pxa2xx_udc *dev)
1213 {
1214         udc_clear_mask_UDCCR(UDCCR_UDE);
1215
1216 #ifdef  CONFIG_ARCH_PXA
1217         /* Enable clock for USB device */
1218         pxa_set_cken(CKEN_USB, 1);
1219         udelay(5);
1220 #endif
1221
1222         /* try to clear these bits before we enable the udc */
1223         udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR);
1224
1225         ep0_idle(dev);
1226         dev->gadget.speed = USB_SPEED_UNKNOWN;
1227         dev->stats.irqs = 0;
1228
1229         /*
1230          * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual:
1231          * - enable UDC
1232          * - if RESET is already in progress, ack interrupt
1233          * - unmask reset interrupt
1234          */
1235         udc_set_mask_UDCCR(UDCCR_UDE);
1236         if (!(UDCCR & UDCCR_UDA))
1237                 udc_ack_int_UDCCR(UDCCR_RSTIR);
1238
1239         if (dev->has_cfr /* UDC_RES2 is defined */) {
1240                 /* pxa255 (a0+) can avoid a set_config race that could
1241                  * prevent gadget drivers from configuring correctly
1242                  */
1243                 UDCCFR = UDCCFR_ACM | UDCCFR_MB1;
1244         } else {
1245                 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1)
1246                  * which could result in missing packets and interrupts.
1247                  * supposedly one bit per endpoint, controlling whether it
1248                  * double buffers or not; ACM/AREN bits fit into the holes.
1249                  * zero bits (like USIR0_IRx) disable double buffering.
1250                  */
1251                 UDC_RES1 = 0x00;
1252                 UDC_RES2 = 0x00;
1253         }
1254
1255 #ifdef  DISABLE_TEST_MODE
1256         /* "test mode" seems to have become the default in later chip
1257          * revs, preventing double buffering (and invalidating docs).
1258          * this EXPERIMENT enables it for bulk endpoints by tweaking
1259          * undefined/reserved register bits (that other drivers clear).
1260          * Belcarra code comments noted this usage.
1261          */
1262         if (fifo_mode & 1) {    /* IN endpoints */
1263                 UDC_RES1 |= USIR0_IR1|USIR0_IR6;
1264                 UDC_RES2 |= USIR1_IR11;
1265         }
1266         if (fifo_mode & 2) {    /* OUT endpoints */
1267                 UDC_RES1 |= USIR0_IR2|USIR0_IR7;
1268                 UDC_RES2 |= USIR1_IR12;
1269         }
1270 #endif
1271
1272         /* enable suspend/resume and reset irqs */
1273         udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM);
1274
1275         /* enable ep0 irqs */
1276         UICR0 &= ~UICR0_IM0;
1277
1278         /* if hardware supports it, pullup D+ and wait for reset */
1279         pullup_on();
1280 }
1281
1282
1283 /* when a driver is successfully registered, it will receive
1284  * control requests including set_configuration(), which enables
1285  * non-control requests.  then usb traffic follows until a
1286  * disconnect is reported.  then a host may connect again, or
1287  * the driver might get unbound.
1288  */
1289 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1290 {
1291         struct pxa2xx_udc       *dev = the_controller;
1292         int                     retval;
1293
1294         if (!driver
1295                         || driver->speed < USB_SPEED_FULL
1296                         || !driver->bind
1297                         || !driver->disconnect
1298                         || !driver->setup)
1299                 return -EINVAL;
1300         if (!dev)
1301                 return -ENODEV;
1302         if (dev->driver)
1303                 return -EBUSY;
1304
1305         /* first hook up the driver ... */
1306         dev->driver = driver;
1307         dev->gadget.dev.driver = &driver->driver;
1308         dev->pullup = 1;
1309
1310         retval = device_add (&dev->gadget.dev);
1311         if (retval) {
1312 fail:
1313                 dev->driver = NULL;
1314                 dev->gadget.dev.driver = NULL;
1315                 return retval;
1316         }
1317         retval = driver->bind(&dev->gadget);
1318         if (retval) {
1319                 DMSG("bind to driver %s --> error %d\n",
1320                                 driver->driver.name, retval);
1321                 device_del (&dev->gadget.dev);
1322                 goto fail;
1323         }
1324
1325         /* ... then enable host detection and ep0; and we're ready
1326          * for set_configuration as well as eventual disconnect.
1327          */
1328         DMSG("registered gadget driver '%s'\n", driver->driver.name);
1329         pullup(dev, 1);
1330         dump_state(dev);
1331         return 0;
1332 }
1333 EXPORT_SYMBOL(usb_gadget_register_driver);
1334
1335 static void
1336 stop_activity(struct pxa2xx_udc *dev, struct usb_gadget_driver *driver)
1337 {
1338         int i;
1339
1340         /* don't disconnect drivers more than once */
1341         if (dev->gadget.speed == USB_SPEED_UNKNOWN)
1342                 driver = NULL;
1343         dev->gadget.speed = USB_SPEED_UNKNOWN;
1344
1345         /* prevent new request submissions, kill any outstanding requests  */
1346         for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) {
1347                 struct pxa2xx_ep *ep = &dev->ep[i];
1348
1349                 ep->stopped = 1;
1350                 nuke(ep, -ESHUTDOWN);
1351         }
1352         del_timer_sync(&dev->timer);
1353
1354         /* report disconnect; the driver is already quiesced */
1355         if (driver)
1356                 driver->disconnect(&dev->gadget);
1357
1358         /* re-init driver-visible data structures */
1359         udc_reinit(dev);
1360 }
1361
1362 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1363 {
1364         struct pxa2xx_udc       *dev = the_controller;
1365
1366         if (!dev)
1367                 return -ENODEV;
1368         if (!driver || driver != dev->driver || !driver->unbind)
1369                 return -EINVAL;
1370
1371         local_irq_disable();
1372         pullup(dev, 0);
1373         stop_activity(dev, driver);
1374         local_irq_enable();
1375
1376         driver->unbind(&dev->gadget);
1377         dev->driver = NULL;
1378
1379         device_del (&dev->gadget.dev);
1380
1381         DMSG("unregistered gadget driver '%s'\n", driver->driver.name);
1382         dump_state(dev);
1383         return 0;
1384 }
1385 EXPORT_SYMBOL(usb_gadget_unregister_driver);
1386
1387
1388 /*-------------------------------------------------------------------------*/
1389
1390 #ifdef CONFIG_ARCH_LUBBOCK
1391
1392 /* Lubbock has separate connect and disconnect irqs.  More typical designs
1393  * use one GPIO as the VBUS IRQ, and another to control the D+ pullup.
1394  */
1395
1396 static irqreturn_t
1397 lubbock_vbus_irq(int irq, void *_dev)
1398 {
1399         struct pxa2xx_udc       *dev = _dev;
1400         int                     vbus;
1401
1402         dev->stats.irqs++;
1403         switch (irq) {
1404         case LUBBOCK_USB_IRQ:
1405                 vbus = 1;
1406                 disable_irq(LUBBOCK_USB_IRQ);
1407                 enable_irq(LUBBOCK_USB_DISC_IRQ);
1408                 break;
1409         case LUBBOCK_USB_DISC_IRQ:
1410                 vbus = 0;
1411                 disable_irq(LUBBOCK_USB_DISC_IRQ);
1412                 enable_irq(LUBBOCK_USB_IRQ);
1413                 break;
1414         default:
1415                 return IRQ_NONE;
1416         }
1417
1418         pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1419         return IRQ_HANDLED;
1420 }
1421
1422 #endif
1423
1424 static irqreturn_t udc_vbus_irq(int irq, void *_dev)
1425 {
1426         struct pxa2xx_udc       *dev = _dev;
1427         int                     vbus = gpio_get_value(dev->mach->gpio_vbus);
1428
1429         pxa2xx_udc_vbus_session(&dev->gadget, vbus);
1430         return IRQ_HANDLED;
1431 }
1432
1433
1434 /*-------------------------------------------------------------------------*/
1435
1436 static inline void clear_ep_state (struct pxa2xx_udc *dev)
1437 {
1438         unsigned i;
1439
1440         /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint
1441          * fifos, and pending transactions mustn't be continued in any case.
1442          */
1443         for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++)
1444                 nuke(&dev->ep[i], -ECONNABORTED);
1445 }
1446
1447 static void udc_watchdog(unsigned long _dev)
1448 {
1449         struct pxa2xx_udc       *dev = (void *)_dev;
1450
1451         local_irq_disable();
1452         if (dev->ep0state == EP0_STALL
1453                         && (UDCCS0 & UDCCS0_FST) == 0
1454                         && (UDCCS0 & UDCCS0_SST) == 0) {
1455                 UDCCS0 = UDCCS0_FST|UDCCS0_FTF;
1456                 DBG(DBG_VERBOSE, "ep0 re-stall\n");
1457                 start_watchdog(dev);
1458         }
1459         local_irq_enable();
1460 }
1461
1462 static void handle_ep0 (struct pxa2xx_udc *dev)
1463 {
1464         u32                     udccs0 = UDCCS0;
1465         struct pxa2xx_ep        *ep = &dev->ep [0];
1466         struct pxa2xx_request   *req;
1467         union {
1468                 struct usb_ctrlrequest  r;
1469                 u8                      raw [8];
1470                 u32                     word [2];
1471         } u;
1472
1473         if (list_empty(&ep->queue))
1474                 req = NULL;
1475         else
1476                 req = list_entry(ep->queue.next, struct pxa2xx_request, queue);
1477
1478         /* clear stall status */
1479         if (udccs0 & UDCCS0_SST) {
1480                 nuke(ep, -EPIPE);
1481                 UDCCS0 = UDCCS0_SST;
1482                 del_timer(&dev->timer);
1483                 ep0_idle(dev);
1484         }
1485
1486         /* previous request unfinished?  non-error iff back-to-back ... */
1487         if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) {
1488                 nuke(ep, 0);
1489                 del_timer(&dev->timer);
1490                 ep0_idle(dev);
1491         }
1492
1493         switch (dev->ep0state) {
1494         case EP0_IDLE:
1495                 /* late-breaking status? */
1496                 udccs0 = UDCCS0;
1497
1498                 /* start control request? */
1499                 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1500                                 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) {
1501                         int i;
1502
1503                         nuke (ep, -EPROTO);
1504
1505                         /* read SETUP packet */
1506                         for (i = 0; i < 8; i++) {
1507                                 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) {
1508 bad_setup:
1509                                         DMSG("SETUP %d!\n", i);
1510                                         goto stall;
1511                                 }
1512                                 u.raw [i] = (u8) UDDR0;
1513                         }
1514                         if (unlikely((UDCCS0 & UDCCS0_RNE) != 0))
1515                                 goto bad_setup;
1516
1517 got_setup:
1518                         DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n",
1519                                 u.r.bRequestType, u.r.bRequest,
1520                                 le16_to_cpu(u.r.wValue),
1521                                 le16_to_cpu(u.r.wIndex),
1522                                 le16_to_cpu(u.r.wLength));
1523
1524                         /* cope with automagic for some standard requests. */
1525                         dev->req_std = (u.r.bRequestType & USB_TYPE_MASK)
1526                                                 == USB_TYPE_STANDARD;
1527                         dev->req_config = 0;
1528                         dev->req_pending = 1;
1529                         switch (u.r.bRequest) {
1530                         /* hardware restricts gadget drivers here! */
1531                         case USB_REQ_SET_CONFIGURATION:
1532                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1533                                         /* reflect hardware's automagic
1534                                          * up to the gadget driver.
1535                                          */
1536 config_change:
1537                                         dev->req_config = 1;
1538                                         clear_ep_state(dev);
1539                                         /* if !has_cfr, there's no synch
1540                                          * else use AREN (later) not SA|OPR
1541                                          * USIR0_IR0 acts edge sensitive
1542                                          */
1543                                 }
1544                                 break;
1545                         /* ... and here, even more ... */
1546                         case USB_REQ_SET_INTERFACE:
1547                                 if (u.r.bRequestType == USB_RECIP_INTERFACE) {
1548                                         /* udc hardware is broken by design:
1549                                          *  - altsetting may only be zero;
1550                                          *  - hw resets all interfaces' eps;
1551                                          *  - ep reset doesn't include halt(?).
1552                                          */
1553                                         DMSG("broken set_interface (%d/%d)\n",
1554                                                 le16_to_cpu(u.r.wIndex),
1555                                                 le16_to_cpu(u.r.wValue));
1556                                         goto config_change;
1557                                 }
1558                                 break;
1559                         /* hardware was supposed to hide this */
1560                         case USB_REQ_SET_ADDRESS:
1561                                 if (u.r.bRequestType == USB_RECIP_DEVICE) {
1562                                         ep0start(dev, 0, "address");
1563                                         return;
1564                                 }
1565                                 break;
1566                         }
1567
1568                         if (u.r.bRequestType & USB_DIR_IN)
1569                                 dev->ep0state = EP0_IN_DATA_PHASE;
1570                         else
1571                                 dev->ep0state = EP0_OUT_DATA_PHASE;
1572
1573                         i = dev->driver->setup(&dev->gadget, &u.r);
1574                         if (i < 0) {
1575                                 /* hardware automagic preventing STALL... */
1576                                 if (dev->req_config) {
1577                                         /* hardware sometimes neglects to tell
1578                                          * tell us about config change events,
1579                                          * so later ones may fail...
1580                                          */
1581                                         WARN("config change %02x fail %d?\n",
1582                                                 u.r.bRequest, i);
1583                                         return;
1584                                         /* TODO experiment:  if has_cfr,
1585                                          * hardware didn't ACK; maybe we
1586                                          * could actually STALL!
1587                                          */
1588                                 }
1589                                 DBG(DBG_VERBOSE, "protocol STALL, "
1590                                         "%02x err %d\n", UDCCS0, i);
1591 stall:
1592                                 /* the watchdog timer helps deal with cases
1593                                  * where udc seems to clear FST wrongly, and
1594                                  * then NAKs instead of STALLing.
1595                                  */
1596                                 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall");
1597                                 start_watchdog(dev);
1598                                 dev->ep0state = EP0_STALL;
1599
1600                         /* deferred i/o == no response yet */
1601                         } else if (dev->req_pending) {
1602                                 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1603                                                 || dev->req_std || u.r.wLength))
1604                                         ep0start(dev, 0, "defer");
1605                                 else
1606                                         ep0start(dev, UDCCS0_IPR, "defer/IPR");
1607                         }
1608
1609                         /* expect at least one data or status stage irq */
1610                         return;
1611
1612                 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1613                                 == (UDCCS0_OPR|UDCCS0_SA))) {
1614                         unsigned i;
1615
1616                         /* pxa210/250 erratum 131 for B0/B1 says RNE lies.
1617                          * still observed on a pxa255 a0.
1618                          */
1619                         DBG(DBG_VERBOSE, "e131\n");
1620                         nuke(ep, -EPROTO);
1621
1622                         /* read SETUP data, but don't trust it too much */
1623                         for (i = 0; i < 8; i++)
1624                                 u.raw [i] = (u8) UDDR0;
1625                         if ((u.r.bRequestType & USB_RECIP_MASK)
1626                                         > USB_RECIP_OTHER)
1627                                 goto stall;
1628                         if (u.word [0] == 0 && u.word [1] == 0)
1629                                 goto stall;
1630                         goto got_setup;
1631                 } else {
1632                         /* some random early IRQ:
1633                          * - we acked FST
1634                          * - IPR cleared
1635                          * - OPR got set, without SA (likely status stage)
1636                          */
1637                         UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR);
1638                 }
1639                 break;
1640         case EP0_IN_DATA_PHASE:                 /* GET_DESCRIPTOR etc */
1641                 if (udccs0 & UDCCS0_OPR) {
1642                         UDCCS0 = UDCCS0_OPR|UDCCS0_FTF;
1643                         DBG(DBG_VERBOSE, "ep0in premature status\n");
1644                         if (req)
1645                                 done(ep, req, 0);
1646                         ep0_idle(dev);
1647                 } else /* irq was IPR clearing */ {
1648                         if (req) {
1649                                 /* this IN packet might finish the request */
1650                                 (void) write_ep0_fifo(ep, req);
1651                         } /* else IN token before response was written */
1652                 }
1653                 break;
1654         case EP0_OUT_DATA_PHASE:                /* SET_DESCRIPTOR etc */
1655                 if (udccs0 & UDCCS0_OPR) {
1656                         if (req) {
1657                                 /* this OUT packet might finish the request */
1658                                 if (read_ep0_fifo(ep, req))
1659                                         done(ep, req, 0);
1660                                 /* else more OUT packets expected */
1661                         } /* else OUT token before read was issued */
1662                 } else /* irq was IPR clearing */ {
1663                         DBG(DBG_VERBOSE, "ep0out premature status\n");
1664                         if (req)
1665                                 done(ep, req, 0);
1666                         ep0_idle(dev);
1667                 }
1668                 break;
1669         case EP0_END_XFER:
1670                 if (req)
1671                         done(ep, req, 0);
1672                 /* ack control-IN status (maybe in-zlp was skipped)
1673                  * also appears after some config change events.
1674                  */
1675                 if (udccs0 & UDCCS0_OPR)
1676                         UDCCS0 = UDCCS0_OPR;
1677                 ep0_idle(dev);
1678                 break;
1679         case EP0_STALL:
1680                 UDCCS0 = UDCCS0_FST;
1681                 break;
1682         }
1683         USIR0 = USIR0_IR0;
1684 }
1685
1686 static void handle_ep(struct pxa2xx_ep *ep)
1687 {
1688         struct pxa2xx_request   *req;
1689         int                     is_in = ep->bEndpointAddress & USB_DIR_IN;
1690         int                     completed;
1691         u32                     udccs, tmp;
1692
1693         do {
1694                 completed = 0;
1695                 if (likely (!list_empty(&ep->queue)))
1696                         req = list_entry(ep->queue.next,
1697                                         struct pxa2xx_request, queue);
1698                 else
1699                         req = NULL;
1700
1701                 // TODO check FST handling
1702
1703                 udccs = *ep->reg_udccs;
1704                 if (unlikely(is_in)) {  /* irq from TPC, SST, or (ISO) TUR */
1705                         tmp = UDCCS_BI_TUR;
1706                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1707                                 tmp |= UDCCS_BI_SST;
1708                         tmp &= udccs;
1709                         if (likely (tmp))
1710                                 *ep->reg_udccs = tmp;
1711                         if (req && likely ((udccs & UDCCS_BI_TFS) != 0))
1712                                 completed = write_fifo(ep, req);
1713
1714                 } else {        /* irq from RPC (or for ISO, ROF) */
1715                         if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1716                                 tmp = UDCCS_BO_SST | UDCCS_BO_DME;
1717                         else
1718                                 tmp = UDCCS_IO_ROF | UDCCS_IO_DME;
1719                         tmp &= udccs;
1720                         if (likely(tmp))
1721                                 *ep->reg_udccs = tmp;
1722
1723                         /* fifos can hold packets, ready for reading... */
1724                         if (likely(req)) {
1725                                 completed = read_fifo(ep, req);
1726                         } else
1727                                 pio_irq_disable (ep->bEndpointAddress);
1728                 }
1729                 ep->pio_irqs++;
1730         } while (completed);
1731 }
1732
1733 /*
1734  *      pxa2xx_udc_irq - interrupt handler
1735  *
1736  * avoid delays in ep0 processing. the control handshaking isn't always
1737  * under software control (pxa250c0 and the pxa255 are better), and delays
1738  * could cause usb protocol errors.
1739  */
1740 static irqreturn_t
1741 pxa2xx_udc_irq(int irq, void *_dev)
1742 {
1743         struct pxa2xx_udc       *dev = _dev;
1744         int                     handled;
1745
1746         dev->stats.irqs++;
1747         do {
1748                 u32             udccr = UDCCR;
1749
1750                 handled = 0;
1751
1752                 /* SUSpend Interrupt Request */
1753                 if (unlikely(udccr & UDCCR_SUSIR)) {
1754                         udc_ack_int_UDCCR(UDCCR_SUSIR);
1755                         handled = 1;
1756                         DBG(DBG_VERBOSE, "USB suspend%s\n", is_vbus_present()
1757                                 ? "" : "+disconnect");
1758
1759                         if (!is_vbus_present())
1760                                 stop_activity(dev, dev->driver);
1761                         else if (dev->gadget.speed != USB_SPEED_UNKNOWN
1762                                         && dev->driver
1763                                         && dev->driver->suspend)
1764                                 dev->driver->suspend(&dev->gadget);
1765                         ep0_idle (dev);
1766                 }
1767
1768                 /* RESume Interrupt Request */
1769                 if (unlikely(udccr & UDCCR_RESIR)) {
1770                         udc_ack_int_UDCCR(UDCCR_RESIR);
1771                         handled = 1;
1772                         DBG(DBG_VERBOSE, "USB resume\n");
1773
1774                         if (dev->gadget.speed != USB_SPEED_UNKNOWN
1775                                         && dev->driver
1776                                         && dev->driver->resume
1777                                         && is_vbus_present())
1778                                 dev->driver->resume(&dev->gadget);
1779                 }
1780
1781                 /* ReSeT Interrupt Request - USB reset */
1782                 if (unlikely(udccr & UDCCR_RSTIR)) {
1783                         udc_ack_int_UDCCR(UDCCR_RSTIR);
1784                         handled = 1;
1785
1786                         if ((UDCCR & UDCCR_UDA) == 0) {
1787                                 DBG(DBG_VERBOSE, "USB reset start\n");
1788
1789                                 /* reset driver and endpoints,
1790                                  * in case that's not yet done
1791                                  */
1792                                 stop_activity (dev, dev->driver);
1793
1794                         } else {
1795                                 DBG(DBG_VERBOSE, "USB reset end\n");
1796                                 dev->gadget.speed = USB_SPEED_FULL;
1797                                 memset(&dev->stats, 0, sizeof dev->stats);
1798                                 /* driver and endpoints are still reset */
1799                         }
1800
1801                 } else {
1802                         u32     usir0 = USIR0 & ~UICR0;
1803                         u32     usir1 = USIR1 & ~UICR1;
1804                         int     i;
1805
1806                         if (unlikely (!usir0 && !usir1))
1807                                 continue;
1808
1809                         DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0);
1810
1811                         /* control traffic */
1812                         if (usir0 & USIR0_IR0) {
1813                                 dev->ep[0].pio_irqs++;
1814                                 handle_ep0(dev);
1815                                 handled = 1;
1816                         }
1817
1818                         /* endpoint data transfers */
1819                         for (i = 0; i < 8; i++) {
1820                                 u32     tmp = 1 << i;
1821
1822                                 if (i && (usir0 & tmp)) {
1823                                         handle_ep(&dev->ep[i]);
1824                                         USIR0 |= tmp;
1825                                         handled = 1;
1826                                 }
1827                                 if (usir1 & tmp) {
1828                                         handle_ep(&dev->ep[i+8]);
1829                                         USIR1 |= tmp;
1830                                         handled = 1;
1831                                 }
1832                         }
1833                 }
1834
1835                 /* we could also ask for 1 msec SOF (SIR) interrupts */
1836
1837         } while (handled);
1838         return IRQ_HANDLED;
1839 }
1840
1841 /*-------------------------------------------------------------------------*/
1842
1843 static void nop_release (struct device *dev)
1844 {
1845         DMSG("%s %s\n", __FUNCTION__, dev->bus_id);
1846 }
1847
1848 /* this uses load-time allocation and initialization (instead of
1849  * doing it at run-time) to save code, eliminate fault paths, and
1850  * be more obviously correct.
1851  */
1852 static struct pxa2xx_udc memory = {
1853         .gadget = {
1854                 .ops            = &pxa2xx_udc_ops,
1855                 .ep0            = &memory.ep[0].ep,
1856                 .name           = driver_name,
1857                 .dev = {
1858                         .bus_id         = "gadget",
1859                         .release        = nop_release,
1860                 },
1861         },
1862
1863         /* control endpoint */
1864         .ep[0] = {
1865                 .ep = {
1866                         .name           = ep0name,
1867                         .ops            = &pxa2xx_ep_ops,
1868                         .maxpacket      = EP0_FIFO_SIZE,
1869                 },
1870                 .dev            = &memory,
1871                 .reg_udccs      = &UDCCS0,
1872                 .reg_uddr       = &UDDR0,
1873         },
1874
1875         /* first group of endpoints */
1876         .ep[1] = {
1877                 .ep = {
1878                         .name           = "ep1in-bulk",
1879                         .ops            = &pxa2xx_ep_ops,
1880                         .maxpacket      = BULK_FIFO_SIZE,
1881                 },
1882                 .dev            = &memory,
1883                 .fifo_size      = BULK_FIFO_SIZE,
1884                 .bEndpointAddress = USB_DIR_IN | 1,
1885                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1886                 .reg_udccs      = &UDCCS1,
1887                 .reg_uddr       = &UDDR1,
1888         },
1889         .ep[2] = {
1890                 .ep = {
1891                         .name           = "ep2out-bulk",
1892                         .ops            = &pxa2xx_ep_ops,
1893                         .maxpacket      = BULK_FIFO_SIZE,
1894                 },
1895                 .dev            = &memory,
1896                 .fifo_size      = BULK_FIFO_SIZE,
1897                 .bEndpointAddress = 2,
1898                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1899                 .reg_udccs      = &UDCCS2,
1900                 .reg_ubcr       = &UBCR2,
1901                 .reg_uddr       = &UDDR2,
1902         },
1903 #ifndef CONFIG_USB_PXA2XX_SMALL
1904         .ep[3] = {
1905                 .ep = {
1906                         .name           = "ep3in-iso",
1907                         .ops            = &pxa2xx_ep_ops,
1908                         .maxpacket      = ISO_FIFO_SIZE,
1909                 },
1910                 .dev            = &memory,
1911                 .fifo_size      = ISO_FIFO_SIZE,
1912                 .bEndpointAddress = USB_DIR_IN | 3,
1913                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1914                 .reg_udccs      = &UDCCS3,
1915                 .reg_uddr       = &UDDR3,
1916         },
1917         .ep[4] = {
1918                 .ep = {
1919                         .name           = "ep4out-iso",
1920                         .ops            = &pxa2xx_ep_ops,
1921                         .maxpacket      = ISO_FIFO_SIZE,
1922                 },
1923                 .dev            = &memory,
1924                 .fifo_size      = ISO_FIFO_SIZE,
1925                 .bEndpointAddress = 4,
1926                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1927                 .reg_udccs      = &UDCCS4,
1928                 .reg_ubcr       = &UBCR4,
1929                 .reg_uddr       = &UDDR4,
1930         },
1931         .ep[5] = {
1932                 .ep = {
1933                         .name           = "ep5in-int",
1934                         .ops            = &pxa2xx_ep_ops,
1935                         .maxpacket      = INT_FIFO_SIZE,
1936                 },
1937                 .dev            = &memory,
1938                 .fifo_size      = INT_FIFO_SIZE,
1939                 .bEndpointAddress = USB_DIR_IN | 5,
1940                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
1941                 .reg_udccs      = &UDCCS5,
1942                 .reg_uddr       = &UDDR5,
1943         },
1944
1945         /* second group of endpoints */
1946         .ep[6] = {
1947                 .ep = {
1948                         .name           = "ep6in-bulk",
1949                         .ops            = &pxa2xx_ep_ops,
1950                         .maxpacket      = BULK_FIFO_SIZE,
1951                 },
1952                 .dev            = &memory,
1953                 .fifo_size      = BULK_FIFO_SIZE,
1954                 .bEndpointAddress = USB_DIR_IN | 6,
1955                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1956                 .reg_udccs      = &UDCCS6,
1957                 .reg_uddr       = &UDDR6,
1958         },
1959         .ep[7] = {
1960                 .ep = {
1961                         .name           = "ep7out-bulk",
1962                         .ops            = &pxa2xx_ep_ops,
1963                         .maxpacket      = BULK_FIFO_SIZE,
1964                 },
1965                 .dev            = &memory,
1966                 .fifo_size      = BULK_FIFO_SIZE,
1967                 .bEndpointAddress = 7,
1968                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
1969                 .reg_udccs      = &UDCCS7,
1970                 .reg_ubcr       = &UBCR7,
1971                 .reg_uddr       = &UDDR7,
1972         },
1973         .ep[8] = {
1974                 .ep = {
1975                         .name           = "ep8in-iso",
1976                         .ops            = &pxa2xx_ep_ops,
1977                         .maxpacket      = ISO_FIFO_SIZE,
1978                 },
1979                 .dev            = &memory,
1980                 .fifo_size      = ISO_FIFO_SIZE,
1981                 .bEndpointAddress = USB_DIR_IN | 8,
1982                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1983                 .reg_udccs      = &UDCCS8,
1984                 .reg_uddr       = &UDDR8,
1985         },
1986         .ep[9] = {
1987                 .ep = {
1988                         .name           = "ep9out-iso",
1989                         .ops            = &pxa2xx_ep_ops,
1990                         .maxpacket      = ISO_FIFO_SIZE,
1991                 },
1992                 .dev            = &memory,
1993                 .fifo_size      = ISO_FIFO_SIZE,
1994                 .bEndpointAddress = 9,
1995                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
1996                 .reg_udccs      = &UDCCS9,
1997                 .reg_ubcr       = &UBCR9,
1998                 .reg_uddr       = &UDDR9,
1999         },
2000         .ep[10] = {
2001                 .ep = {
2002                         .name           = "ep10in-int",
2003                         .ops            = &pxa2xx_ep_ops,
2004                         .maxpacket      = INT_FIFO_SIZE,
2005                 },
2006                 .dev            = &memory,
2007                 .fifo_size      = INT_FIFO_SIZE,
2008                 .bEndpointAddress = USB_DIR_IN | 10,
2009                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2010                 .reg_udccs      = &UDCCS10,
2011                 .reg_uddr       = &UDDR10,
2012         },
2013
2014         /* third group of endpoints */
2015         .ep[11] = {
2016                 .ep = {
2017                         .name           = "ep11in-bulk",
2018                         .ops            = &pxa2xx_ep_ops,
2019                         .maxpacket      = BULK_FIFO_SIZE,
2020                 },
2021                 .dev            = &memory,
2022                 .fifo_size      = BULK_FIFO_SIZE,
2023                 .bEndpointAddress = USB_DIR_IN | 11,
2024                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2025                 .reg_udccs      = &UDCCS11,
2026                 .reg_uddr       = &UDDR11,
2027         },
2028         .ep[12] = {
2029                 .ep = {
2030                         .name           = "ep12out-bulk",
2031                         .ops            = &pxa2xx_ep_ops,
2032                         .maxpacket      = BULK_FIFO_SIZE,
2033                 },
2034                 .dev            = &memory,
2035                 .fifo_size      = BULK_FIFO_SIZE,
2036                 .bEndpointAddress = 12,
2037                 .bmAttributes   = USB_ENDPOINT_XFER_BULK,
2038                 .reg_udccs      = &UDCCS12,
2039                 .reg_ubcr       = &UBCR12,
2040                 .reg_uddr       = &UDDR12,
2041         },
2042         .ep[13] = {
2043                 .ep = {
2044                         .name           = "ep13in-iso",
2045                         .ops            = &pxa2xx_ep_ops,
2046                         .maxpacket      = ISO_FIFO_SIZE,
2047                 },
2048                 .dev            = &memory,
2049                 .fifo_size      = ISO_FIFO_SIZE,
2050                 .bEndpointAddress = USB_DIR_IN | 13,
2051                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2052                 .reg_udccs      = &UDCCS13,
2053                 .reg_uddr       = &UDDR13,
2054         },
2055         .ep[14] = {
2056                 .ep = {
2057                         .name           = "ep14out-iso",
2058                         .ops            = &pxa2xx_ep_ops,
2059                         .maxpacket      = ISO_FIFO_SIZE,
2060                 },
2061                 .dev            = &memory,
2062                 .fifo_size      = ISO_FIFO_SIZE,
2063                 .bEndpointAddress = 14,
2064                 .bmAttributes   = USB_ENDPOINT_XFER_ISOC,
2065                 .reg_udccs      = &UDCCS14,
2066                 .reg_ubcr       = &UBCR14,
2067                 .reg_uddr       = &UDDR14,
2068         },
2069         .ep[15] = {
2070                 .ep = {
2071                         .name           = "ep15in-int",
2072                         .ops            = &pxa2xx_ep_ops,
2073                         .maxpacket      = INT_FIFO_SIZE,
2074                 },
2075                 .dev            = &memory,
2076                 .fifo_size      = INT_FIFO_SIZE,
2077                 .bEndpointAddress = USB_DIR_IN | 15,
2078                 .bmAttributes   = USB_ENDPOINT_XFER_INT,
2079                 .reg_udccs      = &UDCCS15,
2080                 .reg_uddr       = &UDDR15,
2081         },
2082 #endif /* !CONFIG_USB_PXA2XX_SMALL */
2083 };
2084
2085 #define CP15R0_VENDOR_MASK      0xffffe000
2086
2087 #if     defined(CONFIG_ARCH_PXA)
2088 #define CP15R0_XSCALE_VALUE     0x69052000      /* intel/arm/xscale */
2089
2090 #elif   defined(CONFIG_ARCH_IXP4XX)
2091 #define CP15R0_XSCALE_VALUE     0x69054000      /* intel/arm/ixp4xx */
2092
2093 #endif
2094
2095 #define CP15R0_PROD_MASK        0x000003f0
2096 #define PXA25x                  0x00000100      /* and PXA26x */
2097 #define PXA210                  0x00000120
2098
2099 #define CP15R0_REV_MASK         0x0000000f
2100
2101 #define CP15R0_PRODREV_MASK     (CP15R0_PROD_MASK | CP15R0_REV_MASK)
2102
2103 #define PXA255_A0               0x00000106      /* or PXA260_B1 */
2104 #define PXA250_C0               0x00000105      /* or PXA26x_B0 */
2105 #define PXA250_B2               0x00000104
2106 #define PXA250_B1               0x00000103      /* or PXA260_A0 */
2107 #define PXA250_B0               0x00000102
2108 #define PXA250_A1               0x00000101
2109 #define PXA250_A0               0x00000100
2110
2111 #define PXA210_C0               0x00000125
2112 #define PXA210_B2               0x00000124
2113 #define PXA210_B1               0x00000123
2114 #define PXA210_B0               0x00000122
2115 #define IXP425_A0               0x000001c1
2116 #define IXP425_B0               0x000001f1
2117 #define IXP465_AD               0x00000200
2118
2119 /*
2120  *      probe - binds to the platform device
2121  */
2122 static int __init pxa2xx_udc_probe(struct platform_device *pdev)
2123 {
2124         struct pxa2xx_udc *dev = &memory;
2125         int retval, vbus_irq, irq;
2126         u32 chiprev;
2127
2128         /* insist on Intel/ARM/XScale */
2129         asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev));
2130         if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) {
2131                 printk(KERN_ERR "%s: not XScale!\n", driver_name);
2132                 return -ENODEV;
2133         }
2134
2135         /* trigger chiprev-specific logic */
2136         switch (chiprev & CP15R0_PRODREV_MASK) {
2137 #if     defined(CONFIG_ARCH_PXA)
2138         case PXA255_A0:
2139                 dev->has_cfr = 1;
2140                 break;
2141         case PXA250_A0:
2142         case PXA250_A1:
2143                 /* A0/A1 "not released"; ep 13, 15 unusable */
2144                 /* fall through */
2145         case PXA250_B2: case PXA210_B2:
2146         case PXA250_B1: case PXA210_B1:
2147         case PXA250_B0: case PXA210_B0:
2148                 /* OUT-DMA is broken ... */
2149                 /* fall through */
2150         case PXA250_C0: case PXA210_C0:
2151                 break;
2152 #elif   defined(CONFIG_ARCH_IXP4XX)
2153         case IXP425_A0:
2154         case IXP425_B0:
2155         case IXP465_AD:
2156                 dev->has_cfr = 1;
2157                 break;
2158 #endif
2159         default:
2160                 printk(KERN_ERR "%s: unrecognized processor: %08x\n",
2161                         driver_name, chiprev);
2162                 /* iop3xx, ixp4xx, ... */
2163                 return -ENODEV;
2164         }
2165
2166         irq = platform_get_irq(pdev, 0);
2167         if (irq < 0)
2168                 return -ENODEV;
2169
2170         pr_debug("%s: IRQ %d%s%s\n", driver_name, irq,
2171                 dev->has_cfr ? "" : " (!cfr)",
2172                 SIZE_STR "(pio)"
2173                 );
2174
2175         /* other non-static parts of init */
2176         dev->dev = &pdev->dev;
2177         dev->mach = pdev->dev.platform_data;
2178
2179         if (dev->mach->gpio_vbus) {
2180                 if ((retval = gpio_request(dev->mach->gpio_vbus,
2181                                 "pxa2xx_udc GPIO VBUS"))) {
2182                         dev_dbg(&pdev->dev,
2183                                 "can't get vbus gpio %d, err: %d\n",
2184                                 dev->mach->gpio_vbus, retval);
2185                         return -EBUSY;
2186                 }
2187                 gpio_direction_input(dev->mach->gpio_vbus);
2188                 vbus_irq = gpio_to_irq(dev->mach->gpio_vbus);
2189                 set_irq_type(vbus_irq, IRQT_BOTHEDGE);
2190         } else
2191                 vbus_irq = 0;
2192
2193         if (dev->mach->gpio_pullup) {
2194                 if ((retval = gpio_request(dev->mach->gpio_pullup,
2195                                 "pca2xx_udc GPIO PULLUP"))) {
2196                         dev_dbg(&pdev->dev,
2197                                 "can't get pullup gpio %d, err: %d\n",
2198                                 dev->mach->gpio_pullup, retval);
2199                         if (dev->mach->gpio_vbus)
2200                                 gpio_free(dev->mach->gpio_vbus);
2201                         return -EBUSY;
2202                 }
2203                 gpio_direction_output(dev->mach->gpio_pullup, 0);
2204         }
2205
2206         init_timer(&dev->timer);
2207         dev->timer.function = udc_watchdog;
2208         dev->timer.data = (unsigned long) dev;
2209
2210         device_initialize(&dev->gadget.dev);
2211         dev->gadget.dev.parent = &pdev->dev;
2212         dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
2213
2214         the_controller = dev;
2215         platform_set_drvdata(pdev, dev);
2216
2217         udc_disable(dev);
2218         udc_reinit(dev);
2219
2220         dev->vbus = is_vbus_present();
2221
2222         /* irq setup after old hardware state is cleaned up */
2223         retval = request_irq(irq, pxa2xx_udc_irq,
2224                         IRQF_DISABLED, driver_name, dev);
2225         if (retval != 0) {
2226                 printk(KERN_ERR "%s: can't get irq %d, err %d\n",
2227                         driver_name, irq, retval);
2228                 if (dev->mach->gpio_pullup)
2229                         gpio_free(dev->mach->gpio_pullup);
2230                 if (dev->mach->gpio_vbus)
2231                         gpio_free(dev->mach->gpio_vbus);
2232                 return -EBUSY;
2233         }
2234         dev->got_irq = 1;
2235
2236 #ifdef CONFIG_ARCH_LUBBOCK
2237         if (machine_is_lubbock()) {
2238                 retval = request_irq(LUBBOCK_USB_DISC_IRQ,
2239                                 lubbock_vbus_irq,
2240                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2241                                 driver_name, dev);
2242                 if (retval != 0) {
2243                         printk(KERN_ERR "%s: can't get irq %i, err %d\n",
2244                                 driver_name, LUBBOCK_USB_DISC_IRQ, retval);
2245 lubbock_fail0:
2246                         free_irq(irq, dev);
2247                         if (dev->mach->gpio_pullup)
2248                                 gpio_free(dev->mach->gpio_pullup);
2249                         if (dev->mach->gpio_vbus)
2250                                 gpio_free(dev->mach->gpio_vbus);
2251                         return -EBUSY;
2252                 }
2253                 retval = request_irq(LUBBOCK_USB_IRQ,
2254                                 lubbock_vbus_irq,
2255                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2256                                 driver_name, dev);
2257                 if (retval != 0) {
2258                         printk(KERN_ERR "%s: can't get irq %i, err %d\n",
2259                                 driver_name, LUBBOCK_USB_IRQ, retval);
2260                         free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2261                         goto lubbock_fail0;
2262                 }
2263         } else
2264 #endif
2265         if (vbus_irq) {
2266                 retval = request_irq(vbus_irq, udc_vbus_irq,
2267                                 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
2268                                 driver_name, dev);
2269                 if (retval != 0) {
2270                         printk(KERN_ERR "%s: can't get irq %i, err %d\n",
2271                                 driver_name, vbus_irq, retval);
2272                         free_irq(irq, dev);
2273                         if (dev->mach->gpio_pullup)
2274                                 gpio_free(dev->mach->gpio_pullup);
2275                         if (dev->mach->gpio_vbus)
2276                                 gpio_free(dev->mach->gpio_vbus);
2277                         return -EBUSY;
2278                 }
2279         }
2280         create_proc_files();
2281
2282         return 0;
2283 }
2284
2285 static void pxa2xx_udc_shutdown(struct platform_device *_dev)
2286 {
2287         pullup_off();
2288 }
2289
2290 static int __exit pxa2xx_udc_remove(struct platform_device *pdev)
2291 {
2292         struct pxa2xx_udc *dev = platform_get_drvdata(pdev);
2293
2294         if (dev->driver)
2295                 return -EBUSY;
2296
2297         udc_disable(dev);
2298         remove_proc_files();
2299
2300         if (dev->got_irq) {
2301                 free_irq(platform_get_irq(pdev, 0), dev);
2302                 dev->got_irq = 0;
2303         }
2304 #ifdef CONFIG_ARCH_LUBBOCK
2305         if (machine_is_lubbock()) {
2306                 free_irq(LUBBOCK_USB_DISC_IRQ, dev);
2307                 free_irq(LUBBOCK_USB_IRQ, dev);
2308         }
2309 #endif
2310         if (dev->mach->gpio_vbus) {
2311                 free_irq(gpio_to_irq(dev->mach->gpio_vbus), dev);
2312                 gpio_free(dev->mach->gpio_vbus);
2313         }
2314         if (dev->mach->gpio_pullup)
2315                 gpio_free(dev->mach->gpio_pullup);
2316
2317         platform_set_drvdata(pdev, NULL);
2318         the_controller = NULL;
2319         return 0;
2320 }
2321
2322 /*-------------------------------------------------------------------------*/
2323
2324 #ifdef  CONFIG_PM
2325
2326 /* USB suspend (controlled by the host) and system suspend (controlled
2327  * by the PXA) don't necessarily work well together.  If USB is active,
2328  * the 48 MHz clock is required; so the system can't enter 33 MHz idle
2329  * mode, or any deeper PM saving state.
2330  *
2331  * For now, we punt and forcibly disconnect from the USB host when PXA
2332  * enters any suspend state.  While we're disconnected, we always disable
2333  * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states.
2334  * Boards without software pullup control shouldn't use those states.
2335  * VBUS IRQs should probably be ignored so that the PXA device just acts
2336  * "dead" to USB hosts until system resume.
2337  */
2338 static int pxa2xx_udc_suspend(struct platform_device *dev, pm_message_t state)
2339 {
2340         struct pxa2xx_udc       *udc = platform_get_drvdata(dev);
2341
2342         if (!udc->mach->udc_command)
2343                 WARN("USB host won't detect disconnect!\n");
2344         pullup(udc, 0);
2345
2346         return 0;
2347 }
2348
2349 static int pxa2xx_udc_resume(struct platform_device *dev)
2350 {
2351         struct pxa2xx_udc       *udc = platform_get_drvdata(dev);
2352
2353         pullup(udc, 1);
2354
2355         return 0;
2356 }
2357
2358 #else
2359 #define pxa2xx_udc_suspend      NULL
2360 #define pxa2xx_udc_resume       NULL
2361 #endif
2362
2363 /*-------------------------------------------------------------------------*/
2364
2365 static struct platform_driver udc_driver = {
2366         .shutdown       = pxa2xx_udc_shutdown,
2367         .remove         = __exit_p(pxa2xx_udc_remove),
2368         .suspend        = pxa2xx_udc_suspend,
2369         .resume         = pxa2xx_udc_resume,
2370         .driver         = {
2371                 .owner  = THIS_MODULE,
2372                 .name   = "pxa2xx-udc",
2373         },
2374 };
2375
2376 static int __init udc_init(void)
2377 {
2378         printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION);
2379         return platform_driver_probe(&udc_driver, pxa2xx_udc_probe);
2380 }
2381 module_init(udc_init);
2382
2383 static void __exit udc_exit(void)
2384 {
2385         platform_driver_unregister(&udc_driver);
2386 }
2387 module_exit(udc_exit);
2388
2389 MODULE_DESCRIPTION(DRIVER_DESC);
2390 MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell");
2391 MODULE_LICENSE("GPL");
2392