2 * arch/arm/mach-ixp2000/ixdp2x00.c
4 * Code common to IXDP2400 and IXDP2800 platforms.
6 * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
7 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
9 * Copyright (C) 2002 Intel Corp.
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
17 #include <linux/kernel.h>
18 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/platform_device.h>
23 #include <linux/bitops.h>
24 #include <linux/pci.h>
25 #include <linux/ioport.h>
26 #include <linux/slab.h>
27 #include <linux/delay.h>
31 #include <asm/pgtable.h>
33 #include <asm/system.h>
34 #include <asm/hardware.h>
35 #include <asm/mach-types.h>
37 #include <asm/mach/pci.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/irq.h>
40 #include <asm/mach/time.h>
41 #include <asm/mach/flash.h>
42 #include <asm/mach/arch.h>
44 #include <asm/arch/gpio.h>
47 /*************************************************************************
48 * IXDP2x00 IRQ Initialization
49 *************************************************************************/
50 static volatile unsigned long *board_irq_mask;
51 static volatile unsigned long *board_irq_stat;
52 static unsigned long board_irq_count;
54 #ifdef CONFIG_ARCH_IXDP2400
56 * Slowport configuration for accessing CPLD registers on IXDP2x00
58 static struct slowport_cfg slowport_cpld_cfg = {
59 .CCR = SLOWPORT_CCR_DIV_2,
62 .PCR = SLOWPORT_MODE_FLASH,
63 .ADC = SLOWPORT_ADDR_WIDTH_24 | SLOWPORT_DATA_WIDTH_8
67 static void ixdp2x00_irq_mask(unsigned int irq)
70 static struct slowport_cfg old_cfg;
73 * This is ugly in common code but really don't know
74 * of a better way to handle it. :(
76 #ifdef CONFIG_ARCH_IXDP2400
77 if (machine_is_ixdp2400())
78 ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
81 dummy = *board_irq_mask;
82 dummy |= IXP2000_BOARD_IRQ_MASK(irq);
83 ixp2000_reg_wrb(board_irq_mask, dummy);
85 #ifdef CONFIG_ARCH_IXDP2400
86 if (machine_is_ixdp2400())
87 ixp2000_release_slowport(&old_cfg);
91 static void ixdp2x00_irq_unmask(unsigned int irq)
94 static struct slowport_cfg old_cfg;
96 #ifdef CONFIG_ARCH_IXDP2400
97 if (machine_is_ixdp2400())
98 ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
101 dummy = *board_irq_mask;
102 dummy &= ~IXP2000_BOARD_IRQ_MASK(irq);
103 ixp2000_reg_wrb(board_irq_mask, dummy);
105 if (machine_is_ixdp2400())
106 ixp2000_release_slowport(&old_cfg);
109 static void ixdp2x00_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
111 volatile u32 ex_interrupt = 0;
112 static struct slowport_cfg old_cfg;
115 desc->chip->mask(irq);
117 #ifdef CONFIG_ARCH_IXDP2400
118 if (machine_is_ixdp2400())
119 ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
121 ex_interrupt = *board_irq_stat & 0xff;
122 if (machine_is_ixdp2400())
123 ixp2000_release_slowport(&old_cfg);
126 printk(KERN_ERR "Spurious IXDP2x00 CPLD interrupt!\n");
130 for(i = 0; i < board_irq_count; i++) {
131 if(ex_interrupt & (1 << i)) {
132 struct irqdesc *cpld_desc;
133 int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
134 cpld_desc = irq_desc + cpld_irq;
135 desc_handle_irq(cpld_irq, cpld_desc, regs);
139 desc->chip->unmask(irq);
142 static struct irqchip ixdp2x00_cpld_irq_chip = {
143 .ack = ixdp2x00_irq_mask,
144 .mask = ixdp2x00_irq_mask,
145 .unmask = ixdp2x00_irq_unmask
148 void ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_irqs)
154 if (!ixdp2x00_master_npu())
157 board_irq_stat = stat_reg;
158 board_irq_mask = mask_reg;
159 board_irq_count = nr_irqs;
161 *board_irq_mask = 0xffffffff;
163 for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
164 set_irq_chip(irq, &ixdp2x00_cpld_irq_chip);
165 set_irq_handler(irq, do_level_IRQ);
166 set_irq_flags(irq, IRQF_VALID);
169 /* Hook into PCI interrupt */
170 set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
173 /*************************************************************************
174 * IXDP2x00 memory map
175 *************************************************************************/
176 static struct map_desc ixdp2x00_io_desc __initdata = {
177 .virtual = IXDP2X00_VIRT_CPLD_BASE,
178 .pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),
179 .length = IXDP2X00_CPLD_SIZE,
183 void __init ixdp2x00_map_io(void)
187 iotable_init(&ixdp2x00_io_desc, 1);
190 /*************************************************************************
191 * IXDP2x00-common PCI init
193 * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board
194 * contains two NPUs (ingress and egress) connected over PCI, both running
195 * instances of the kernel. So far so good. Peers on the PCI bus running
196 * Linux is a common design in telecom systems. The problem is that instead
197 * of all the devices being controlled by a single host, different
198 * devices are controlles by different NPUs on the same bus, leading to
199 * multiple hosts on the bus. The exact bus layout looks like:
202 * Master NPU <-------------------+-------------------> Slave NPU
209 * <--+------+---------+---------+------+-->
212 * ... Dev PMC Media Eth0 Eth1 ...
214 * The master controlls all but Eth1, which is controlled by the
215 * slave. What this means is that the both the master and the slave
216 * have to scan the bus, but only one of them can enumerate the bus.
217 * In addition, after the bus is scanned, each kernel must remove
218 * the device(s) it does not control from the PCI dev list otherwise
219 * a driver on each NPU will try to manage it and we will have horrible
220 * conflicts. Oh..and the slave NPU needs to see the master NPU
221 * for Intel's drivers to work properly. Closed source drivers...
223 * The way we deal with this is fairly simple but ugly:
225 * 1) Let master scan and enumerate the bus completely.
226 * 2) Master deletes Eth1 from device list.
227 * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)
229 * 4) Find HW designers and LART them.
231 * The boards also do not do normal PCI IRQ routing, or any sort of
232 * sensical swizzling, so we just need to check where on the bus a
233 * device sits and figure out to which CPLD pin the interrupt is routed.
234 * See ixdp2[48]00.c files.
236 *************************************************************************/
237 void ixdp2x00_slave_pci_postinit(void)
242 * Remove PMC device is there is one
244 if((dev = pci_find_slot(1, IXDP2X00_PMC_DEVFN)))
245 pci_remove_bus_device(dev);
247 dev = pci_find_slot(0, IXDP2X00_21555_DEVFN);
248 pci_remove_bus_device(dev);
251 /**************************************************************************
252 * IXDP2x00 Machine Setup
253 *************************************************************************/
254 static struct flash_platform_data ixdp2x00_platform_data = {
255 .map_name = "cfi_probe",
259 static struct ixp2000_flash_data ixdp2x00_flash_data = {
260 .platform_data = &ixdp2x00_platform_data,
264 static struct resource ixdp2x00_flash_resource = {
266 .end = 0xc4000000 + 0x00ffffff,
267 .flags = IORESOURCE_MEM,
270 static struct platform_device ixdp2x00_flash = {
271 .name = "IXP2000-Flash",
274 .platform_data = &ixdp2x00_flash_data,
277 .resource = &ixdp2x00_flash_resource,
280 static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins = {
281 .sda_pin = IXDP2X00_GPIO_SDA,
282 .scl_pin = IXDP2X00_GPIO_SCL,
285 static struct platform_device ixdp2x00_i2c_controller = {
286 .name = "IXP2000-I2C",
289 .platform_data = &ixdp2x00_i2c_gpio_pins,
294 static struct platform_device *ixdp2x00_devices[] __initdata = {
296 &ixdp2x00_i2c_controller
299 void __init ixdp2x00_init_machine(void)
301 gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);
302 gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
304 platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));