2 * pata_artop.c - ARTOP ATA controller driver
4 * (C) 2006 Red Hat <alan@redhat.com>
6 * Based in part on drivers/ide/pci/aec62xx.c
7 * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org>
8 * 865/865R fixes for Macintosh card version from a patch to the old
9 * driver by Thibaut VARENE <varenet@parisc-linux.org>
10 * When setting the PCI latency we must set 0x80 or higher for burst
11 * performance Alessandro Zummo <alessandro.zummo@towertech.it>
14 * 850 serialization once the core supports it
15 * Investigate no_dsc on 850R
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/blkdev.h>
24 #include <linux/delay.h>
25 #include <linux/device.h>
26 #include <scsi/scsi_host.h>
27 #include <linux/libata.h>
28 #include <linux/ata.h>
30 #define DRV_NAME "pata_artop"
31 #define DRV_VERSION "0.4.3"
34 * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we
35 * get PCI bus speed functionality we leave this as 0. Its a variable
36 * for when we get the functionality and also for folks wanting to
42 static int artop6210_pre_reset(struct ata_port *ap, unsigned long deadline)
44 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
45 const struct pci_bits artop_enable_bits[] = {
46 { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
47 { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
50 if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
53 return ata_std_prereset(ap, deadline);
57 * artop6210_error_handler - Probe specified port on PATA host controller
61 * None (inherited from caller).
64 static void artop6210_error_handler(struct ata_port *ap)
66 ata_bmdma_drive_eh(ap, artop6210_pre_reset,
67 ata_std_softreset, NULL,
72 * artop6260_pre_reset - check for 40/80 pin
74 * @deadline: deadline jiffies for the operation
76 * The ARTOP hardware reports the cable detect bits in register 0x49.
77 * Nothing complicated needed here.
80 static int artop6260_pre_reset(struct ata_port *ap, unsigned long deadline)
82 static const struct pci_bits artop_enable_bits[] = {
83 { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */
84 { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */
87 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
89 /* Odd numbered device ids are the units with enable bits (the -R cards) */
90 if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no]))
93 return ata_std_prereset(ap, deadline);
97 * artop6260_cable_detect - identify cable type
100 * Identify the cable type for the ARTOP interface in question
103 static int artop6260_cable_detect(struct ata_port *ap)
105 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
107 pci_read_config_byte(pdev, 0x49, &tmp);
108 if (tmp & (1 << ap->port_no))
109 return ATA_CBL_PATA40;
110 return ATA_CBL_PATA80;
114 * artop6260_error_handler - Probe specified port on PATA host controller
118 * None (inherited from caller).
121 static void artop6260_error_handler(struct ata_port *ap)
123 ata_bmdma_drive_eh(ap, artop6260_pre_reset,
124 ata_std_softreset, NULL,
129 * artop6210_load_piomode - Load a set of PATA PIO timings
130 * @ap: Port whose timings we are configuring
134 * Set PIO mode for device, in host controller PCI config space. This
135 * is used both to set PIO timings in PIO mode and also to set the
136 * matching PIO clocking for UDMA, as well as the MWDMA timings.
139 * None (inherited from caller).
142 static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio)
144 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
145 int dn = adev->devno + 2 * ap->port_no;
146 const u16 timing[2][5] = {
147 { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },
148 { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }
151 /* Load the PIO timing active/recovery bits */
152 pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]);
156 * artop6210_set_piomode - Initialize host controller PATA PIO timings
157 * @ap: Port whose timings we are configuring
158 * @adev: Device we are configuring
160 * Set PIO mode for device, in host controller PCI config space. For
161 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
162 * the event UDMA is used the later call to set_dmamode will set the
166 * None (inherited from caller).
169 static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev)
171 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
172 int dn = adev->devno + 2 * ap->port_no;
175 artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
177 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
178 pci_read_config_byte(pdev, 0x54, &ultra);
179 ultra &= ~(3 << (2 * dn));
180 pci_write_config_byte(pdev, 0x54, ultra);
184 * artop6260_load_piomode - Initialize host controller PATA PIO timings
185 * @ap: Port whose timings we are configuring
186 * @adev: Device we are configuring
189 * Set PIO mode for device, in host controller PCI config space. The
190 * ARTOP6260 and relatives store the timing data differently.
193 * None (inherited from caller).
196 static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio)
198 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
199 int dn = adev->devno + 2 * ap->port_no;
200 const u8 timing[2][5] = {
201 { 0x00, 0x0A, 0x08, 0x33, 0x31 },
202 { 0x70, 0x7A, 0x78, 0x43, 0x41 }
205 /* Load the PIO timing active/recovery bits */
206 pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]);
210 * artop6260_set_piomode - Initialize host controller PATA PIO timings
211 * @ap: Port whose timings we are configuring
212 * @adev: Device we are configuring
214 * Set PIO mode for device, in host controller PCI config space. For
215 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
216 * the event UDMA is used the later call to set_dmamode will set the
220 * None (inherited from caller).
223 static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev)
225 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
228 artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
230 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
231 pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
232 ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
233 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
237 * artop6210_set_dmamode - Initialize host controller PATA PIO timings
238 * @ap: Port whose timings we are configuring
239 * @adev: Device whose timings we are configuring
241 * Set DMA mode for device, in host controller PCI config space.
244 * None (inherited from caller).
247 static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev)
250 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
251 int dn = adev->devno + 2 * ap->port_no;
254 if (adev->dma_mode == XFER_MW_DMA_0)
259 /* Load the PIO timing active/recovery bits */
260 artop6210_load_piomode(ap, adev, pio);
262 pci_read_config_byte(pdev, 0x54, &ultra);
263 ultra &= ~(3 << (2 * dn));
265 /* Add ultra DMA bits if in UDMA mode */
266 if (adev->dma_mode >= XFER_UDMA_0) {
267 u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
270 ultra |= (mode << (2 * dn));
272 pci_write_config_byte(pdev, 0x54, ultra);
276 * artop6260_set_dmamode - Initialize host controller PATA PIO timings
277 * @ap: Port whose timings we are configuring
278 * @adev: Device we are configuring
280 * Set DMA mode for device, in host controller PCI config space. The
281 * ARTOP6260 and relatives store the timing data differently.
284 * None (inherited from caller).
287 static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev)
289 unsigned int pio = adev->pio_mode - XFER_PIO_0;
290 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
293 if (adev->dma_mode == XFER_MW_DMA_0)
298 /* Load the PIO timing active/recovery bits */
299 artop6260_load_piomode(ap, adev, pio);
301 /* Add ultra DMA bits if in UDMA mode */
302 pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
303 ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
304 if (adev->dma_mode >= XFER_UDMA_0) {
305 u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
308 ultra |= (mode << (4 * adev->devno));
310 pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
313 static struct scsi_host_template artop_sht = {
314 .module = THIS_MODULE,
316 .ioctl = ata_scsi_ioctl,
317 .queuecommand = ata_scsi_queuecmd,
318 .can_queue = ATA_DEF_QUEUE,
319 .this_id = ATA_SHT_THIS_ID,
320 .sg_tablesize = LIBATA_MAX_PRD,
321 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
322 .emulated = ATA_SHT_EMULATED,
323 .use_clustering = ATA_SHT_USE_CLUSTERING,
324 .proc_name = DRV_NAME,
325 .dma_boundary = ATA_DMA_BOUNDARY,
326 .slave_configure = ata_scsi_slave_config,
327 .slave_destroy = ata_scsi_slave_destroy,
328 .bios_param = ata_std_bios_param,
331 static const struct ata_port_operations artop6210_ops = {
332 .port_disable = ata_port_disable,
333 .set_piomode = artop6210_set_piomode,
334 .set_dmamode = artop6210_set_dmamode,
335 .mode_filter = ata_pci_default_filter,
337 .tf_load = ata_tf_load,
338 .tf_read = ata_tf_read,
339 .check_status = ata_check_status,
340 .exec_command = ata_exec_command,
341 .dev_select = ata_std_dev_select,
343 .freeze = ata_bmdma_freeze,
344 .thaw = ata_bmdma_thaw,
345 .error_handler = artop6210_error_handler,
346 .post_internal_cmd = ata_bmdma_post_internal_cmd,
347 .cable_detect = ata_cable_40wire,
349 .bmdma_setup = ata_bmdma_setup,
350 .bmdma_start = ata_bmdma_start,
351 .bmdma_stop = ata_bmdma_stop,
352 .bmdma_status = ata_bmdma_status,
353 .qc_prep = ata_qc_prep,
354 .qc_issue = ata_qc_issue_prot,
356 .data_xfer = ata_data_xfer,
358 .irq_handler = ata_interrupt,
359 .irq_clear = ata_bmdma_irq_clear,
360 .irq_on = ata_irq_on,
361 .irq_ack = ata_irq_ack,
363 .port_start = ata_port_start,
366 static const struct ata_port_operations artop6260_ops = {
367 .port_disable = ata_port_disable,
368 .set_piomode = artop6260_set_piomode,
369 .set_dmamode = artop6260_set_dmamode,
371 .tf_load = ata_tf_load,
372 .tf_read = ata_tf_read,
373 .check_status = ata_check_status,
374 .exec_command = ata_exec_command,
375 .dev_select = ata_std_dev_select,
377 .freeze = ata_bmdma_freeze,
378 .thaw = ata_bmdma_thaw,
379 .error_handler = artop6260_error_handler,
380 .post_internal_cmd = ata_bmdma_post_internal_cmd,
381 .cable_detect = artop6260_cable_detect,
383 .bmdma_setup = ata_bmdma_setup,
384 .bmdma_start = ata_bmdma_start,
385 .bmdma_stop = ata_bmdma_stop,
386 .bmdma_status = ata_bmdma_status,
387 .qc_prep = ata_qc_prep,
388 .qc_issue = ata_qc_issue_prot,
389 .data_xfer = ata_data_xfer,
391 .irq_handler = ata_interrupt,
392 .irq_clear = ata_bmdma_irq_clear,
393 .irq_on = ata_irq_on,
394 .irq_ack = ata_irq_ack,
396 .port_start = ata_port_start,
401 * artop_init_one - Register ARTOP ATA PCI device with kernel services
402 * @pdev: PCI device to register
403 * @ent: Entry in artop_pci_tbl matching with @pdev
405 * Called from kernel PCI layer.
408 * Inherited from PCI layer (may sleep).
411 * Zero on success, or -ERRNO value.
414 static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id)
416 static int printed_version;
417 static const struct ata_port_info info_6210 = {
419 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
420 .pio_mask = 0x1f, /* pio0-4 */
421 .mwdma_mask = 0x07, /* mwdma0-2 */
422 .udma_mask = ATA_UDMA2,
423 .port_ops = &artop6210_ops,
425 static const struct ata_port_info info_626x = {
427 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
428 .pio_mask = 0x1f, /* pio0-4 */
429 .mwdma_mask = 0x07, /* mwdma0-2 */
430 .udma_mask = ATA_UDMA4,
431 .port_ops = &artop6260_ops,
433 static const struct ata_port_info info_626x_fast = {
435 .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
436 .pio_mask = 0x1f, /* pio0-4 */
437 .mwdma_mask = 0x07, /* mwdma0-2 */
438 .udma_mask = ATA_UDMA5,
439 .port_ops = &artop6260_ops,
441 const struct ata_port_info *ppi[] = { NULL, NULL };
443 if (!printed_version++)
444 dev_printk(KERN_DEBUG, &pdev->dev,
445 "version " DRV_VERSION "\n");
447 if (id->driver_data == 0) { /* 6210 variant */
449 ppi[1] = &ata_dummy_port_info;
450 /* BIOS may have left us in UDMA, clear it before libata probe */
451 pci_write_config_byte(pdev, 0x54, 0);
452 /* For the moment (also lacks dsc) */
453 printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n");
454 printk(KERN_WARNING "Secondary ATA ports will not be activated.\n");
456 else if (id->driver_data == 1) /* 6260 */
458 else if (id->driver_data == 2) { /* 6260 or 6260 + fast */
459 unsigned long io = pci_resource_start(pdev, 4);
464 ppi[0] = &info_626x_fast;
465 /* Mac systems come up with some registers not set as we
468 /* Clear reset & test bits */
469 pci_read_config_byte(pdev, 0x49, ®);
470 pci_write_config_byte(pdev, 0x49, reg & ~ 0x30);
472 /* PCI latency must be > 0x80 for burst mode, tweak it
475 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®);
477 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
479 /* Enable IRQ output and burst mode */
480 pci_read_config_byte(pdev, 0x4a, ®);
481 pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
485 BUG_ON(ppi[0] == NULL);
487 return ata_pci_init_one(pdev, ppi);
490 static const struct pci_device_id artop_pci_tbl[] = {
491 { PCI_VDEVICE(ARTOP, 0x0005), 0 },
492 { PCI_VDEVICE(ARTOP, 0x0006), 1 },
493 { PCI_VDEVICE(ARTOP, 0x0007), 1 },
494 { PCI_VDEVICE(ARTOP, 0x0008), 2 },
495 { PCI_VDEVICE(ARTOP, 0x0009), 2 },
497 { } /* terminate list */
500 static struct pci_driver artop_pci_driver = {
502 .id_table = artop_pci_tbl,
503 .probe = artop_init_one,
504 .remove = ata_pci_remove_one,
507 static int __init artop_init(void)
509 return pci_register_driver(&artop_pci_driver);
512 static void __exit artop_exit(void)
514 pci_unregister_driver(&artop_pci_driver);
517 module_init(artop_init);
518 module_exit(artop_exit);
520 MODULE_AUTHOR("Alan Cox");
521 MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");
522 MODULE_LICENSE("GPL");
523 MODULE_DEVICE_TABLE(pci, artop_pci_tbl);
524 MODULE_VERSION(DRV_VERSION);